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Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad
Other Related Titles of Interest Include: Tolerance Analysis of Electronic Circuits Using MATLAB Robert R. Boyd, University of California, Irvine, California ISBN: 0849322766 Tolerance Analysis of Electronic Circuits Using MATHCAD Robert R. Boyd, University of California, Irvine, California ISBN: 0849323398 The Electronics Handbook, Second Edition Jerry Whitaker, Technical Press, Morgan Hill, California ISBN: 0849318890 PSPICE and MATLAB for Electronics: An Integrated Approach John O. Attia, Prairie View A&M University, Texas ISBN: 0849312639 Electronics and Circuit Analysis Using MATLAB, Second Edition John O. Attia, Prairie View A&M University, Texas ISBN: 0849318920
Node List Tolerance Analysis Enhancing SPICE Capabilities with Mathcad
Robert R. Boyd
Boca Raton London New York
A CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa plc.
Published in 2006 by CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2006 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-7028-0 (Hardcover) International Standard Book Number-13: 978-0-8493-7028-1 (Hardcover) Library of Congress Card Number 2005052136 This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their use. No part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. For permission to photocopy or use material electronically from this work, please access www.copyright.com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC) 222 Rosewood Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged. Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe.
Library of Congress Cataloging-in-Publication Data Boyd, Robert (Robert R.) Node list tolerance analysis : enhancing SPICE capabilities with Mathcad/ Robert R. Boyd. p. cm. Includes bibliographical references and index. ISBN 0-8493-7028-0 (alk. paper) 1. Electric circuits, Linear. 2. Analog electronic systems. 3. Electric circuit analysis. 4. Tolerance (Engineering) 5. Mathcad. 6. SPICE (Computer file) TK454.B66 2006 621.3815--dc22
2005052136
Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com Taylor & Francis Group is the Academic Division of Informa plc.
and the CRC Press Web site at http://www.crcpress.com
Preface The purpose of this book is to provide an improved SPICE-like, worst-case analysis (WCA) capability using Mathcad. To achieve more accurate WCA methods, a SPICE-like netlist or node list method of nominal circuit analysis was developed first. Subprogram routines were then added to perform tolerance analyses using Root-Sum-Square (RSS), Extreme Value Analysis (EVA), and Monte Carlo Analysis (MCA) in the DC, frequency, and time domains. Note that “SPICE” is a generic term referring to the public domain software developed by the University of California–Berkeley in the early 1980s. Several companies were started after converting the Fortran code to C and adding a graphics interface. These commercial versions are very capable in nominal circuit analysis and, correspondingly, expensive. There are many areas in SPICE WCA that range from nonexistent or weak capability to erroneous analyses. Most if not all of these deficiencies still exist in many commercial versions. These areas are: • • • • • • • •
A 400-sample Monte Carlo limitation — not nearly enough for adequate statistical confidence levels No RSS capability No direct method of handling asymmetric component tolerances, e.g., +2%, 4% No Fast Monte Carlo Analysis (FMCA) capability* No single-run method of tolerancing inputs No direct method of detecting nonmonotonic components, which cause erroneous WCA outputs No AC frequency sweep sensitivity capability No predefined beta (skewed) or bimodal (gapped) distributions available for MCA
In addition, the SPICE random number generator used for MCA repeatedly supplies the same set of random numbers with each analysis run. To correct this, a new seed must be supplied before each new run. (This is equivalent to having the same 20 numbers come up every time in a Las Vegas keno game.) Some commercial versions may have improved a few of these areas, as most companies want to make a good product better. All of these deficiencies have been addressed and corrected in the supplied Mathcad software on the CD and demonstrated using many examples in this book. For example, the number of Monte Carlo samples is now limited only by the amount * Boyd, R., Tolerance Analysis of Electronic Circuits Using Mathcad, CRC Press, Boca Raton, FL, 1999, p. 87.
of memory on the computer platform used. Those readers knowledgeable in statistics know that in Monte Carlo analysis, more is better. It is the author’s hope that this book will provide a much less expensive and more accurate method of performing tolerance analysis of electronic circuits.
The Author Robert R. Boyd was a technical instructor in the United States Air Force for 19 years. Upon his retirement in 1971, he enrolled at the University of New Mexico and received a B.S.E.E. degree with honors in 1974. He was subsequently employed in the aerospace industry, including 8 years with Hughes Aircraft Co., in analog circuit design until 1993 and as a consultant until 2002. He taught courses in tolerance analysis at the University of California Extension, Irvine, in 1998 and 1999. He has authored two books, Tolerance Analysis of Electronic Circuits Using MATLAB and Tolerance Analysis of Electronic Circuits Using Mathcad, both published by CRC Press in 1999.
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Acknowledgments I would like to give my thanks and credit to the following people at Taylor & Francis/CRC Press: Engineering Editor, Nora Konopka – for her successful presentation of my manuscript to the publishing committee and for pleasant email “conversation.” Editorial Project Development Manager, Helena Redshaw – for her patience and diligence in guiding me and the book material through to production. Associate Editor, Allison Taub – for smoothing out the rough spots and helping with the reviews. Project Editor, Amber Stein – for putting up with my frequent changes to the manuscript. They have all been easy to communicate with and helped make the work of writing this book less painful than it would have otherwise been; and all this in spite of several hurricanes! Robert Boyd Placerville, CA
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Table of Contents PART I Chapter 1 1.1
1.2
Nominal Analysis Introduction ........................................................................................3
Nominal Analysis.............................................................................................3 1.1.1 Introduction ..........................................................................................3 1.1.2 The NDS Method of Nominal Circuit Analysis..................................4 1.1.3 General Guidelines...............................................................................5 Introduction to Node List Circuit Analysis .....................................................6 1.2.1 Rules and Definitions...........................................................................6
Chapter 2
Passive Circuits...................................................................................9
2.1 Introduction to Node List Circuit Analysis (Part One)...................................9 2.2 Introduction to Node List Circuit Analysis (Part Two).................................16 2.3 All-Capacitive Circuit ....................................................................................21 2.4 All-Inductive Circuit ......................................................................................23 2.5 Twin-T RC Network ......................................................................................24 2.6 Broadband Pulse Transformer Model............................................................27 2.7 All-Capacitive Loops (ACL)..........................................................................30 2.8 All-Inductive Cutsets (ICS) ...........................................................................31 2.9 All-Capacitive Loop Example .......................................................................32 References................................................................................................................34 Chapter 3 3.1
3.2 3.3 3.4 3.5 3.6
Controlled Sources ...........................................................................35
Controlled (Dependent) Sources....................................................................35 3.1.1 Voltage-Controlled Current Source (VCCS) .....................................35 3.1.2 Current-Controlled Current Source (CCCS) .....................................35 3.1.3 Voltage-Controlled Voltage Source (VCVS) .....................................35 3.1.4 Current-Controlled Voltage Source (CCVS) .....................................36 3.1.5 CCVS to VCVS .................................................................................36 3.1.6 CCCS to VCCS..................................................................................36 3.1.7 Four Rules that Must be Observed....................................................37 Floating VCVS...............................................................................................38 Circuits with M > 1 .......................................................................................41 First-Order MOSFET Model .........................................................................44 VCVS and CCCS Example ...........................................................................46 Two Inputs, Three Outputs ............................................................................50
3.7 3.8 3.9 3.10 3.11 3.12
Third-Order Opamp Model............................................................................54 A Subcircuit Scheme .....................................................................................56 Subcircuit Opamp Model...............................................................................58 Fifth-Order Active Filter ................................................................................59 State Variable Filter........................................................................................60 Seventh-Order Elliptical Low-Pass Filter......................................................63 3.12.1 Stepping One Resistor Value .............................................................68 3.12.2 Stepping All Seven Capacitor Values ................................................71 3.13 Square Root of Frequency (+10 dB/decade) Circuit ....................................74 3.14 HV (200 V) Shunt MOSFET Regulator........................................................76 3.15 LTC 1562 Band-Pass Filter IC in a Quad IC................................................78 3.16 LTC 1562 Quad Band Filter IC.....................................................................79 3.17 BJT Constant Current Source — A Simple Linear Model Using the NDS Method ..................................................................................................87 3.18 uA733 Video Amplifier..................................................................................89 References................................................................................................................95 Chapter 4
Leverrier’s Algorithm ......................................................................97
4.1 4.2
Numerical Transfer Function [1] ...................................................................97 Transfer Function Using Leverrier’s Algorithm for Twin-T RC Network ..................................................................................................100 References..............................................................................................................101 Chapter 5 5.1 5.2 5.3
Stability Analysis ............................................................................103
Unity Gain Differential Amplifiers..............................................................103 Stability of LM158 Opamp Model..............................................................106 High-Voltage Shunt Regulator — Stability Analysis..................................109
Chapter 6
Transient Analysis ..........................................................................115
6.1 Introduction ..................................................................................................115 6.2 Switched Transient Analysis........................................................................118 6.3 N = 2 Switched Circuit Transient Response ...............................................120 6.4 Comparator 100-Hz Oscillator.....................................................................123 6.5 Transient Analysis of Pulse Transformer ....................................................127 6.6 Passive RCL Circuit Transient Analysis......................................................131 6.7 Mathcad’s Differential Equation Solvers.....................................................133 6.8 A Mathematical Pulse Width Modulator (PWM) .......................................135 6.9 Switching Power Supply Output Stage — Buck Regulator .......................137 6.10 State Space Averaging..................................................................................140 6.11 Simple Triangular Waveform Generator......................................................143 6.12 Quadrature Oscillator...................................................................................145 6.13 Wein Bridge Oscillator ................................................................................148 References..............................................................................................................149
Chapter 7 7.1 7.2
7.3 7.4 7.5 7.6 7.7
DC Circuit Analysis .......................................................................151
Resistance Temperature Detector (RTD) Circuit ........................................151 An Undergraduate EE Textbook Problem ...................................................152 7.2.1 Matrix Solution To Demonstrate the Utility of the NDS Method ....................................................................................153 DC Test Circuit ............................................................................................154 Stacking VCVS’s and Paralleling VCCS’s..................................................158 DC Voltage Sweep (RTD Circuit) ...............................................................159 RTD Circuit — Step Resistor Value............................................................161 Floating 5-V Input Source ...........................................................................164
Chapter 8
Three-Phase Circuits .....................................................................167
Convert ∆ Floating Voltage Inputs to Single-Ended Y Inputs ....................167 Three-Phase NDS Solution..........................................................................170 8.2.1 Unbalanced Delta Load — Single-Ended Inputs on A and B ............................................................................................170 8.2.2 Unbalanced Delta Load — Single-Ended Inputs on A and C ............................................................................................172 8.3 Three-Phase Y — Unbalanced Load ...........................................................174 8.4 Three-Phase Y-Connected Unbalanced Load — Floating Delta Input....................................................................................................177 8.5 Balanced Y- Load.........................................................................................181 References..............................................................................................................186 8.1 8.2
Appendix I ............................................................................................................187 Background Theory of NDS Method....................................................................187 A-I.1 Theory of NDS Method...............................................................................196 A-I.1.1 An AC Floating VCVS ..................................................................199 A-I.1.2 VCVS and CCCS...........................................................................203
PART II Chapter 9 9.1
9.2
Tolerance Analysis Introduction ....................................................................................211
Introduction ..................................................................................................211 9.1.1 Tolerance Analysis of Circuits with Discrete Components ............211 9.1.2 Analysis Methods.............................................................................212 Some Facts about Tolerance Analysis .........................................................212 9.2.1 DC Analysis .....................................................................................212 9.2.1.1 Monte Carlo Analysis .......................................................213 9.2.2 AC Analysis .....................................................................................213 9.2.3 Transient Analysis ............................................................................217
9.2.4 Asymmetric Tolerances....................................................................217 References..............................................................................................................217
Chapter 10 DC Circuits .....................................................................................219 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11
Resistance Temperature Detector (RTD) Circuit......................................219 A Note on Asymmetric Tolerances...........................................................221 Centered Difference Approximation — Sensitivities ...............................222 RTD Circuit Monte Carlo Analysis (MCA) .............................................224 RTD MCA with R4 Tolerance = 10%......................................................226 RTD Circuit Fast Monte Carlo Analysis (FMCA) ...................................227 A CASE FMCA Greater than EVA......................................................... 228 Tolerancing Inputs.....................................................................................231 Beta Distributions [4–6]............................................................................232 RTD MCA — Beta (Skewed) Distribution ..............................................234 MCA of RTD Circuit using Bimodal (Gapped) Distribution Inputs.....................................................................................236 References..............................................................................................................239 Chapter 11 AC Circuits .....................................................................................241 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 11.10 11.11 11.12 11.13 11.14 11.15 11.16 11.17
11.18 11.19 11.20 11.21
Circuit Output vs. Component Value........................................................241 Exact Values of C1 Sensitivity .................................................................247 Multiple-Output EVA................................................................................248 Butterworth Low-Pass Filter Circuit.........................................................250 Butterworth Low-Pass Filter MCA...........................................................251 Butterworth Low-Pass Filter EVA ............................................................253 Butterworth Low-Pass Filter FMCA ........................................................254 Multiple-Feedback Band-Pass Filter (BPF) Circuit ................................255 Multiple-Feedback BPF MCA..................................................................256 Multiple-Feedback BPF EVA ...................................................................257 Multiple-Feedback BPF FMCA................................................................259 Switching Power Supply Compensation Circuit .....................................260 Switching Power Supply Compensation MCA ........................................261 Switching Power Supply Compensation EVA..........................................262 Switching Power Supply Compensation FMCA ......................................264 Sallen and Key Band-Pass Filter (BPF) Circuit.......................................265 Sallen and Key BPF MCA........................................................................266 11.17.1 Sallen and Key BPF — MCA with both Common and Precision Tolerances ...................................................................267 Sallen and Key BPF EVA .........................................................................268 Sallen and Key BPF FMCA .....................................................................270 State Variable Filter Circuit .....................................................................271 State Variable Filter MCA ........................................................................272
11.22 State Variable Filter EVA..........................................................................273 11.23 State Variable Filter FMCA and MCA Combined...................................275 11.24 High-Q Hum Notch Filter Circuit ...........................................................276 11.25 High-Q Hum Notch Filter MCA ..............................................................278 11.26 High-Q Hum Notch Filter EVA................................................................279 11.27 High-Q Hum Notch Filter FMCA ............................................................280 11.28 LTC 1562 MCA ........................................................................................281 11.29 LTC 1562 EVA..........................................................................................282 References..............................................................................................................284 Chapter 12 Transient Tolerance Analysis ........................................................285 12.1 12.2 12.3 12.4
Transient MCA — Twin-T RC Network ...................................................285 Transient MCA — Multiple Feedback BPF ...............................................286 AC and Transient MCA — Bessel HPF .....................................................288 Transient MCA — State Variable Filter......................................................291
Chapter 13 Three-Phase Circuits ....................................................................295 13.1 Three-Phase Y-Connected Unbalanced Load MCA ....................................295 13.2 Three-Phase Y-Connected Unbalanced Load EVA .....................................297 13.3 Three-Phase Y-Connected Unbalanced Load FMCA..................................300 Chapter 14 Miscellaneous Topics......................................................................303 14.1 14.2 14.3 14.4 14.5
Components Nominally Zero.......................................................................303 Tolerance Analysis of Opamp Offsets .........................................................305 Best-Fit Resistor Ratios ...............................................................................309 Truncated Gaussian Distribution .................................................................311 LTC1060 Switched Capacitor Filter............................................................313 14.5.1 Design Procedure from the Data Sheet ...........................................313
Appendix II...........................................................................................................319 Summary of Tolerance Analysis Methods ............................................................319 DC ................................................................................................................319 AC.................................................................................................................319 Transient .......................................................................................................319 Table of Subprograms............................................................................................320 Part I Nominal Analysis Subprograms .......................................................320 Part II Tolerance Analysis Subprograms (Used with Part I Subprograms) ..................................................................................320 In Case of Difficulty..............................................................................................320 Abbreviations .........................................................................................................321 Index......................................................................................................................323
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TO MY WIFE LINDA Forever and Always
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Part I Nominal Analysis
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1
Introduction
1.1 NOMINAL ANALYSIS The features of this analysis are: • • •
• • •
Loop or nodal analysis math is not required. It uses SPICE-like node lists. All four types of controlled (dependent) sources can be used. It has DC and AC multiple-input-multiple-output (MIMO) capability. • Maximum number of inputs: 10 • Maximum number of outputs: No limit (all circuit nodes) Transient (time-domain) analysis. Three-phase circuit analysis. DC, AC, three-phase, and transient tolerance analysis methods (discussed in Part II).
1.1.1 INTRODUCTION Using state space methods, the circuit DC, AC, and transient response can all be obtained from the same initial analysis. Hence, there is an economy of effort that makes it worthwhile to learn state space techniques. However, conventional state space methods require an inordinate amount of circuit analysis algebra. This book shows a SPICE-like method for creating state space arrays with minimal effort. The numerical transfer function can also be a part of the solution using Leverrier’s algorithm. Hence, this method eliminates the algebra required for conventional circuit analysis techniques as taught in some undergraduate electrical engineering curriculums. The simple procedure entails creating node lists directly from the schematic, very much similar to early commercial versions of SPICE. This original method is called node list DC superposition (NDS). The purpose of presenting this material in Part I is to provide easy SPICE-like analysis methods for the working engineer if SPICE is not available owing to network downtime, network queuing (owing to limited site licenses), or, as sometimes happens in smaller companies, simply has not been purchased. Circuits of at least medium complexity can be simulated. (See Section 3.15 for a circuit with a component count of 68.) The primary goal, however, is to demonstrate correct tolerance analysis methods (Part II). The prerequisite nominal circuit analysis NDS method along with numerous examples is covered in Part I.
3
4
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
1.1.2 THE NDS METHOD
OF
NOMINAL CIRCUIT ANALYSIS
It is assumed that electrical engineers are somewhat familiar with matrix analysis and state space methods; hence, the introductory material is not extensive. Familiarity with these subjects and Mathcad is necessary. As previously stated, a big advantage of state space analysis is that the DC output, AC frequency response, transient response, and circuit transfer function (using Leverrier’s algorithm) can all be obtained from one initial analysis. Another advantage is that state space matrices or arrays are real, not complex. Complex matrices obtained from loop or nodal analysis require a real array twice the size of a complex array to obtain a solution. Hence, state space methods decrease execution time for large arrays and increase solution accuracy. This becomes apparent when it is recalled that the number of arithmetic operations required to find a determinant is directly proportional to N!, where N is the dimension of the square array. The matrix equations used in state space analysis are dx dx = Ax + Bu, y = Dx + Eu + G dt dt where A, B, D, E, and G are arrays; x, a column vector of the state variables; u, a column vector of inputs; and y, the output. In most analyses, array G is a null (zero) array. (For an example using the G array, see Section 12.3.) Taking the Laplace transform of the first equation and substituting in the second gives the following with G = 0: y = D(sI – A)–1 Bu + Eu where I is an identity matrix. In the NDS method, the input u is included in B and E so that y = D(sI – A)–1 B + E The “state variables” are the capacitor voltages and inductor currents. Using N as the order of the circuit (number of L’s and/or C’s), M as the number of inputs, and K as the number of outputs, the arrays have the following dimensions (in {row column} format): Array A B D E G x u I
Rows N N K K K N M N
Columns N M N M N 1 1 N
Introduction
5
Using dimensional notation, {row col}, y is {K N}{N N}{N M} + {K M} = {K M}. Then, y is a transfer matrix with the dimensions {K M} or {output input} Note that in multiplying matrices, the inner dimensions in {row col} order must be the same. That is, if A is {N N} and B is {N M}, they cannot be multiplied as BA because {N M}{N N}, the inner dimensions, do not match. But they can be multiplied as AB = {N N}{N M}. The dimension of the product is the outside dimensions of both, i.e., {N M}. Hence, the dimension of the product {K N}{N N}{N M} is {K M}, which can be added to E = {K M} (The two arrays are then said to be “conformable” for multiplication if the inner dimensions are the same, and they are conformable for addition if the dimensions are equal.)
1.1.3 GENERAL GUIDELINES The SPICE node list text format is Ref Desig From node To node Component value. An example would be R3 6 9 10K. The node lists used in the NDS method are arrays of the form [From node To node Ref Desig], the component value having been specified prior to node list creation. Node numbering must start with 1 and be in numerical sequence up to 89. Nodes 99, 98, …, 91, 90 are reserved for inputs, and node 0 is for ground. There is no requirement for the resistor node list as to node sequence. That is, [4 5 R1] and [5 4 R1] are both accepted. For the capacitor node list and the inductor node list, however, the sequence must correspond to Kirchoff’s current law (KCL): current flow from left to right and from top to bottom. Hence, [3 6 C1] will work, but [6 3 C1] may give the wrong phase angle output and incorrect output polarity in DC and transient analyses. The open loop gain of opamps is set at 106 V/V or 120 dab. In the majority of circuit examples, no opamp frequency rolloff is used. However an example is given on how to create an opamp with rolloff using voltage-controlled voltage sources (VCVSs) (see Section 3.7 and Section 3.8). The Mathcad file in Section 3.18 demonstrates how to embed the opamp rolloff models into circuits, much like subcircuits in SPICE. Component values should generally be kept within the bounds of 1E+12 and 1E–12. Numbers outside this range run the risk of excessively increasing the A matrix condition number. This will cause solution accuracy to diminish. A guideline that can be used is the number of decimal places of accuracy, which is 15 – log10 × (condition number). If a solution appears incorrect or unreasonable, the condition number of matrix A should be checked using the Mathcad statement floor(15log(conde(A))). The reference paths for the subprogram files are localized for the author’s computer. In creating new files, the user must click on Insert, then on Reference, and then enter the correct local path or go to Browse. Two of the most important Mathcad subprogram files are named as follows: For DC: dccomm42.mcd (creates A1 and B2 arrays) For AC: comm42.mcd (creates A, B, D, and E arrays)
6
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
All of the necessary Mathcad subprograms are contained in the included CD. There is no error trapping. Users must ensure that the node lists correctly represent the circuit being analyzed and that all required input arrays are included. The version of the software used is Mathcad 11.0. (Note that due to internal bugs in Mathcad 8.0, some files will not run on that version. Intermediate versions have not been tested.) Some mathematical ability will be helpful for some advanced subjects such as the theory of the NDS method (Appendix I), stability analysis, Leverrier’s algorithm, and transient analysis.
1.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS The passive RCL circuit used to demonstrate the procedure is shown in the following figure: L3 R1
V1
C1
V2
R2
V3
Ein R4
1.2.1 RULES
AND
R3
C2
L4
DEFINITIONS
Calculated using the Mathcad subprogram file comm42.mcd: Ncap = number of capacitors Nind = number of inductors N = Ncap + Nind M = number of independent inputs (= 1 here, but can be up to 10) K = number of outputs (= 1, but can be up to U) User input: U = number of unknown nodes (= 3 here). Y = output node (can be any or all of the three nodes V1, V2, or V3). Number nodes sequentially from 1 to U (V1, V2, V3,…); 0 is ground. Maximum value of U = 89. Independent voltage input nodes are numbered from 99, 98, …, 90. (Note that if only one input source is present, use 99 as the node number; if two inputs, use 99, 98; if three inputs, use 99, 98, 97, etc.) Component reference designator sequence is optional. It can be R1, L2, Ra, Cx, R301, etc. A sequential numbering has been used for convenience.
Introduction
7
For AC analysis, log frequency sweep: BF = Beginning log frequency = 10BF Hz ND = Number of decades from BF PD = Points per decade Total number of frequency points NP = ND·PD + 1 Linear frequency sweep BF = Beginning frequency in Hz LF = Last frequency in Hz DF = Frequency increment LF − BF +1 DF Using the RCL circuit, creating the node lists is just as easy as in early versions of SPICE. For the resistors, we create the array RR: Total number of frequency points NP =
99 1 RR = 2 3
1 2 3 0
R1 R 4 R2 R3
The first column is one of the two nodes that the resistor is connected to, whereas the second column is the other node. The last column is the reference designator for the resistor, the value of which has been given previously. For the capacitors, we create the array CC: 1 CC = 3
2 0
C1 C2
For the inductors, we similarly create the array LL: 1 LL = 3
2 0
L3 L 4
The inputs are listed in the array Ein as Ein = (99 1). The first number indicates the node and the second, the amplitude in volts, which is usually set to 1. All independent inputs are referenced to ground. Because this circuit is passive with no controlled sources, this must be shown for VCVSs as EE = 0. No Voltage-Controlled-Current (VCCS) is shown as GG = 0.
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
REFERENCES 1. Seminal information for the method was obtained from DeRusso, P.M., Roy, R.J., and Close, C.M., State Variables for Engineers, John Wiley, NY, 1965.
2
Passive Circuits
2.1 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART ONE) Analysis with output plots. Unit suffixes: K := 103
u := 10–6
m := 10–3
L3 R1
V1
C1
V2
R2
V3
Ein R3
R4
C2
L4
Component values: R1 := 10 C1 := 0.1·u
R2 := 100 C2 := C1
R3 := 50·K f1 := 10·K
R4 := 10·K f2 := 100·K
f1 and f2 are resonant frequencies for the values of L3 and L4. Calculate L3 and L4: L 3 :=
1
( 2 ⋅ π ⋅ f1) ⋅ C1 2
L 4 :=
1
( 2 ⋅ π ⋅ f 2 ) ⋅ C2 2
The eight inputs required for the subprogram comm42.mcd are: U, Y, EE, GG, RR, CC, LL, and Ein (see previous definitions). U := 3 Three unknown nodes. Y := 3 Take the output from node 3, V3.
9
10
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Set up node list arrays: Ein := (99 1) 99 1 RR : = 2 3
1 2 3 0
R1 R4 R2 R 3
(Ein = 1 V at node 99)
1 CC : = 3
EE := 0 (No VCVSs)
2 0
C1 C2
1 LL : = 3
2 0
L 3 L 4
GG := 0 (No VCCSs)
Insert reference for subprogram file comm42 to get state space arrays A, B, D, and E: → Reference:C:\mcadckts\CaNL11\comm42.mcd Display arrays: −91909.09 −90909.09 A= 394.78 0
−90909.09 −91109.009 0 39478.42
−1 × 10 7 0 0 0
0 −1 × 10 7 0 0
90909.09 90909.09 B= 0 0 D = (0
1
0)
0
E = (0) DC Analysis dx dx = Ax + B, the DC value is obtained by setting = 0. Then AX = −B and dt dt X = −A−1⋅B where the uppercase X is used for DC. Mathcad’s lsolve function provides the solution. When B has more than one column, the explicit solution form X = −A−1⋅B must be used. In
X : = 1solve(− A, B) VC1 VC 2 XT = ( 0
0
IL 3 9.091
IL 4 9.091) m
That is, IL3 = IL4 = 9.091 mA. The capacitors are short-circuited by the inductor.
Passive Circuits
11
DC output voltage at node Y: Y = 3 Vodc := D·X + E Vodc = (0) DC node voltages (inductors open-circuited) Vdc := 1solve(A11, A14) VdcT = (1 0.833 0.832) Ein1,2 ⋅ R 3 = 0.832 R1 + R 2 + R 3 + R 4
Confirming the last entry in vector Vdc: AC Analysis BF := 3
ND := 3
Li := BF +
i −1 PD
PD := 40
NP := ND·PD + 1
s := 2·π·10L· −1
i := 1..NP
cvi := D(si·I – A)–1·B + E
180 ·arg(cvi) π Note the two resonant frequency cusps at f1 and f2. Voi := db(cvi)
Vai :=
Output magnitude at node Y
0
Y=3
dBV
−20 Voi
−40 −60 −80
3
3.5
4
4.5
5
5.5
6
Li Log freq(Hz)
Phase angle at node Y
180 150 120 Degrees
90 (Vai)1
60 30 0 −30 −60 −90
3
3.5
4
4.5 Li Log freq(Hz)
5
5.5
6
12
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
2 Now take the output from both nodes 2 (V2) and 3 (V3): Y := 3 Call the subprogram comm42 again to get the new D and E arrays. → Reference:C:\mcadckts\CaNL11\comm42.mcd
−91909.091 −90909.091 A= 394.784 0
−90909.091 −91109.091 0 39478.418
0 −1 × 10 7 0 0
−1 × 10 7 0 0 0
90909.091 90909.091 B= 0 0 −0.909 D= 0
0.091 1
0 0
0 0
0.909 E= 0
Note that only D and E have changed. Sample of cv (complex value) for one output: cv10 = (0.001 + 0.002i) Dimension = {K M} = {1 1} Get the new AC outputs and plot: cvi = D·(si·I – A)–1·B + E 0.855 − 0.213i Sample of cv for two outputs: cv10 = 0.001 + 0.002 i Dimension = {K M} = {2 1} Plot both: Vo 2 i : = db ( cvi )1 Vo 3i : = db ( cvi )2
Passive Circuits
13 Output magnitude at node Y
0
2 Y = ( 3)
dBV
−20 Vo2i Vo3i
−40 −60 −80
3
3.5
4
V2 V3
4.5 Li
5
5.5
6
Log freq(Hz)
We can plot the ratio of V3 to V2 as follows: ( cvi )2 Vo 32 i : = db ( cvi )1
Va 32 i : =
( cvi )2 180 ⋅ arg π ( cvi )1
Magnitude of V3/V2
0
dBV
−20 Vo32i −40 −60 −80
3
3.5
4
4.5 Li
5
5.5
6
5
5.5
6
Log freq(Hz) Phase of V3/V2
180 120
Deg
60 Va32i
0 −60 −120 −180
3
3.5
4
4.5 Li Log freq(Hz)
14
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Introduction to NDS Method — SPICE Verification VEin 99 0 AC 1 R1 99 1 10 R4 1 2 10K R2 2 3 100 R3 3 0 50K * C1 1 2 0.1u C2 3 0 0.1u * L3 1 2 2.533m L4 3 0 25.33u * .PRINT AC V(2) V(3) VP(3) V(3,2) VP(3,2) .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .END Extracting the data from the SPICE *.out file and plotting: Fnom := READPRN(“c:\SPICEapps\datfiles\intro3.txt”) N := rows(Fnom) N = 151 k := 1..N
Spice verification - magnitude
0
dBV
−20 db(Fnomk,2) db(Fnomk,3)
−40 −60 −80
3
3.5 V2 V3
4
4.5 log(Fnomk,1) Log freq(Hz)
5
5.5
6
Passive Circuits
15 Spice verification - phase angle
180 150 120 Deg
90 Fnomk,4
60 30 0 −30 −60 −90
3
3.5
4
4.5
5
5.5
6
log(Fnomk,1) Log freq(Hz)
For further verification, we compare the accuracy of the A and B arrays obtained from the NDS method to that obtained from the algebraic solution in Section 2.2. Ax and Bx, shown in the following, are from that section. −1 1 1 C1 ⋅ R 4 + R1 + R 2 −1 C 2 ⋅ R 1 + R2) ( Ax := 1 L 3 0 −91909.09 −90909.09 Ax = 394.78 0 0 0 A − Ax = 0 0
0 0 0 0
0 0 0 0
−1 C1 ⋅ ( R1 + R 2 )
−1 C1
−1 1 1 ⋅ + C2 R1 + R 2 R 3
0
0
0
1 L4
0
−90909.09 −91109.09 0 39478.42 0 0 0 0
−1 × 10 7 0 0 0
0 −1 C2 0 0
0 −1 × 10 7 0 0
16
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
1 C1 ⋅ ( R1 + R 2 ) 0 90909.09 0 1 90909.09 Bx := Bx = B − Bx = 0 0 C2 ⋅ ( R1 + R 2 ) 0 0 0 0
2.2 INTRODUCTION TO NODE LIST CIRCUIT ANALYSIS (PART TWO) K := 103
u := 10–6
The algebraic solution of a sample RCL circuit is given to show the amount of labor saved using the NDS method. For those less mathematically inclined, the next three pages can be skipped. The advantages of the NDS method can be seen just by glancing at the amount of circuit analysis algebra given in the following: L3 R1
V1
C1
V2
R2
V3
Ein
R1 := 10 R4 := 10·K fl := 10·K
R2 := 100 C1 := 0.1·u f2 := 100·K L 3 :=
1
( 2 ⋅ π ⋅ f1)
C2
R3
R4
2
⋅ C1
L4
R3 := 50·K C2 := C1
L 4 :=
1
( 2 ⋅ π ⋅ f 2 ) 2 ⋅ C2
Format goal: eL and iC on LH side; Ein, iL, and vC on RH side. Must only use terms involving these unknowns. We thus need N = Ncap + Nind = 4 equations in the following format including constant coefficients. f(eL, iC) = g(iL, vC, Ein) in which e L = L ⋅
diL dt
iC = C ⋅
dvC dt
We first see that eL3 = vC1
eL4 = vC2
(1)
Passive Circuits
17
which are in the correct format. Two more equations are needed. KCL at node V1: Ein − V1 V1 − V2 = iL 3 + iC1 + R1 R4
V1 − V2 = vC1
(2)
Ein v V1 − iL 3 − C1 − R1 R 4 R1
(3)
Substituting: Ein − V1 v = iL 3 + iC1 + C1 R1 R4
iC1 =
Not done yet; need to eliminate V1. KCL at node V2: iL 3 + iC1 +
vC1 V2 − V3 = R4 R2
We see that: V3 = vC2 Substituting and rearranging: V2 vC 2 vC1 − − − iC1 − iL 3 = 0 R2 R2 R 4
(4)
Solving Equation 4 for V2: V2 = iL 3 ⋅ R 2 + vC 2 +
vC1 ⋅ R 2 + iC1 ⋅ R 2 R4
V1 = vC1 + V2 From Equation 2
(5) (6)
Substituting Equation 5 into Equation 6 V1 = vC1 + iL 3 ⋅ R 2 + vC 2 +
vC1 ⋅ R 2 + iC1 ⋅ R 2 R4
Collecting terms: R2 V1 = vC1 ⋅ 1 + + vC 2 + iL 3 ⋅ R 2 + iC1 ⋅ R 2 R4 Substituting Equation 7 into Equation 3:
(7)
18
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
iC1 =
Ein v v R 2 vC 2 iL 3 ⋅ R 2 iC1 ⋅ R 2 − − − iL 3 − C1 − C1 ⋅ 1 + − R1 R 4 R1 R 4 R1 R1 R1
Collecting terms: R 2 Ein R 2 vC 2 1 R2 1 iC1 ⋅ 1 + = − iL 3 ⋅ 1 + − − vC1 ⋅ + + R1 R 4 R1 ⋅ R 4 R1 R1 R1 R1 From Equation 2: V2 = V1 − vC1 Repeating Equation 5: V2 = iL 3 ⋅ R 2 + vC 2 +
vC1 ⋅ R 2 + iC1 ⋅ R 2 R4
KCL at node V3: V2 − V3 V3 = + iC2 + iL 4 R2 R3 Substituting V3 = vC2 −V2 1 1 + vC 2 ⋅ + + iC 2 + i L 4 = 0 R 2 R 3 R2 Multiplying by –1: V2 1 1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R 2 R 3 R2 Substituting Equation 5: iL 3 +
vC 2 vC1 1 1 + + iC1 − vC 2 ⋅ + − iC 2 − i L 4 = 0 R2 R 4 R2 R 3
Rearranging to the correct format: iC1 − iC 2 = − iL 3 − or finally
vC 2 vC1 1 1 − + vC 2 ⋅ + + iL 4 R 2 R 3 R2 R 4
(8)
Passive Circuits
19
iC1 − iC 2 = − iL 3 +
vC 2 vC1 − + iL 4 R2 R 4
(9)
Create two {N N} arrays W and Q from Equation 1, Equation 8, and Equation 9. Fill in the coefficients from the LH sides for W, and for the RH sides for Q per the column headings: iC1
iC 2
0 0 W := R2 1 + R1 1 vC1 1 0 1 1 R2 Q := − + + 1 4 1 ⋅ R4 R R R −1 R4
eL 3 eL 4
0 0
1 0
0
0
−1
0
0 1 0 0
vC 2
iL 3
iL 4
0 1
0 0
−1 R1 1 R3
R2 − 1 + R1
0 0 0 1
−1
S is created from the only Ein term in the third equation: P is an {N N} diagonal array in the same C and L order as W and Q. 0 0 S := 1 R1 0
C1 0 P := 0 0
0 C2 0 0
Now form A and B as follows: C:= (W·P)–1 −91909.091 −90909.091 A= 394.784 0
−90909.091 −91109.091 0 39478.418
−1 × 10 7 3.492 × 10 −10 0 0
0 0 L3 0
0 0 0 L 4
A := C·Q
B := C·S
90909.091 0 7 90909.091 −1 × 10 B= 0 0 0 0
20
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Because the output is vC2, we place a 1 in the second column of the {K N} array vC1 vC 2 iL 3 D := ( 0
1
0
iL 4 0)
Because there are no input terms Ein in the output: E := 0 Prior to this shortcut method [*], the algebra would have to continue as follows. Isolating iC1 in Equation 8: iC1 =
vC 2 Ein 1 1 − iL 3 − − vC1 ⋅ + R 4 R1 + R 2 R1 + R 2 R1 + R 2
Because iC1 = C1 ⋅ dvC1 − vC1 = dt C1
(10)
dvC1 , we get dt
1 vC 2 i Ein 1 ⋅ + − L3 + − R 4 R1 + R 2 C1 ⋅ ( R1 + R 2 ) C1 C1 ⋅ ( R1 + R 2 )
(11)
From Equation 9: iC 2 = i L 3 − i L 4 +
vC1 vC 2 − + iC1 R4 R3
(12)
Substituting Equation 10 into Equation 12: iC 2 = i L 3 − i L 4 +
iC 2 =
vC1 vC 2 vC 2 1 Ein 1 − − iL 3 − − vC1 ⋅ + + R 4 R1 + R 2 R1 + R 2 R4 R3 R1 + R 2 – vC1 Ein 1 1 − iL 4 + − vC 2 ⋅ + R1 + R 2 R 3 R1 + R 2 R1 + R 2
Again, because iC 2 = C2 ⋅
dvC 2 dt
− vC1 dvC 2 v = − C2 dt C2 ⋅ ( R1 + R 2 ) C2
1 1 iL 4 Ein ⋅ + − + R1 + R 2 R 3 C2 C2 ⋅ ( R1 + R 2 )
From Equation 1 above, repeated here: eL3 = vC1
eL4 = vC2
(13)
Passive Circuits
21
eL 3 = L 3 ⋅
diL 3 , dt
diL 3 vC1 = dt L3
(14)
Similarly: diL 4 vC 2 = dt L4
(15)
Using Equation 11, Equation13, Equation14, and Equation15, the general form matrix equation
dx = Ax + Bu becomes dt
1 dvC1 −1 ⋅ 1 + dt C1 R 4 R1 + R 2 −1 dvC 2 dt C2 ⋅ ( R1 + R 2 ) diL 3 = 1 dt L3 diL 4 0 dt
−1 C1 ⋅ ( R1 + R 2 )
−1 C1
−1 1 1 ⋅ + C2 R1 + R 2 R 3
0
0
0
1 L4
0
1 C1 ⋅ ( R1 + R 2 ) 1 + 2 1 2 ⋅ + C R R ( ) ⋅ Ein 0 0
2.3 ALL-CAPACITIVE CIRCUIT u := 10–6 R3
R1
1
C1
2
Ein C2 3 R2
0 −1 vC1 C2 ⋅ vC 2 iL 3 0 i L4 0
22
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
R1 := 10 U := 3 99 RR := 1 3 tors) EE := 0
R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 2 0
R1 R 3 R 2
C1 := 0.1·u C2 := 0.5·u Input 1 V at node 99.
1 CC := 2
2 3
C1 LL := 0 (No inducC2
GG := 0 (No controlled sources.)
Get A, B, D, and E arrays from subprogram comm42.mcd: → Reference:C:\mcadckts\CaNL11\comm42.mcd −290909.1 A= −18181.8
−90909.1 −18181.8
90909.1 B= 18181.8 D = ( −0.909
0.091)
E = ( 0.909 ) DC voltages at all U nodes in the order given by Vdc. If inductors are present, they are open-circuited: Vdc := lsolve(A11, A14) X := lsolve(–A,B) Vodc := D·X + E Y=2
VdcT = (1
1
0)
0 X= 1 Vodc = (1) DC output voltage at node Y given by Vodc.
AC Analysis BF := 3
ND := 3
i := 1..ND·PD + 1
PD := 40
cvi := D·(si·I – A)–1·B + E 180 ·arg(cvi)1 π (Phase angle) Y=2
Vai :=
i −1 s := 2·π·10L· −1 PD Voli := db(cvi)
Li := BF +
Passive Circuits
23 Magnitude at node Y
Degrees
dBV
−1 Vo1i −2 −3 −4
Phase at node Y
10
0
3
4
5
0
Vai
−10 −20
6
3
4
5
Li
Li
Log freq (Hz)
Log freq (Hz)
2.4 ALL-INDUCTIVE CIRCUIT u := 10–6
mA := 10–3 R3
R1
1
L1
2
Ein L2 3 R2
R1 := 10 U := 3 99 RR := 3 1
R2 := 100 R3 := 50 Y := 2 Ein := (99 1) 1 0 2
R1 R 2 R 3
1 LL := 2
L1 := 220·u
2 3
CC := 0 (No capacitors) EE := 0 GG := 0 (No controlled sources.) → Reference:C:\mcadckts\CaNL11\comm42.mcd
L1 L 2
L2 := 330·u
6
24
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
−2287272.7 A= 151515.2
227272.7 −484848.5
0 B= 3030.3 D = ( 50
−60 )
E = (1) VdcT = (1
Vdc := lsolve(A11, A14) 9.091 X= 9.091
iL1 mA iL 2
1
0)
X := lsolve(–A, B)
Vodc := D·X + E
Vodc = (0.909)
AC Analysis BF := 3
ND := 3
i −1 PD cvi := D·(si·I – A)–1·B + E Voli := db(cvi)
NP := ND·PD + 1
i := 1..NP
s := 2·π·10L· −1 Vai :=
PD := 50
180 ·arg(cvi)1 π
Li := BF +
Y=2
Amplitude at node Y 0
5 Degrees
dBV
−1 Vo1i −2 −3
Phase at node Y
10
Vai
0 −5
3
4
Li
5
6
−10
3
Log freq (Hz)
Li
5
Log freq (Hz)
2.5 TWIN-T RC NETWORK 60-Hz Notch Filter K :=103 u := 10–6
4
Meg := 106
m := 10–3
6
Passive Circuits
25 C2
C3
V1 R3
R4
V4
Ein
R1
R2
V2 C1
V3
R5
R1 := 267·K R2 := 267·K R3 := 133·K R4 := 0.01 C1 := 0.02·u C2 := 0.01·u U := 4 Y :=3 Ein := (99 1) 4 2 RR := 3 1 99
2 3 0 0 4
R1 R2 R5 R 3 R 4
2 CC : = 4 3
0 1 1
R5 := 10·Meg C3 := 0.01·u
C1 C2 C 3
GG : = 0 LL : = 0 EE : = 0
Resistor R4 is the output impedance of the external voltage source. → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis
X := lsolve(–A, B)
0.975 VC1 X = 1 VC 2 0.949 V C3
Vodc := D·X + E
Vodc = (0.949) Ein1,2 ⋅ R 5 = 0.949 (Checks; same as Vodc.) R 4 + R1 + R 2 + R 5 DC node voltages: Vdc := lsolve(A11, A14) V1 Vdc T = ( 0
V2
V3
0.975
0.049
V4 1)
Note: The reader is encouraged to reverse 3 1 C3 to 1 3 C3 in the CC array and note the polarity change of VC3 above. Sign changes in the D array cancel the VC3 sign change and the output Vodc polarity remains the same. In SPICE the state variables X and the A, B, D, E arrays are not accessible. As will be seen later, access to these arrays can be useful.
26
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
AC Analysis BF := 0 DF :=
LF := 100
LF − BF NP
NP := 100
i := 1..NP + 1
s := 2·π·F· −1
DF = 1
(Linear frequency sweep) Fi := BF + DF·(i – 1)
cvi := D·(si·I – A)–1·B + E
180 ·arg(cvi) π Note: Most math software and scientific calculators limit phase angles of complex numbers to +/– 180 deg, or π+ to –π. SPICE phase angle outputs can be from 0 to + 360 (2 ) or 360 deg. For example, +300 deg is equivalent to –60 deg; –200 deg is equivalent to +160. Both are correct. Voli := db(cvi)
Vai :=
Output plots Y=3 Magnitude at node Y
0
dBV
−20 Voi −40
−60
0
10
20
30
40
50 Fi
60
70
80
90
70
80
90
100
Freq(Hz) Phase at node Y
100
Deg
50 (Vai)1
0 −50 −100
0
10
20
30
40
50 Fi Freq(Hz)
60
100
Passive Circuits
27
2.6 BROADBAND PULSE TRANSFORMER MODEL K := 103
p := 10–12
u := 10–6
n := 10–9
R6 R1
1
R2
6
L1
2
m := 10–3
R4
3
C2 4
L3
5
Ein C1
R7
R3
R5 L2
7
R1 := 10 R6 := 0.5 L2 := 2·m U := 7
R2 := 1.5 C1 := 20·p L3 := 1·u Y := 5
R3 := 20·K C2 := 5·p R7 := 1
Ein := (99
10)
99 1 3 RR := 3 5 1 3
C3
R4 := 1.5 C3 := 20·p
R5 := 1·K L1 := 1·u
10 Vac input. 1 2 0 4 0 6 7
R1 R2 R 3 R 4 R5 R6 R 7
1 CC : = 6 5
0 5 0
C1 C2 C 3
2 LL : = 7 4
3 0 5
L1 L2 L 3
EE : = 0 GG : = 0 L1 and L3 represent leakage inductance; L2 is the magnetizing inductance. Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd
28
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
DC Analysis X := lsolve(–A,B) X Format: VC1
(
X T = 1.999
VC 2
VC 3
IL 1
IL 2
1, 201
0.7 798
0.8
0.799
Vodc := D·X + E
IL 3 7.98 × 10 −4
)
Vodc = (0.798)
Note that this DC analysis is certainly easier than deriving the following algebraic solution: Vdc5 : =
Ein1,2 ⋅ R 5 R1 + R 2 1 + ⋅ (R 4 + R5) (R 4 + R5) ⋅ R 3 ⋅ R 7 ⋅ + + ⋅ + R 3 R 7 R 4 R 5 R 3 R 7 ( )( )
Vdc5 = 0.798 DC node voltages (inductors open-circuited): VdcT = (10
Vdc := lsolve(A11, A14)
10
0
0
0
10
0)
AC Analysis BF := 2
ND := 6
i := 1..ND·PD +1
PD := 30 Li := BF +
cvi := D·(si·I – A)–1·B + E
i −1 PD
rd :=
s := 2·π·10L· −1
180 π
Voi := db(cvi) Vai := rd·arg(cvi) Note flat response from about 1 KHz to 10 MHz. Output amplitude at node Y
40
dBV
20 Voi
0 −20 −40
2
3
4
5 Li Log freq(Hz)
6
7
8
Passive Circuits
29 Phase at node Y
200 150 Degrees
100 50 (Vai)1
0 −50 −100 −150 −200
2
3
4
5 Li Log freq(Hz)
6
7
Broadband Pulse Transformer — SPICE Verification *File: c:\SPICEapps\Cirtext\xformer.cir VEin 99 0 AC 10 R1 99 1 10 R2 1 2 1.5 R3 3 0 20K R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20p C2 6 5 5p C3 5 0 20p * L1 2 3 1u L2 7 0 2m L3 4 5 1u * .AC DEC 20 100 1E8 .PRINT AC V(5) VP(5)
8
30
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
.OPTIONS NOMOD NOPAGE NOECHO .END Extracting the data from the SPICE *.out file: Fnom := READPRN(“c:\SPICEapps\datfiles\xformer.txt”) N := rows(Fnom) N = 121 k := 1..N Output amplitude at node Y
40
dBV
20 db(Fnomk,2)
0 −20 −40
2
3
4
5
6
7
8
Degrees
log(Fnomk,1) Log freq(Hz)
Fnomk,3
200 150 100 50 0 −50 −100 −150 −200
Phase at node Y
2
3
4
5 log(Fnomk,1) Log freq(Hz)
6
7
8
2.7 ALL-CAPACITIVE LOOPS (ACL) In a physical circuit, two or more capacitors in parallel can occur, such as in power supply decoupling circuits. However, in converting capacitors to ideal independent voltage sources (which is done using this method of analysis), we end up with a violation of Kirchoff’s laws. For example, in the circuit that follows:
C1
C2
C3
+ −
E1
+ −
E2
+ −
E3
Passive Circuits
31
If we assign arbitrary values to E1, E2, and E3, Kirchoff’s Voltage Law (KVL) is violated around any of the three possible loops. If we assign the value of +1 V to all three, because the resistance is zero, infinite current will flow around the loops unless all assigned values of 1.0 have an infinite number of zeros after the decimal point, e.g., if E1 – E2 = 10–9000 V divided by zero resistance is infinite current. Another example of an ACL is: C2
C1
C3
When converted to ideal voltage sources, KVL is again violated. For example, if the arbitrary values were C1 = E1 = 10 V, C2 = E2 = 7 V, and C3 = E3 = 20 V, KVL yields –10 + 7 + 20 = +17 V ≠ 0. Every “real-world” capacitor has a small amount of series resistance, termed equivalent series resistance (ESR). The cure in state space analysis of circuits with ACLs is to place a small ESR resistor (≈ 0.01 Ω) in series with all (or all but one) of the capacitors. E1
+ −
R2
R1
E2
+ −
E3 The cure
+ −
R3
2.8 ALL-INDUCTIVE CUTSETS (ICS) A similar problem occurs with circuits having two or more inductors connected to the same node. In this analysis method, the inductors become ideal current sources connected to the same node, and we end up with a violation of Kirchoff's Current Law (KCL), as shown in the following: L1 L2
I1 V1
L3
I2
+
−
+
−
V1 I3
+
−
Kirchoff’s Current Law at node V1 is I1 + I2 = I3. This law is violated regardless of the values of I1, I2, and I3. The term cut set comes from circuit topology. If we were to place a small “cookie cutter” at node V1, it would cut the wires of all three inductors. Thus, we are cutting a set of inductor wires.
32
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
The cure is to place “de-Qing” resistors in parallel with at least one of the inductors as shown in the following. The values to be used will depend on the remainder of the circuit and the desired L/R time constants.
I1
+
I2
+
R1
R3
−
−
R2
The cure I3 V
+
−
In defense of the NDS method, it should be stated that ACLs and/or ICSs will cause any state space analysis method to fail if additional corrective steps are not taken. See, for example, Intermediate Network Analysis, Shlomo Karni, Allyn & Bacon, 1971.
2.9 ALL-CAPACITIVE LOOP EXAMPLE K := 103
u := 10–6
m := 10–3
R1
V1
KHz := 103
C3
V2
Ein C1
R3
C2 V3
L3
R1 := 1·K R2 := 0.1 R3 := 100 C1 := 1·u C2 := C1 C3 := C1 L3 := 25.33·m U := 3 Y := 3 Ein := (99 1) GG := 0 EE := 0 LL := (3 0 L3) 99 RR : = 2 1 CC : = 1 2
1 3 0 2 0
R1 R 3 C1 C 3 C2
Passive Circuits
33
Call reference subprogram: → Reference:C:\mcadckts\CaNL11\comm42.mcd A, B, D, and E are not returned. Due to the ACL, A is singular, i.e., the determinant of A is zero, and the inverse of A is undefined. Insert R2 to break ACL. R1
V1
R2
Ein
C3
V3
V2
R3
C2
C1
V4 L4
99 RR : = 1 3 1 CC : = 2 3 U := 4
Y := 4
LL := (4
0
1 2 4 0 3 0
R1 R 2 R 3 C1 C 3 C2
L3)
Reinsert subprogram for new node lists. → Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2
ND := 2
i := 1..ND·PD + 1
PD := 50 i −1 s := 2·π·10L· −1 PD Voi := db(cvi)
Li := BF +
cvi := D·(si·I – A)–1·B + E
34
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Output at node Y
−20
dBV
−30 Voi −40
−50
2
2.5
3 Li
3.5
4
Log freq(Hz)
Y=4
REFERENCES 1. R. Boyd, State Space Averaging with a Pocket Calculator, High Frequency Power Conversion Conference Proceedings, Santa Clara, CA, 1990, p. 283.
3
Controlled Sources
3.1 CONTROLLED (DEPENDENT) SOURCES 3.1.1 VOLTAGE-CONTROLLED CURRENT SOURCE (VCCS) SPICE convention: Gname Vp Vn Vcp Vcn Transconductance The units of transconductance are amperes/volts = 1/ohms = siemens (or mhos, for you old-timers). Vp and Vn are the node connections of the current source in the circuit. Current flows away from node Vp (into the + terminal of the source) and towards node Vn, going out of the source. Vcp and Vcn are the + and controlling voltage nodes. This convention is chosen because virtually all models of transistors and MOSFETs depict the current as flowing down and internally away from the collector or drain terminal of the device. Example: MOSFET drain current: Id = gm·Vgs = gm(Vg – Vs) Here Vg and Vs are Vcp and Vcn, respectively. Because Id is dependent by definition, it is unknown, as usually are Vg and Vs. In MathCAD, GG = (Vp Vn Vcp Vcn Gain) For a MOSFET, GG = (Vp Vn Vg Vs gm)
3.1.2 CURRENT-CONTROLLED CURRENT SOURCE (CCCS) SPICE convention: Fname Vp Vn Controlling Current Gain In the NDS analysis method, the controlling current is specified as I = f(V/R) Ein − V1 Example: Ic = B ⋅ lb = B R1
3.1.3 VOLTAGE-CONTROLLED VOLTAGE SOURCE (VCVS) SPICE convention: Ename Vp Vn Vcp Vcn Gain As in VCCS, Vp and Vn are the + and connections of the source in the circuit, and Vcp and Vcn are the + and controlling nodes. Example: V1 V2 = k(V3 V4), or in SPICE Ename V1 V2 V3 V4 k In MathCAD, EE = (Vp Vn Vcp Vcn Gain) = (V1 V2 V3 V4 k) For an opamp, which is usually a single-ended output, Vo = Ao(Vcp Vcn), where typically Ao = 106 V/V. For an inverter, Vcp = 0. For a voltage follower, Vo is connected to Vcn and
35
36
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Vo − AoVcp + AoVo = 0, Vo (1 + Ao ) = AoVcp Vo =
AoVcp Ao = Vcp, since ≈1 1+Ao 1 + Ao
and in MathCAD as EE = (Vo 0 Vcp Vcn Ao) = (Vo 0 Vcp Vo Ao)
3.1.4 CURRENT-CONTROLLED VOLTAGE SOURCE (CCVS) SPICE convention: Hname +V –V Controlling Current Transresistance The units of transresistance are volts/amperes = ohms. Only two types are used in NDS method, the VCVS and the VCCS. Conversions from the remaining two are easily accomplished as shown in the following subsections.
3.1.5 CCVS
TO
VCVS
To convert a CCVS to a VCVS, divide the controlling current nodes by the resistance in the controlling current branch. (This “resistance” could be that of a printed circuit board trace or wire, or a small current-sensing resistor.) Example: Assume the controlling current Ic is through a resistor or resistance R2, which is connected to nodes V2 and V1. Then V2 − V1 Rc Vh = Rc ⋅ Ic = Rc = (V2 − V1) Gain = Rc / R2 R 2 R 2 The gain is thereby converted from a “transresistance” in dimensions of ohms, to a dimensionless gain. MathCAD format: EE = (Vp Vn Vcp Vcn Gain) = (Vh 0 V2 V1 Rc/R2), which is very similar to the SPICE format.
3.1.6 CCCS
TO
VCCS
To convert a CCCS to a VCCS, divide the (dimensionless) gain by the resistance of the “controlling current.” Example: B Ein − V1 Ic = B ⋅ lb = B = ( Ein − V1) R1 R1 The controlling voltage is now Ein – V1, and the “gain,” with dimension 1/ohms or “transconductance,” is B/R1. In MathCAD format, GG = (Vp Vn Vcp Vcn Gain) = (Vp Vn Ein V1 B/R1).
Controlled Sources
37
To repeat, the first input Ein is given the node number 99. For a second input, Ein2 = 98, Ein3 = 97, etc., down to 90. For example, if Vp = 2, Vn = 1, Vcp = 99, Vcn = 1, then GG = (2 1 99 1 B/R1).
3.1.7 FOUR RULES THAT MUST BE OBSERVED 1. The output of a controlled source cannot be connected directly to an independent input source. That is, EE = (99 0 2 1 gain) is not allowed. Input voltage sources are specified, for example, as Ein = (99 5), the input connected from node 99 to ground, with an amplitude of +5 V. However, EE = (2 0 99 1 gain), one input being a controlling node, Vcp or Vcn, is allowed. Here and as earlier, “99” represents any of the nodes 99, 98, 97, … , etc., down to 90. An independent source can be created by having Vcp = 99, 98, etc., and Vcn = 0. For example, assume Ein = (99 5), and it is desired to connect an independent 15-mA current source at an internal node V2 to node V7. Then GG = (2
7
99
0
0.015/5)
For an independent 15 V source at the same nodes: EE = (2 7 99 0 15/5) 2. Vp in a VCVS is not allowed to be zero. That is, the output nodes of a VCVS must always be (Vp 0) or (Vp Vn). For example, EE = (0 2 3 0 gain) is not allowed. If a negative output is desired, use EE = (2 0 3 0 – gain) or EE = (2 0 0 3 gain). 3. If a capacitor C or inductor L in the circuit being analyzed is connected directly to an ideal input source, it must have an equivalent series resistance (ESR) resistor in series between it and the source. That is CC = (99 1 C1) or LL = (98 2 L1) are not allowed. This will be a minor inconvenience as every real-world capacitor and inductor has an ESR. Also, every real-world voltage source has some finite internal source impedance which includes resistance. Hence, the simulation will be more realistic with ESR included. If in doubt about what value of ESR to use, use 0.01 Ω for capacitors and 0.05 Ω for inductors. 4. The nodes Vp or Vn of two or more VCVS’s (EE) must not be common. That is 2 EE = 2
1 0
12 3
4 4
4 2
is not allowed. In the NDS method, this results in “node contention,” and the solution will not be correct. As in SPICE, every circuit must have at least one ground node (node 0).
38
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.2 FLOATING VCVS K := 103
uF := 10–6
m := 10–3
R1
uV1
V1
V2
− +
Ein C1
Gain of VCVS.
99 2 RR : = 2 3 LL := 0
Ein := (99
R1 R2 R 3 R 4
2)
R4
R4 := 2·K Y := 3
180 π
rd :=
1 0 3 0
V3 C2
R2
R1 := 1·K R2 := 3·K R3 := 4·K C1 := 0.01·uF C2 := 0.05·uF U := 3 u := 20
R3
1 CC : = 3
0 0
C1 C2
GG := 0
VCVS equation: uV1 = V2 – V1 or V2 = V1·(1 + u) Format: EE = (Vp
Vn
Vcp
Vcn gain), then: EE := (2
1
1
→ Reference:C:\mcadckts\CaNL11\comm42.mcd −1.325 × 10 6 A= 105000 D = (0
1)
25000 −15000
200000 B= 0
E = (0)
DC Analysis X := lsolve(–A, B) Vodc = (1.217)
XT = (0.174
1.217)
Vodc := D·X + E
DC node voltages: Vdc := lsolve(A11, A14)
VdcT = (0.174
3.652
1.217)
0
u)
Controlled Sources
39
Check VCVS equation: Vdc2 – Vdc1 = 3.478
u·Vdc1 = 3.478
Checks.
AC Analysis BF := 2
ND := 5
PD := 20
Lit := ND·PD + 1
i :=1..Lit
i−1 s := 2·π·10L· −1 db(x) := 20·log(|x|) PD cvi := D·(si·I – A)–1·B + E Voi := db(cvi) Vai := rd·arg(cvi)
Li := BF +
Plot marker: M1 := db(Vodc)
Y=3 Magnitude at node Y
20 M1
dBV
0
Voi
−20 −40 −60 −80
2
3
4
5 Li Log freq(Hz)
6
7
Phase at node Y
0
Deg
−45 (Vai)1
−90 −135 −180
2
3
4
5 Li Log freq(Hz)
6
7
40
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
SPICE Verification — Floating VCVS *File:
c:\Spicapps\Cirtext\vcvs1c.cir
VEin 99 0 AC 2 R1 99 1 1K C1 1 0 0.01u R2 2 0 3K R3 2 3 4K C2 3 0 0.05u R4 3 0 2K * EE 2 1 1 0 20; VCVS .AC DEC 20 100 1E7 .PRINT AC V(3) VP(3) .OPTIONS NOPAGE NOMOD NOECHO .END Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs1c.txt”) N := rows(Fnom) N = 101 k := 1..N
Spice V3 magnitude
20
dBV
0 db(Fnomk,2)
−20 −40 −60 −80
2
3
4 5 log(Fnomk,1) Log freq(Hz)
6
7
Controlled Sources
41 Spice V3 phase angle
0
Deg
−45 Fnomk,3
−90 −135 −180
2
3
4
5
6
7
log(Fnomk,1) Log freq(Hz)
3.3 CIRCUITS WITH M > 1 The subprogram that constructs the A, B, D, and E arrays from the node lists also counts the number of rows in the Ein array and assigns this value to M. In most cases, the user is interested in the node voltages with all inputs active. In some cases, however, the separate superposed contribution of each independent input may be desired. Hence, there are two different subprograms to call, depending on the type of output desired. For DC, call dccomm42.mcd if the user wants all inputs active simultaneously. (Most frequently used.) Call dccomm42m.mcd if the separate contribution of each independent input, M > 1, one at a time, is desired. For AC, call comm42.mcd for all inputs active, and comm42m.mcd to separate the node voltages due to the M > 1 inputs. For a simple example, we use one “circuit” with M = 3 inputs and U = 3 unknown nodes: Ein1 Ein 2 Ein 3 0.1 A 3 : = −0.01 0
−0.01 0.2 −0.02
0 −0.02 0.3
1 B3 : = 0 0
Ein1
Eiin 2
10.05 V3 : = A 3 ⋅ B3 V3 = 0.51 0.03
1.01 10.12 0.67
−1
0 2 0
0 0 3
Ein 3 0.1 V1 1.01 V2 10.07 V3
42
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
The aforementioned is what is returned if dccomm42m.mcd is called. The separate contributions of each column (independent input) in B3 is given. When this is not desired, calling dccomm42.mcd gives −0.01 0.2 −0.02
0.1 A3 : = −0.01 0 V1 : = A 3−1 ⋅ B1
0 −0.02 0.3
1 B1 : = 2 3
11.16 V1 V1 = 11.64 V2 10.78 V3
We could get the same answer by adding the columns of V3, but this requires additional statements in the worksheet. i : = 1..3 V1i : = V3i,1 + V3i,2 + V3i,2 + V3i,3 11.16 V1 = 11.64 10.78 For circuits in which M = 1, i.e., Ein array has one row, it does not matter which subprogram is called. This applies only to those circuits with more than one input, where Ein has more than one row and M > 1. Example DC circuit with M = 2: K := 103 R7
V99 R1
V1
R3
V2
R4
V3
Ein1
R8
V98
Ein2 R2
R5
R6
Controlled Sources
43
99 Ein : = 98
15 −5
99 1 1 2 RR : = 2 3 1 3
1 0 2 3 0 0 3 98
1⋅ K 1⋅ K 1⋅ K 1 ⋅ K 10 ⋅ K 1⋅ K 1.5 ⋅ K 1⋅ K
R1 R2 R3 R4 R5 R6 R7 R8
GG := 0 EE := 0 U := 3 Inputs separate. (M = 2) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Va : = A1−1 ⋅ B2 Ein1 5.3936 Va = 3.4884 1.9320
Ein 2 –0.6440 V1 −1.1628 V2 −1.7979 V3
In SPICE, one of two inputs would have to be zeroed, which requires two runs to get the same information as given earlier. If M = 3, SPICE would require three runs, and so forth. Inputs added. (M = 1) → Reference:C:\mcadckts\CaNL11\dccomm42.mcd Vb : = A1−1 ⋅ B2 4.7496 Vb = 2.3256 0.1342 Va1,1 + Va1,2 = 4.7496 etc.
44
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.4 FIRST-ORDER MOSFET MODEL K := 103
u := 10–6
n := 10–9
p := 10–12
mA := 10–3
Edd R4 V4
R1
V1
R5
V5 C3
M1
Eg R2 V2 C1
V3
R3
R1 := 4.99·K R5 := 1.96·K
R2 := 1·K C1 := 0.1·u
R3 := 10·K C3 := 4.7·n
R4 := 4.99·K
From MOSFET data sheet: gm := 0.001 Edd := 200 Eg := 20 Nodes: V1 — Gate; V3 — Source; V4 — Drain Model using VCCS: C2 := 400·p C2 represents the internal gate-source capacitance. (Nonlinear in higher-order models.) R1
Edd
V1
Eg
R4 R2 C1
C2
V2
V3
R3
V4 R5 + g1 −
V5 C3
Controlled Sources
45
(VCCS g1 is drain current Id) VCCS: gl = gm·Vgs = gm·(V1 – V3) VCCS format: GG = (Vp Vn Vcp Vcn GG := (4 3 1 3 gm) Eg = 20 Edd = 200
gain)
99 1 RR := 3 98 4 2 CC : = 1 5
R1 R2 R 3 R 4 R 5
1 2 0 4 5
C1 C2 C 3
3 3 0
Eg Edd
99 Ein : = 98 LL : = 0 U := 5 Y := 4
→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis VC1 VC2 VC3 DC voltages across C1, C2, and C3 X := –A–1·B
XT := (1.82
1.82
190.93)
DC output: Vodc := D·X + E
Vodc = (190.93)
DC voltage at all nodes: Vdc := A11–1·A14 Drain current Id: Vgs := Vdc1 – Vdc3
VdcT = (20
20
Vgs = 1.818
18.128
190.93
Id := gm·Vgs
1.82 × 10–3)
Id = 1.82mA
46
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Id := Vdc6 Id = 1.82mA = Vodc. Checks.
V4 := Edd – Id·R4
V4 = 190.93
AC Analysis BF := 2 Li := BF +
ND := 4 i−1 PD
PD := 25
Lit := ND·PD + 1
s := 2·π·10L· −1
i := 1..Lit
cvi := D·(si·I – A)–1·B + E
Voi := |cvi| Drain voltage V4
200
Y=4
Volts
150 Voi
100 50 0
2
3
4 Li Log freq(Hz)
5
6
mA := 10–3
n := 10–9
3.5 VCVS AND CCCS EXAMPLE K := 103
u := 10–6
m := 10–3
Hybrid-pi model of the Bipolar Junction Transistor (BJT). C1
l1 R1
R3
V1
V4
Ein R2 + −
V2 V3 R5
+ g1 −
R4
C2
Controlled Sources
R1 := 100 R5 := 10
47
R2 := 10 C1 := 80·n
R3 := 40·K C2 := 5·n
R4 := 2·K
Controlled source gains:
hre := 0.004
hie := 100
rd :=
180 π
99 1 RR := 1 4 3
1 2 4 0 0
R1 R2 R 3 R 4 R 5
1 CC : = 4
4 0
C1 C2
LL : = 0 Ein : = ( 99
0.1)
U := 4 Y := 4 VCVS: V2 – V3 = hre·(V1 – V4) Format for EE: EE = (Vc
Vn
Vcp
Vcn
gain)
then EE := (2
3
1
4
hre)
Convert g1 CCCS to a VCCS. g1 = hie ⋅ I1 I1 =
Ein − V1 hie g1 = ⋅ ( Ein − V1) R1 R1
48
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
GG = ( Vp
Vn
Vcp
Vcn
GG = 4
0
99
1
GG = ( 4
0
99
1
gain ) hie R1
1
)
→ Reference:C:\mcadckts\CaNL11\comm42.mcd −747812.5 A= 188040000
−75000 187900000
12500 B= −19800000 D = (0
1)
E = (0) DC Analysis X := lsolve(–A,B) XT = (24.226 –24.138) Vodc := D·X + E Vodc = (–24.14) Vdc := lsolve(A11,A14) VdcT = (0.09 0.09 –4.79 × 10–3 –24.14 0.01) Igl := Vdc5 Igl = 12.67mA (Igl = current thru souce gl) AC Analysis BF := 1
ND := 7
PD := 20
i := 1..ND·PD + 1
i−1 F := 10L s := 2·π·F· −1 PD Voi := D·(si·I – A)–1·B + E Vai := rd·arg(Voi)
Li : = BF +
NDS results and SPICE verification: Fnom := READPRN(“c:\SPICEapps\datfiles\vcvs_cccs4.txt”) N := rows(Fnom) N = 141 k := 1..N Hybrid-pi BJT Model *File: vcvs_cccs4.cir VEin 99 0 AC 0.1 R1 1 99 100 R2 1 2 10 R3 1 4 40K R4 4 0 2K R5 3 0 10
Controlled Sources
49
* C1 1 4 80n C2 4 0 5n * EE 2 3 1 4 0.004 * B = 100; Gain B/R1 = 1.0 in GG GG 4 0 99 1 1 .AC DEC 20 10 1E8 .PRINT AC V(4) VP(4) .OPTIONS NOECHO NOPAGE NOMOD .END Magnitude at node Y
30
dBV
20 db(Fnomk,2) db(Voi) − 4
10 0 −10 −20 −30
1
2
3
Spice NDS
4 5 log(Fnomk,1), Li Log freq(Hz)
6
7
6
7
8
Y=4 Traces are separated to show congruency. Phase angle at node Y
80 40
Deg
0 Fnomk,3
−40
(Vai)1− 10
−80 −120 −160 −200
1
2 Spice NDS
3
4
5
log(Fnomk,1), Li Log freq(Hz)
8
50
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.6 TWO INPUTS, THREE OUTPUTS K := 103
n := 10–9
R1 Ein1
V1
mA := 10–3
R2
V2
C1
R3
V3
R4
V4
+ GG C2 −
+ EE −
R7
R3 := 1·K R8 := 1·K
Ein2
R4 := 2·K R5 := 2.2·K C1 := 20·n C2 := 4·n
100 50
Gains: gm := 10
C3
R6
R8
Three outputs. 99 Ein := 98
V5
V7
V6
R1 := 1·K R2 := 2·K R6 := 2.2·K R7 := 1·K C3 := 6·n U := 7 Y := (1 3 5)T
R5
a := 5 99 1 2 3 RR := 4 5 6 7 1 CC : = 3 5 LL : = 0
1 2 3 4 5 98 0 0 0 0 0
R1 R2 R 3 R 4 R5 R6 R 7 R8 C1 C2 C 3
Controlled Sources
51
For VCVS EE: V4 – V7 = a·(Ein2 – V2)
EE := (4
7
98
2
a)
3
99
gm)
a=5
For VCCS GG: gl = gm·(V3 – Ein1)
GG := (2
6
gm = 10
→ Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis X : = − A −1 ⋅ B Vdc : = D ⋅ X + E 22.03 Vdc = 100.03 308.96 1 Y = 3 5 Vn : = 1solve ( A11, A14 ) V1
V2
V3
V4
V5
V6
V7
Ig1
Vn T = ( 22.03 – 133.92 100.03 567.93 308.96 311.92 – 351.66 0.331) Igl := Vn8
Igl = 311.92mA
AC Analysis BF := 3 Li := BF +
ND := 3 i−1 PD
PD := 40
i := 1..ND·PD + 1
s := 2·π·10L· −1
cvi := D·(si·I – A)–1·B + E
Sample of the three (complex) outputs: 21.37 − 6.19 i cv5 = 100.03 + 0 i 308.92 – 1.14 i
1 Y = 3 5
52
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Vo1i = db ( cvi )1 Vo 2 i = db ( cvi )2 Vo 3i = db ( cvi ) 3 SPICE Listing — Two In Three Out *File:
c:\SPICEapps\Cirtext\wizard.cir
VEin1 99 0 AC 100 VEin2 98 0 AC 50 * R1 99 1 1K R2 1 2 2K R3 2 3 1K R4 3 4 2K R5 4 5 2.2K R6 5 98 2.2K R7 6 0 1K R8 7 0 1K * C1 1 0 20n C2 3 0 4n C3 5 0 6n * GG 2 6 3 99 10 EE 4 7 98 2 5 .AC DEC 50 1E3 1E6 .OPTIONS NOMOD NOECHO NOPAGE .PRINT AC V(1) V(3) V(5) .OPTIONS NUMDGT 8 .END Fnom := READPRN(“c:\SPICEapps\datfiles\wizard.txt”) N := rows(Fnom) N = 151 k := 1..N
Controlled Sources
53
NDS and SPICE plots: Spice V1 magnitude
dBV
32
db(Fnomk,2)
30 28 26
3
3.5
4
4.5 log(Fnomk,1) Log freq(Hz)
5
5.5
6
NDS V1 magnitude
32
dBV
30 Vo1i 28 26
3
3.5
4
4.5 Li
5
5.5
6
Log freq(Hz)
Spice V3 magnitude
dBV
40.0028
db(Fnomk,3)
40.0024 40.0020 40.0016
3
3.5
4
4.5 log(Fnomk,1) Log freq(Hz)
5
5.5
6
54
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad NDS V3 magnitude
dBV
40.0028
Vo2i
40.0024 40.0020 40.0016
3
3.5
4
dBV
5
5.5
6
Spice V5 magnitude
50
db(Fnomk,4)
4.5 Li Log freq(Hz)
49.6 49.2 48.8
3
3.5
4
4.5 log(Fnomk,1) Log freq(Hz)
5
5.5
6
NDS V5 magnitude
50
dBV
49.6 Vo3i 49.2 48.8
3
3.5
4
4.5 Li Log freq(Hz)
5
5.5
6
3.7 THIRD-ORDER OPAMP MODEL This model has two poles and one zero. K := 103
uF := 10–6
pF := 10–12
MHz := 106
KHz := 103
Controlled Sources
55 R3
R1
1 +
EE1
2
3 +
C1
−
R2 EE2
5 C3 6
4 +
C2
−
R1 := 100
R2 := 100
EE3
−
R3 := 100
7 R4
+
EE4
−
R4 := 10
Pole frequencies: pl := 100
p2 := 1·MHz
Zero frequency C1 :=
zl := 100·KHz
1 2 ⋅ π ⋅ R1 ⋅ p1
Cl = 15.915uF
1 1 C 3 := C2 = 1591.549pF 2 ⋅ π ⋅ R 2 ⋅ p2 2 ⋅ π ⋅ R 3 ⋅ z1 C3 = 0.016uF U := 7 Y := 7 Ein := (99 1) Ao := 106 C2 :=
Third-stage transfer function: 1 R 3 ⋅ C3 F (s) = 1 s+ Rp ⋅ C 3 s+
Rp :=
R3 ⋅ R4 R3 + R4
Pole
Zero 1 log =5 2 ⋅ π ⋅ R 3 ⋅ C 3 1 3 RR := 5 6 LL := 0
2 4 6 0
R1 R2 R 3 R 4
1 log = 6.041 2 ⋅ π ⋅ Rp ⋅ C 3
2 CC := 4 5
0 0 6
C1 C2 C 3
GG := 0
56
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
1 3 EE := 5 7
0 0
99 2
0 0
0
4
0
0
6
0
1 1 R3 1+ R4 Ao
Note EE3 gain.
→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 1
ND := 6
i−1 PD Voi := db(cvi) Li := BF +
PD := 25
i := 1..ND·PD + 1
s := 2·π·10L· −1
cvi := D·(si·I – A)–1·B + E
Opamp open loop gain
140 120
dBV
100 Voi
80 60 40 20 0
1
2
3
4 Li Log freq(Hz)
5
Note zero at 105 Hz; and double pole at 106 = 1 MHz
3.8 A SUBCIRCUIT SCHEME Opamp model using both inverting and noninverting inputs K := 103
uF := 10–6
Differential Amplifier
nF := 10–9
MHz := 106
6
7
Controlled Sources
57
R2 R1
6(Vn) 2 −
Ein1 R3
11 V− 1
V+
7(Vp) 3 +
Ein2
5(Vo)
4
R4
Use the linear two-pole opamp model on page 58. R1 := 10·K R2 := 20·K R3 := 10·K CC := 0 GG := 0 LL := 0 99 98 RR := 6 7 Vo := 5
6 7 5 0
R1 R 3 R2 R 4
Vn := 6
99 Ein := 98
R4 := 20·K
−1 1
Vp := 7
Input nodes to subckt6.mcd Y := Vo
U=7
→ Reference:C:\mcadckts\CaNL11\subckt6.mcd → Reference:C:\mcadckts\CaNL11\comm42.mcd A1 := A
B1 := B
D1 := D
E1 := E
Save arrays.
Get response for opamp open-loop gain of Ao := 105
EE3,5 := Ao
→ Reference:C:\mcadckts\CaNL11\comm42.mcd A2 := A
B2 := B
D2 := D
E2 := E
Save new arrays.
ND := 3
PD := 50
i := 1..ND·PD + 1
AC Analysis BF := 4
i −1 s := 2·π·10L· −1 PD cv2i := D2·(si·I – A2)–1·B2 + E2 Li := BF +
cv1i := D1·(si·I – A1)–1·B1 + E1
58
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Magnitude at node Y 30
dBV
M1 db(cv1i)
20
Y=5
10 0
db(cv2i) −10 −20 −30 −40
4
4.5
5
5.5 Li Log freq(Hz)
Ao = 10^6 Ao = 10^5
6
6.5
7
Note the difference in high-frequency response with Ao = 10^5.
3.9 SUBCIRCUIT OPAMP MODEL MHz := 106 This file requires inputs from the “calling circuit” in order to provide solutions. These inputs are Vp, Vn, and Vo. Because Vo = V5 is common to the calling circuit, node numbers in the calling circuit must start with V5. Ra
1 +
EE1
2 +
C1
−
f1 := 10 Ca :=
Rb
3 EE2
4 C2
−
−
Ao := 106
f2 := 1·MHz
1 2 ⋅ π ⋅ Ra ⋅ f1
Cb :=
0 0 0
Vp 2 4
RR := stack(RR,RR1)
Vn 0 0
1 1 Ao
CC := CA
EE3
Ra := 10
1 2 ⋅ π ⋅ Rb ⋅ f 2
Ra 1 2 2 0 RR1 := CC1 := 3 4 Rb 4 0 CA = CC1 if no capacitors in main circuit. 1 EE := 3 Vo
5 +
Rb := 10
Vo = V5 Ca Cb
CA : = cc ← CC1 if CC = 0 cc ← stack (CC, CC1) otherwisee cc
Controlled Sources
59
→ Reference:C:\mcadwca\wcaref11\Find_U.mcd Find the maximum number of nodes U.
3.10 FIFTH-ORDER ACTIVE FILTER High Pass K := 103
u := 10–6
n := 10–9
C2 Ein
V1 C1
Meg := 106
V5 V2
R1
R3
V3 C3
R2
V5 C5
R4
R6 3
V4 C4
R5
m := 10–3
2
+
−
4 V+
V6 1
V− 11
R7 V7 R8
R1 := 0.01 R2 := 2·K R3 := 70·K R4 := 140·K R5 := 12·K R6 := 2.7·K R7 := 3.2·K R8 := 10·K C1 := 0.03·u C2 := 0.02·u C3 := 1.9·n C4 := 0.4·n C5 := 0.01·u Ao := 106 U := 7 Y := 6 Resistor R1 (0.01 Ω) serves two purposes: (1) acts as an ESR resistor so that C1 is not connected directly to independent input Ein, and (2) prevents an allcapacitive loop via ground, C4, C5, C2, and C1, and the zero-output impedance of Ein. 99 2 2 3 RR := 4 6 6 7 Ein := (99
1 0 3 4 0 5 7 0 1)
R1 R2 R 3 R 4 R5 R6 R 7 R8 LL := 0
1 2 CC := 3 4 5
GG := 0
2 5 0 0 4
C1 C2 C 3 C 4 C5
60
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
For the opamp: EE format: EE = (Vp Vn Vcp V6 = Ao·(V4 – V7)
Vcn gain) EE := (6 0
4
7
Ao)
→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2
ND :=2
i := 1..ND·PD + 1
PD := 50 i−1 s := 2·π·10L· −1 PD Voi := db(cvi) Y=6
Li := BF +
cvi := D·(si·I – A)–1·B + E
Output magnitude at node Y
10 0 −10 dBV
−20 Voi −30 −40 −50 −60 −70
2
2.2
2.4
2.6
3.11 STATE VARIABLE FILTER K := 103
n := 10–9
Ten outputs: V1 through V10.
2.8
3 3.2 Li Log freq(Hz)
3.4
3.6
3.8
4
Controlled Sources
R3
7
2 R1
C1
2
R2
Ein
61
1 3
11
−
3
V−
C2
4 2
1
V+
+
R4
4 3
−
11 V− 1
V+
+
5
6
R5
2
−
3
+
4
11
7
V−
1
V+ 4 R8
R6
1
9
R7
5
R9
8
2
−
3
+
11
4
R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Ao := 106 GG := 0 LL := 0 5 7
C1 C2
Ein := (99
1)
rd :=
180 π
Get all nodes: Y := (1
2
99 7 2 3 5 RR := 1 5 9 3 8
3 1 2 3 4 6 5 9 10 8 7
4
5
6 7
R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10
8
9
10)T
Opamps :
Vp Vn Vcp Vcn Gain
3 5 EE := 7 10
0 0 0 0
1 0 0 8
2 4 6 9
1
V+ R10
4 CC := 6
10
V−
Ao Ao Ao Ao
7
62
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Note that the DC Analysis has been omitted AC Analysis BF := 3
ND := 1
PD := 200
i−1 PD
s := 2·π·10L· −1
rows ( A) rows (B) rows (D) rows (E )
cols ( A) 2 cols (B) 2 = cols (D) 10 cols (E ) 10
Li := BF +
i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E
2 1 2 1
N N Format : K K
N M N M
K = number of outputs; M = number of inputs. The dimensions of the complex output variable cv are always {K M}. From the schematic, V1 = V2; V8 = V9; V4 and V6 ≈ zero; hence, we omit V2, V9, V4, and V6. Get magnitude (dBV) and phase (deg) for single or multiple outputs: Vo : = for i ∈1..ND ⋅ PD + 1 if rows ( Y) = 0 vo i ← db ( cvi ) for i ∈1..ND ⋅ PD + 1 otherwise for K ∈1..rows ( Y) vo i,k ← db ( cvi )k vo Vai := rd·arg(cvi)
Controlled Sources
63 V1, V3, V5
40 20
dBV
Voi,1 Voi,3 Voi,5
0 −20 −40 −60
3
3.1
3.2
3.3
V1 V3 V5
3.4
3.5 3.6 Li Log freq(Hz)
3.7
3.8
3.9
3.7
3.8
3.9
4
V7, V8, V10
40 20
dBV
Voi,7 Voi,8 Voi,10
0 −20 −40 −60
3
3.1 V7 V8 V10
3.2
3.3
3.4
3.5 Li
3.6
Log freq(Hz)
3.12 SEVENTH-ORDER ELLIPTICAL LOW-PASS FILTER K := 103
nF := 10–9
4
Ein
3
2
R1 V12
+
−
V+
V−
11
R2
C1
4
V2
1
V1
R5
C2
R3
R4
R6
C4
V3
V4
V5
C3
R7 V6 3
2 +
− V+
V−
11
4
R11
V8
R10
R9 V4
1 C7
R12
R8
C5
V13 R13
V9
C6
V10
V7
V11 3
2 +
− V+
V−
11
4
R15
V10
R14
1
V14
64 Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Controlled Sources
65
R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10
12 1 2 5 0 3 6 7 4 8 0 10 11 10 0
1 EE := 13 14
0 0 0
Ein := (99
1)
R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11
12 3 6 CC := 5 9 11 7
12 13 14
LL := 0
Ao Ao Ao
1 2 3 4 8 9 10
C1 C2 C 3 C 4 C5 C6 C 7
(opamps)
GG := 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd The DC analysis has been omitted. AC Analysis BF := 2 Li := BF +
ND := 2 i−1 PD
Voi := db(cvi)
PD := 100 s := 2·π·10L· −1
i := 1..ND·PD + 1 cvi := D·(si·I – A)–1·B + E
180 ·arg(cvi) π Vbi := –210·log(10Li–3)
Vai :=
Equation of asymptote:
A 210 dB/decade rolloff with a seventh-order (140-dB Butterworth) circuit.
66
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Elliptical Seventh-Order LPF — SPICE Verification * File: c:\SPICEapps\Cirtext\Ellipt7.cir * 5/06/05 VEin 99 0 AC 1 R1 99 12 19.6K R2 12 1 196K R3 1 2 1K R4 1 5 147K R5 2 0 71.5 R6 4 3 37.4K R7 5 6 154K R8 13 7 110K R9 13 4 260 R10 4 8 740 R11 8 0 402 R12 9 10 27.4K R13 7 11 110K R14 14 10 40 R15 10 0 960 * C1 12 1 2.67n C2 3 2 2.67n C3 6 3 2.67n C4 5 4 2.67n C5 9 8 2.67n C6 11 9 2.67n C7 7 10 2.67n * EE1 1 0 0 12 1E6 EE2 13 0 6 13 1E6 EE3 14 0 11 14 1E6
Controlled Sources
67
* .OPTIONS NOMOD NOPAGE NOECHO .AC DEC 100 100 10K .PRINT AC V(14) VP(14) .END Fnom := READPRN(“c:\SPICEapps\datfiles\Elliptf7.txt”) N := rows(Fnom) N = 201 k := 1..N Output at node Y
40 20
dBV
Voi + 5 Vbi
0 −20
db(Fnomk,2) −40 −60 −80
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
4
Li, Li, log(Fnomk,1) Log freq(Hz)
NDS Asymptote Spice V(14)
Traces separated to avoid overlay and show congruency. Phase at node Y
200
Deg
100 (Vai)1 Fnomk,3 − 20
0 −100 −200
2
2.2
2.4
NDS Spice VP(14)
2.6
2.8
3
3.2
Li, log(Fnomk,1) Log freq(Hz)
3.4
3.6
3.8
4
68
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.12.1 STEPPING ONE RESISTOR VALUE K := 103
nF := 10–9
For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Y := 14 New resistor values for R4: Rx := (100
150
99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10
12 1 2 5 0 3 6 7 4 8 0 10 11 10 0
1 EE := 13 14
0 0 0
Ein := (99
1)
250)T·K
200 R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 0 6 11
12 13 14
LL := 0
Ndc := rows(Rx)
12 3 6 CC := 5 9 11 7
Ao Ao Ao
1 2 3 4 8 9 10
C1 C2 C 3 C 4 C5 C6 C 7
(Opamps)
GG := 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Collect all arrays into one multidimensional array VAB:
Ndc = 4
Controlled Sources
69
Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc RR 4 ,3 ← Rx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E
Row 2 comment: Stuff new Rx values into R4. Row 3 comment: Recompute and store the arrays. (The G function comes from subprogram comm42.mcd previously called.) VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) Note: Except for the second line in the Vn routine (given earlier), this routine, the VAB statement (given earlier), and the Vo routine below are universal. That is, they can be used to step values in column 3 of RR, CC, or LL and column 5 of GG or EE in any AC circuit. Similar statements apply for stepping resistor values in DC circuits. AC Analysis BF := 2
ND := 2
Li := BF +
i−1 PD
PD := 100
i := 1..ND.PD +1
70
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +
i −1 PD
si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1
vo k ,i ← db ( cvk ,ii ) vo
Ndc different resistor values
40
dBV
Vo1,i Vo2,i
20 0
Vo3,i −20 Vo4,i −40 −60 −80 2.6
2.7
2.8
R4 = 100 K 150 K 200 K 250 K
Ndc = 4 Note the scale change.
2.9
3
3.1 3.2 Li Log freq(Hz)
3.3
3.4
3.5
3.6
Controlled Sources
71
3.12.2 STEPPING ALL SEVEN CAPACITOR VALUES K := 103
nF := 10–9
For the schematic, see Section 3.12. R1 := 19.6·K R2 := 196·K R3 := 1·K R4 := 147·K R5 := 71.5 R6 := 37.4·K R7 := 154·K R8 := 110·K R9 := 260 R10 := 740 R11 := 402 R12 := 27.4·K R13 := 110·K R14 := 40 R15 := 960 C1 := 2.67·nF C2 := C1 C3 := C1 C4 := C1 C5 := C1 C6 := C1 C7 := C1 Ao := 106 U := 14 Step C1 through C7 from 1nF to 3 nF: Cx := (1.8 99 12 1 1 2 4 5 RR := 13 13 4 8 9 7 14 10 Y := 14
2.2 12 1 2 5 0 3 6 7 4 8 0 10 11 10 0
2.6
3.0)T·nF
R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15
Ndc := rows(Cx)
12 3 6 CC := 5 9 11 7
Ncap := rows(CC)
1 EE := 13 14
0 0 0
Ein := (99
1)
0 6 11
12 13 14
LL := 0
1 2 3 4 8 9 10
Ncap = 7
Ao Ao Ao
(Opamps)
GG := 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd
C1 C2 C 3 C 4 C5 C6 C 7
Ndc = 4
72
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Collect all arrays into one multidimensional array VAB:
Vn(U, Y, EE, GG, RR, CC, LL, Ein ) : = for i ∈1..Ndc for j ∈1..Ncap CC j,3 ← Cx i AE ← G(U, Y, EE, GG, RR, CC, LL, Ein ) A i ← AE1 Bi ← AE 2 D i ← AE 3 E i ← AE 4 A B D E
Row 3 comment: Fill CC column 3 with the ith capacitor value. Row 4 comment: Recompute the arrays for each new value and store. VAB := Vn(U, Y, EE, GG, RR, CC, LL, Ein) AC Analysis Bf := 2
ND := 2
Li := BF +
i−1 PD
PD := 100
i := 1..ND·PD + 1
Controlled Sources
73
Vo : = for k ∈1..Ndc A ← ( VAB1 )k B ← ( VAB2 )k D ← ( VAB3 )k E ← ( VAB4 )k for i ∈1..ND ⋅ PD + 1 L i ← BF +
i −1 PD
si ← 2 ⋅ π ⋅ 10 L i ⋅ −1 cvk ,i ← D ⋅ ( si ⋅ I − A ) ⋅ B + E −1
vo k ,i ← db ( cvk ,ii ) vo Four different values for C1 thru C7
40 20
dBV
Vo1,i Vo2,i Vo3,i
0 −20
Vo4,i −40 −60 −80
2
2.2
2.4
2.6
C1 thru C7 = 1.8 nF 2.2 nF 2.6 nF 3.0 nF
2.8
3 3.2 Li Log freq(Hz)
1.8 2.2 Cx = nF 2.6 3
3.4
3.6
3.8
4
74
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.13 SQUARE ROOT OF FREQUENCY (+10 dB/DECADE) CIRCUIT K := 103 Hz := 1
u := 10–6
R1
V1
n := 10–9
R2
V2
R3
p := 10–12
V3
R4
kHz := 103
R5
V4
V5
Ein C1
C2
C3
C4
C5 V9
V5 R6
V6 C6
R7
V7 C7
R8
V8
R9
R10
V9
V10
C9
C8
V9 2 3
−
+
11 V− 1
V+ 4
R1 := 523 R2 := 1.54·K R3 := 3.16·K R4 := 6.19·K R5 := 12.4·K R6 := 24.9·K R7 := 49.9·K R8 := 100·K R9 := 200·K R10 := 49.9·K C1 := 330·p C2 := 680·p C3 := 1.2·n C4 := 2.7·n C5 := 4.7·n C6 := 0.01·u C7 := 0.022·u C8 := 0.039·u C9 := 22·p Ao := 106 Ein := (99 1) U := 10 Y := 10 GG := 0 LL := 0 db(x) := 20·log(|x|) S1 : = 100
S1 = 10
db(S1) = 20
S2 : = 1000
S2 = 31.623
db(S2 ) = 30
S3 : = 10000
S3 = 100
db(S3) = 40
Hence, a slope of +10 dB/decade is the square root of frequency.
Controlled Sources
99 1 2 3 4 RR := 5 6 7 8 9 EE := (10
75
R1 R2 R3 R 4 R5 R6 R7 R8 R9 R10
1 2 3 4 5 6 7 8 9 100 0
0
9
1 2 3 4 CC := 5 6 7 8 9
9 9 9 9 9 9 9 9 10
C1 C2 C 3 C 4 C5 C6 C7 C8 C9
Ao)
→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 0
ND := 6
Li := BF +
i−1 PD
PD := 20
i := 1..ND·PD +1
F := 10L
Insert a non-inverting opamp gain stage after V10 with a gain of: 118 ⋅ K dBG := 20 ⋅ log 1 + 8.5 ⋅ K dBG = 23.453 s := 2·π·F· −1 cvi := D·(si·I – A)–1·B + E Voi := db(cvi) + dBG Vai := 10·log(Fi) Y = 10 Output at node Y
60 50
dBV
40 Voi Vai
30 20 10 0
0
1 V10 +10 dB/dec
2
3 4 Li Log freq(Hz)
5
6
76
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3.14 HV (200 V) SHUNT MOSFET REGULATOR K := 103
n := 10–9
mA := 10–3 Ehv R4
R7
V8
V1 V3
R8 Eref
R10
C1
V7 2 3
− +
11 V−
V1
R1
V2
M1
M2 C2 V9
1
V+ 4
R2
V4
V6 R5
R9
V5
R3 R6
R1 := 10K R2 := 10K R3 := 5.1K R4 := 51K R5 := 215K R6 := 6878 R7 := 562K R8 := 10K R9 := 1.96K R10 := 0.01 C1 := 2.7n C2 := 4.7n Eref := 6.2 Ehv := 400 Y := 6 U := 10 LL := 0 From MOSFET data sheet: gm := 0.001 99 1 2 4 98 RR := 6 5 7 9 988
R8 R1 R2 R 3 R4 R5 R6 R7 R9 R10
7 2 0 0 3 5 0 8 0 10
3 GG := 10
4 6
99 Ein := 98
Eref Ehv
2 3
4 6
8 CC := 3
gm gm
1 9
Ao := 106
Two inputs, M = 2.
C1 C2
EE := (1 0 5 7 Ao) Opamp
99 Ein = 98
6.2 400
Controlled Sources
77
(Note: C1 and C2 are for stability purposes. See Section 5.3, page 107 for analysis.) → Reference:C:\mcadckts\CaNL11\comm42.mcd DC Analysis −41.43 VC1 X := lsolve(–A,B) X = Vodc := D·X + E 200.91 VC 2
Vodc = (200.01)
DC drain currents of MOSFETs M1 and M2: Vdc := lsolve(A11,A14) Id2 := Vdc12 Id1 := Vdc11
Id1 := 3.904mA
Id2 := 0.901mA
AC Analysis BF := 0
ND := 5
PD := 30
Lit := ND·PD + 1
i := 1..Lit
s := 2·π·10L· −1 log(20) = 1.3
Li := BF +
cvi := D·(si·I – A)–1·B + E
i−1 PD Voi := |cvi|
200 V regulation is maintained up to about 20 Hz. Output at V5
250
Volts
200 Voi
150 100 50 0
0
1
2
3 Li Log freq(Hz)
4
Due to the opamp, a short expression for the DC output is: R5 Vo := Eref ⋅ 1 + R6 Vo := 200.01
5
78
3.15 LTC 1562 BAND-PASS FILTER IC IN A QUAD IC R21
Ein
V1 2
−
3
+
R1A
V2 11 V−
2
−
3
+
1
V+ 4
C1A
V3
V4
R5
11 2
V− 1
V+
3
4
R6
V5 − +
V6
C2B RQ2
RIN2 V7
11 V−
2
1
V+ 4
3
−
R1B
V8
11
2
V− 1
V+
+
3
4
C1B
V9 − +
V10
R7
11 2
V−
R8
V11 −
1
V+
3
4
+
V12
11 V− 1
V+ 4
To RIN3 R23
C2C RQ3
RIN3 V13
2
−
3
+
R1C
V14 11 V− 4
C1C
V15
2
−
3
+
1
V+
R24
V16
R9
11 2
V− 1
V+ 4
R10
V17
3
− +
V18
RIN4
C2D RQ4
V19
11 V− 1
V+ 4
2 3
− +
R1D
V20
11
2
V− 1
V+
3
4 Vout
C1D
V21 − +
V22
R11
11 2
V−
R12
V23 −
1
V+ 4
3
+
V24
11 V− 1
V+ 4
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
C2A RQ1
RIN1
R22
Controlled Sources
79
Opamp rolloff for the first four stages of this circuit is shown following. The remaining stages have infinite bandwidth at gain Ao. V25
R13
+
V26 C3
−
V33 +
V27
R14
+
V28 C4
−
R17
V34 C7
−
V35
R18
+
V36 C8
−
V2
V29
+
+
−
−
V14
+
−
−
V30 C6
V31
R16
+
V32 C5
−
V37
+
R15
R19
V38 C9
V39 +
V8 + −
R20
V40
C10
−
V20 + −
Output plot — see following Mathcad file. Resistor values for fo = 100 KHz are from LTC data sheet [1]. Total circuit has 40 unknown nodes and 68 components. See Section 3.16 following.
3.16 LTC 1562 QUAD BAND FILTER IC K := 103
m := 10–3
u := 10–6
n := 10–9
p := 10–12
See Section 3.15 for a schematic of the four connected sections and the opamp rolloff subcircuit. First-stage resistor values for 100-KHz fo: RIN1 := 42.2·K C1A := 159.15·p
RQ1 := 42.2·K C2A := C1A
R21 := 10·K R5 := 10·K
R1A := 10·K R6 := 10·K
Second-stage resistor values for 100-KHz fo: RIN2 := 42.2·K C1B := 159.15·p
RQ2 := 42.2·K C2B := C1B
R22 := 10·K R1B := 10·K R7 := 10·K R8 := 10·K
Third-stage resistor values for 100-KHz fo: RIN3 := 42.2·K C1C := 159.15·p
RQ3 := 42.2·K C2C := C1B
R23 := 10·K R1C := 10·K R9 := 10·K R10 := 10·K
Fourth-stage resistor values for 100-KHz fo: RIN4 := 42.2·K C1D := 159.15·p
RQ4 := 42.2·K C2D := C1B
R24 := 10·K R11 := 10·K
R1D := 10·K R12 := 10·K
80
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
These component values were obtained from Reference 1. Opamp frequency rolloff components: R13 := 1 R14 := 1 R15 := 1 R16 := 1 R17 := 1 R18 := 1 R19 := 1 R20 := 1 Cx1 := 15.91·m Cx2 := 159·n (10-Hz and 1-MHz poles) (Note: These poles, and Ao (given in the following), are estimates because the vendor chose not to put this information in the data sheet.) C3 := Cx1 C8 := Cx2 Ein := (99
C4 := Cx2 C9 := Cx1 1)
C5 := Cx1 C6 := Cx2 C10 := Cx2
C7 := Cx1
Lao 20
Ao := 10
Lao := 130
Component node lists: LL := 0
GG := 0
Y := 20
U := 40
Quad 1 of 4 quads 99 1 2 RR1 := 6 4 5
25 27 EE1 := 2 4 6
RIN1 RQ1 R1A R 21 R5 R6
1 2 3 1 5 6
0 0 0 0 0
0 26 28 0 0
1 0 0 3 5
1 CC := 3
2 4
C2 A C1A
1 1st opamp inv input. 1 1st opamp 10 Hz pole Ao 1st opamp 1MHz pole Ao 2nd opamp, no roolloff Ao 3rd opamp, no rolloff
Controlled Sources
81
Quad 2 of 4 2 7 8 RR 2 := 12 10 11
29 31 EE 2 := 8 10 12
RIN 2 RQ 2 R1B R 22 R7 R8
7 8 9 7 11 12
0 0 0 0 0
0 30 32 0 0
7 0 0 9 11
7 CC2 := 9
1 1 Ao Ao Ao
8 10
C2 B C1B
4th opamp inv input. 4th opampp 10 Hz pole 4th opamp 1MHz pole 5th opamp, no rolloff 6th opamp, no rolloff
Quad 3 of 4 8 13 14 RR 3 := 18 16 17
33 35 EE 3 := 14 16 18
13 14 15 13 17 18
0 0 0 0 0
RIN 3 RQ 3 R1C R 23 R9 R10
0 34 36 0 0
13 0 0 15 17
13 CC 3 := 15
1 1 Ao Ao Ao
14 16
C2C C1C
7th opamp inv input. 7th opamp 10 Hz pole 7th opamp 1MHz pole 8th opam mp, no rolloff 9th opamp, no rolloff
82
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Quad 4 of 4 14 19 20 RR 4 := 24 22 23 37 39 EE 4 := 20 22 24
RIN 4 RQ 4 R1D R 24 R11 R12
19 20 21 19 23 24 0
0
19
0 0 0 0
38 40 0 0
0 0 21 23
19 CC 4 := 21
20 22
C2 D C1D
1 10 th opamp inv input. 1 10tth opamp 10 Hz pole Ao 10th opamp 1MHz pole Ao 11thh opamp, no rolloff Ao 12th opamp, no rolloff
R and C’s for rolloff poles: 25 27 29 31 RR 5 := 33 35 37 39
26 28 30 32 34 36 38 40
R13 R14 R15 R16 R17 R18 R19 R 20
26 28 30 32 CC5 := 34 36 38 40
0 0 0 0 0 0 0 0
C3 C4 C5 C6 C7 C8 C9 C10
Stack into one array: RR := stack(RR1,stack(RR2,stack(RR3,stack(RR4,RR5)))) CC := stack(CC1,stack(CC2,stack(CC3,stack(CC4,CC5)))) EE := stack(EE1,stack(EE2,stack(EE3,stack(EE4,CC5)))) → Reference:C:\mcadckts\CaNL11\comm42.mcd rows ( A) rows (B) rows (D) rows (E )
cols ( A) 16 cols (B) 16 = cols (D) 1 cols (E ) 1
16 1 16 1
N N Format : K K
N M N M
Controlled Sources
83
AC Analysis
BF := 40·K
LF := 180·K
i := 1..NP + 1 s := 2·π·F· −1
NP := 101
DF :=
LF − BF NP
Fi := BF + DF·(i – 1) cvi := D·(si·I – A)–1·B + E
voi := db(cvi)
Get SPICE output (see SPICE listing below) Fnom := READPRN(“c:\SPICEapps\datfiles\ltc1562_nom.txt”) N := rows(Fnom) N = 101 k := 1..N LTC1562 output at node Y
30 20 10
dBV
0 Voi db(Fnomk,2) − 5
−10 −20 −30 −40 −50 −60 −70 40
60 NDS Spice
80
100 120 Fi Fnomk,1 , K K Freq(KHz)
140
160
180
SPICE plot separated by 5 dBV from NDS plot to show both. Also see Amplitude Response plot in Reference 1. Y = 20 SPICE listing for Itc1562.med LTC1562 Analysis * File: Itc1562A.cir VEin 99 0 AC 1 * * Quad 1 of 4 quads *
84
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
RIN1 99 1 4.22K RQ1 1 2 42.2K R1A 2 3 10K R21 6 1 10K R5 4 5 10K R6 5 6 10K C1A 3 4 159.15p C2A 1 2 159.15p EE1 25 0 0 1 1 EE2 27 0 26 0 1 EE3 2 0 28 0 3.162E6 EE4 4 0 0 3 3.162E6 EE5 6 0 0 5 3.162E6 * Quad 2 * RIN2 2 7 42.2K RQ2 7 8 42.2K R1B 8 9 10K R22 12 7 10K R7 10 11 10K R8 11 12 10K C2B 7 8 159.15p C1B 9 10 159.15p EE6 29 0 0 7 1 EE7 31 0 30 0 1 EE8 8 0 32 0 3.162E6 EE9 10 0 0 9 3.162E6 EE10 12 0 0 11 3.162E6 * * Quad 3
Controlled Sources
* RIN3 8 13 42.2K RQ3 13 14 42.2K R1C 14 15 10K R23 18 13 10K R9 16 17 10K R10 17 18 10K C2C 13 14 159.15p C1C 15 16 159.15p EE11 33 0 0 13 1 EE12 35 0 34 0 1 EE13 14 0 36 0 3.162E6 EE14 16 0 0 15 3.162E6 EE15 18 0 0 17 3.162E6 * Quad 4 * RIN4 14 19 42.2K RQ4 19 20 42.2K R1D 20 21 10K R24 24 19 10K R11 22 23 10K R12 23 24 10K C2D 19 20 159.15p C1D 21 22 159.15p EE16 37 0 0 19 1 EE17 39 0 38 0 1 EE18 20 0 40 0 3.162E6 EE19 22 0 0 21 3.162E6 EE20 24 0 0 23 3.162E6 *
85
86
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
* R’s & C’s for opamp poles * R13 25 26 1 R14 27 28 1 R15 29 30 1 R16 31 32 1 R17 33 34 1 R18 35 36 1 R19 37 38 1 R20 39 40 1 C3 26 0 15.915M C4 28 0 159.15n C5 30 0 15.915M C6 32 0 159.15n C7 34 0 15.915M C8 36 0 159.15n C9 38 0 15.915M C10 40 0 159.15n * .OPTIONS NOMOD NOPAGE NOECHO .AC LIN 101 40000 180000 .PRINT AC V(20) .END
Controlled Sources
87
3.17 BJT CONSTANT CURRENT SOURCE — A SIMPLE LINEAR MODEL USING THE NDS METHOD Constant Current Source Ein
Q1
Explanatory schematic Ein
R1 +
R4
V1
V4
Ic
− +
D1
V3 R3
R1
−
V3
V2 R2
V4
R4
V1
Vbe
R3
+
Ix
+
Vd
Iy
−
−
V2 R2
K := 103 mA := 10–3 uA := 10–6 pA := 10–12 R1 := 10·K R2 := 1.4·K R3 := 300 R4 := 0.01 Ein := (99 Ecc) beta := 100 U := 4
Ecc := 15
Use Roe = 1/hoe = 50 K in linear model — simulates Early voltage. Roe := 50K 99 2 RR := 3 1 99
1 0 0 4 3
R1 R2 R3 R 4 Roe
Id = Ix + Iy =
V2 R2
Ib flows through Vbe. The values of Ix and Iy are not needed, only Id. Vbe initial guess: Vbe := 0.6 Vbe refinement; see next page. Vbe := 0.705 Match Vd
88
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Vd := Vbe 1 GG := 99
2
2
0
3
1
4
1 R2 beta R4
1 EE := 4
Id =
V2 R2
V1 − V4 Ic = beta ⋅ Ib = beta ⋅ R 4
2
99
0
3
99
0
Vd Ecc Vbc Ecc
→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := Isolve (A1, B2) 2.395 1.69 Get node voltages from nodes 1 to U: k := 1..U Vk = 1.69 2.395 Get VCCS currents set by GG: Ngg := rows (GG) n := 1..Ngg 1.21 Vn+ U = ⋅ mA 5.31
Isrc = 5.31 mA
V2 Id = 1.207mA Id := V5 R2 Id = 1.207 mA Id := V5 Checks. Id :=
Refine Vbe: V1 − V4 R4
ml := 0.068
b1 := 0.588
Isrc = 100 Ib Ie = 5.63 mA
Ib + b1 Vbe : = ml ⋅ log uA
Iroe :=
Ib :=
Ic := le – lb
Ecc − V3 Roe
Ib
Ib + Id = 1.26mA
Id
Vbe = 0.705
Ie :=
V3 R3
Ic = 5.58 mA
Iroe = 266.19uA
Ecc − V1 V1 − V4 V2 = + R1 R4 R2
Ib = 53.15uA
Ic – Iroe = 5.31mA
Ecc − V1 V1 − v4 V2 + = 1.26 mA = 1.26 mA R1 R4 R2
Checks.
Controlled Sources
89
3.18 uA733 VIDEO AMPLIFIER K := 103
mA := 10–3
uA := 10–6
pA := 10–12
Also see NE592 Video Amplifier (http://onsemi.com) Rs := 0.01 R1 := 2.4·K R2 := 2.4·K R3 := 50 R4 := 590 R5 := 50 R6 := 590 R7 := 1.1·K R8 := 1.1·K R9 := 7·K Ein1 := 4.1 Ein2 := 4.0 Ein3 := 15 beta := 100 R10 := 7·K Roe := 50·K (Simulates 1/hoe of transistors. Not shown on schematic.) Rg := 20·K
R7 R1
Q3 V13
V4 Rs
V3
R3
V5
Ein1
Q2
R6
Q4
V15
Q6
V1 Rs
V1 Rs V3
V2
V10
Out
R9 V4
Out2
V11 R10
Ein2
V7 I1 +
Q5
Rs
V8
V6 R5
Rg
R4
V16
V9
R2
Q1 V1
Ein
R8
+
I2
+
−
I3
−
+
I4
−
−
Current source values obtained from analysis on the previous page. I1 := 5.31·mA I3 := 4.54·mA Initialize Vbe:
(R3 = 300)
I2 := I1
99 Ein := 98 97
Ein1 Ein 2 Ein 3
(R3 = 350) I4 := I3 Vbe := (0.6 0.6 0.6 0.6 0.6 0.6)T Vbe := (0.68 0.68 0.69 0.68 0.70 0.70)T Vbe refinements; see next page.
U := 16
90
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
99 98 97 97 5 6 97 97 3 4 RR := 4 3 9 8 5 3 4 8 9 97 97
1 2 3 4 7 7 8 9 10 11 13 14 16 15 6 5 6 12 12 10 11
R3 R5 R1 R 2 R4 R6 R7 R8 R9 R10 Rs Rs Rs Rs Rg Roe Ro oe Roe Roe Roe Roe
R 3 external R 5 external
Rg externall
Vbe voltage sources 1 2 13 EE := 14 16 15
5
97
0
6
97
0
12
97
0
12
97
0
10
97
0
11
97
0
Vbe1 Ein 3 Vbe 2 Ein 3 Vbe 3 Ein 3 Vbe 4 Ein 3 Vbe 5 Ein 3 Vbe 6 Ein 3
Controlled Sources
7 12 10 11 3 GG := 4 8 9 97 97
91
0
97
0
0
97
0
0
97
0
0
977
0
5
99
1
6
98
2
12
4
13
12
3
14
10
9
16
11
8
15
I1 Current source I1 (Ic = beta ⋅ Ib) Ein 3 I2 Current source I2, etc. Ein 3 I3 Ein 3 I4 Ein 3 Q1 current source frrom V3 to V5, beta Ein1–V1 R 3 controlled by Ib = R3 beta Q22 current source from V4 to V6, Ein2–V2 R5 controlled by Ib = beta R5 Rs Q3 current source from V8 to V12, beta controlled by Ib = V4–V13 , etc Rs Rs beta Rs beta Rs
→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := lsolve(A1,B2) Get all node voltages from 1 to U: k := 1..U
Vnk := Vk
See the following. Get VCCS currents set by GG: Ngg := rows(GG) ViT = (5.31 5.31
n := 1..Ngg Vin := Vn+U 4.54 4.54 2.6 2.42 3.09 2.04
4.8
4.62)mA
92
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Get base currents to refine Vbe:
IbT = (26.01
24.21
30.87
Ib1 : =
Ein1 − V1 R3
Ib 2 : =
Ein 2 − V2 R5
Ib 3 : =
V4 − V13 Rs
Ib 4 : =
V3 − V14 Rs
Ib 5 : =
V9 − V16 Rs
Ib 6 : =
V8 − V15 Rs
20.35
48.02
46.19)uA
From Vbe curve-fit data: m1 :=0.068
b1 := 0.588
Ib Vbe W : = ml ⋅ log w + b1 uA VbeT = (0.68
0.68
0.69
0.68
Copy to Vbe in the previous text. Repeat if necessary. (Converges very rapidly.)
0.70
0.70)
w := 1..rows(Ib)
Controlled Sources
93
NDS (Mathcad) 4.0987 3.9988 9.3186 9.3286 3.4187 3.3188 1.8023 11.4909 Vk = 12.6208 11.9208 10.7909 8.6386 9.3286 9.3186 11.4909 12.6208
Spice using 2N3904 4.0991 3.9992 9.3188 9.32999 3.4085 3.3104 1.7930 11.4960 Vspice : = 12.6350 11.9280 10.7900 8.6342 9.3299 9.3188 11.4960 12.6350
pe k : =
Vk −1 Vspice k
Percent error, each node −0.01 −0.01 −0.00 −0.01 0.30 0.25 0.52 min(pe) = −0.11% −0.04 pe = % −0.11 max(pe) = 0.52% −0.06 0.01 0.05 −0.01 −0.00 −0.04 −0.11
94
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
SPICE Comparison of uA733 Video Amplifier Analysis uA733 Video Ampl * File: uA733_va.cir VEin1 99 0 DC 4.1 VEin2 98 0 DC 4.0 VEin3 97 0 DC 15 * R3 99 1 50; External input resistor R5 98 2 50; External gain resistor R1 97 3 2.4K R2 97 4 2.4K R4 5 7 590 R6 6 7 590 R7 97 8 1.1K R8 97 9 1.1K R9 3 10 7K R10 4 11 7K Rg 5 6 20K; External gain resistor * Rs1 4 13 0.01 Rs2 3 14 0.01 Rs3 9 16 0.01 Rs4 8 15 0.01 * Current sources I1 7 0 DC 5.31mA I2 12 0 DC 5.31mA I3 10 0 DC 4.54mA I4 I1 0 DC 4.54mA * * C B E Q1 3 1 5 Q2N3904
Controlled Sources
95
Q2 4 2 6 Q2N3904 Q3 8 13 12 Q2N3904 Q4 9 14 12 Q2N3904 Q5 97 16 10 Q2N3904 Q6 97 15 11 Q2N3904 * * Bf=416.4 .model Q2N3904 NPN(Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 +Bf=416.4 Ne=1.259 Ise=6.734f Ikf=66.78m Xtb=1.5 +Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=3.638p Mjc=.3085 +Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75 Tr=239.5n +Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10) * OPTIONS NOMOD NOECHO NOPAGE .END
NODE
VOLTAGE
NODE
VOLTAGE
NODE
VOLTAGE
NODE
VOLTAGE
(1) (5) (9) (13) (97)
4.0991 3.4085 12.6350 9.3299 15.0000
(2) (6) (10) (14) (98)
3.9992 3.3104 11.9280 9.3188 4.0000
(3) (7) (11) (15) (99)
9.3188 1.7930 10.7900 11.4960 4.1000
(4) (8) (12) (16)
9.3299 11.4960 8.6342 12.6350
REFERENCES 1. LTC1562 Data Sheet, p. 18, www.linear.com.
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4
Leverrier’s Algorithm
4.1 NUMERICAL TRANSFER FUNCTION [1] The transfer matrix G is a matrix of output/input transfer functions. It has the dimensions {K M}, or {output input}. The desired numerical transfer function is an element of the transfer matrix G. For example, output 1 / input 2 would be G12. Leverrier’s algorithm finds both. Note that in the following sequence, the symbol tr( ) indicates the trace of a matrix, i.e., the sum of the diagonal elements. General subscripts are given in parentheses, but specific ones are not. That is, FN – 1 is designated F(N – 1). However, F2 would be designated by F2. This is to prevent double subscript sets in later equations. For a given matrix A of dimension {N N}, the general sequence is: I = identity(N) F = (N – 1) = I T(N − 1) =
− tr A ⋅ F ( N − 1) 1
F = (N − 2 ) = A ⋅ F (N − 1) + T(N − 1) ⋅ I T(N − 2 ) =
− tr A ⋅ F ( N − 2 )
F = (N − 3) = A ⋅ F (N − 2 ) + T(N − 2 ) ⋅ I T(N − 3) =
− tr A ⋅ F ( N − 3)
2
3
F1 = A ⋅ F 2 + T2 ⋅ I T1 =
− tr ( A ⋅ F1) N −1
F 0 = A ⋅ F1 + T1 ⋅ I T0 =
− tr ( A ⋅ F 0 ) N
The numerator coefficients are then: Y(N − 1) = D ⋅ F (N − 1) ⋅ B + E ⋅ T(N − 1) Y(N − 2 ) = D ⋅ F (N − 2 ) ⋅ B + E ⋅ T(N − 2 )
Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0
97
98
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
The output I / input J transfer function extracted from the {K M} transfer matrix G is then: GI J (s) =
E I J sN + Y ( N − 1)I J s N−1 + Y ( N − 2 )I J s N− 2 + + Y1I J s + Y0 I J sN + T ( N − 1) sN−1 + T ( N − 2 ) sN− 2 + + T1s + T0
A simple example will help clarify the procedure. Let −1 A=0 0
0 −4 −1
0 1 4 , I = 0 0 0
0 1 0
0 0 1
in which N = 3 The trace of A = 5; the trace of I = 3. Sequence is: F2 = I
T2 =
4 − tr ( A ⋅ F 2 ) = 5, F1 = A ⋅ F 2 + T2 ⋅ I = 0 1 0
T1 =
4 − tr ( A ⋅ F1) = 8, F 0 = A ⋅ F1 + T1 ⋅ I = 0 2 0
T0 =
− tr ( A ⋅ F 0 ) =4 3
0 1 −1
0 4 4
0 0 −1
The denominator of GI,J is then D(s) = s3 + T2s2 + T1s + T0 = s3 + 5s2 + 8s + 4 Let the D, B, and E arrays be, with {K M} = {2 2}. −1 D= 0
0 0
1 1 , B = 0 1 1
We compute the numerator of G using:
0 1 1 , E = 0 −1
0 4 5
0 1
Leverrier’s Algorithm
99
5 Y2 = D ⋅ F 2 ⋅ B + E ⋅ T2 = 1
−1 4
9 Y1 = D ⋅ F1 ⋅ B + E ⋅ T1 = 5
−66 2
4 Y0 = D ⋅ F 0 ⋅ B + E ⋅ T0 = 4
−5 −1
The numerator of G is a matrix polynomial: 1 N(s) = Es 3 + Y2s2 + Y1s + Y0 = 0
0 3 5 s + 1 1
−1 2 s 4
9 + 5
−6 4 s+ 2 4
−5 −1
G I,J =
N (s) D (s)
Then:
G1,2 =
(
− s 2 + 6s + 5
)
s 3 + 5s 2 + 8s + 4
and G2,2 is G 2 ,2 =
s 3 + 4 s 2 + 2s − 1 , s 3 + 5s 2 + 8s + 4
etc. Another way to find D(s) is by using eigenvalues: −1 A=0 0
0 −4 −1
0 −2 4 , eigenvals( A) = −2 −1 0
then D(s) = (s + 1)(s + 2)(s + 2) = s3 + 5s2 + 8s + 4 A circuit example is given in Section 4.2.
100
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
4.2 TRANSFER FUNCTION USING LEVERRIER’S ALGORITHM FOR TWIN-T RC NETWORK → Reference:C:\mcadckts\CaNL11\TwinT2.mcd See schematic in Section 2.5. Display A, B, D, and E arrays: −374.53 A = −374.53 −374.53
−187.27 −1136.41 −384.53 D = (0
–1
−187.27 −384.553 −384.53 –1)
374.53 B = 1136.41 384.53
E = (1)
The {N N} identity matrix is obtained from the referenced subprogram: 1 I = 0 0
0 1 0
0 0 1
{K M} = {1 1} here. Step 1 − tr ( A ⋅ F 2 ) T2 = 1895.48 1 Y2 := D·F2·B + E·T2 Y2 = (374.53) F2 := I
T2 :=
Step 2
F1 := A·F2 + T2·I Y1 := D·F1·B + E·T1
− tr ( A ⋅ F1) T1 = 718489.21 2 Y1 = (140274.07)
T1 :=
Step 3
F0 := A·F1 + T1·I Y0 := D·F0·B + E·T0
− tr ( A ⋅ F 0 ) 3 Y0 = (5.27 × 107)
T0 :=
T0 = 5.56 × 107
Leverrier’s Algorithm
101
Transfer function: G (s) :=
E ⋅ s 3 + Y2 ⋅ s2 + Y1 ⋅ s + Y0 s 3 + T2 ⋅ s2 + T1 ⋅ s + T0
Compare the following plot with that of the twin-T network in Section 2.5: Transfer function magnitude
0 −10 dBV
−20 db(G(si)) −30 −40 −50 −60
0
20
40
60
80
100
Fi Freq(Hz)
REFERENCES 1. D.M. Wiberg, Schaum’s Outline Series, State Space and Linear Systems, McGrawHill, 1971, p. 102.
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5
Stability Analysis
5.1 UNITY GAIN DIFFERENTIAL AMPLIFIERS The NDS Method can be used for stability analysis problems. Techniques illustrated are, (1) Α and β slope intersection method, and (2) gain-phase plots of loop gain Αβ. Several examples are contained in this chapter. (In control theory, the symbols G and Η are used for Α and β respectively.) K := 103
u := 10–6
p := 10–12
Meg := 106
Hz := 1
MHz := 106
Compensated unity gain differential amplifier R1
R2 Ein1
R5
R3
11 2 − V−
C3
3 +
V0 1
V+ 4
Ein2 R6
R1 R4 R5 C3
:= := := :=
30·K R2 := 30·K R3 := 100·Meg 10·Meg (R4 internal to opamp) 30·K R6 := 30·K 0.01·u C4 := 5·p (Stray package capacitance)
Beta equivalent circuit (R4 and C4 internal to opamp) Note that Vo becomes the input, or Ein. R2
R1
V1
V0 (Ein) R3
R4
V2
C4
C3 R5
V3 R6
103
104
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
By definition: Beta =
V1 − V3 Ein
The inverse of this is: InvBeta =
Ein V1 − V3
For opamp poles: f1 := 20·Hz rd :=
f2 := 1·MHz
180 π
ω1 := 2·π·f1
ω2 := 2·π·f2
U := 3
1 Y := 3
Two outputs are V1 and V3
99 1 1 RR := 1 3 3
1 0 2 3 0 0
LL := 0
R1 R2 R 3 R 4 R5 R6
GG := 0
2 CC := 1
EE := 0
3 3
C 3 C 4
Ein := (99
1)
One input.
→ Reference:C:\mcadckts\CaNL11\comm42.mcd AC Analysis BF := 2 L i = BF +
ND := 5 i −1 PD
PD := 20
F := 10L
i := 1..ND·PD + 1
s := 2 ⋅ π ⋅ F ⋅ −1
For the opamp: Ao si si 1 + ⋅ 1 + ω1 ω2
Ao := 105.5
Ao1i =
V1i := (cvi)1
V3i := (cvi)2
cvi := D·(si·I – A)–1·B + E
Stability Analysis
105
1 Recall that Y = Vai := V1i – V3i 3 Aold := A (for future reference) This is with the compensation R3 and C3 (sometimes called the “beta killer”) disabled by setting R3 = 100 Meg. To enable it, we now set R3 = 2K, RR3,3 := 2·K, and call the reference template again to get the new A matrix value. → Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A 1 50000 −1 −50000 Aold = Anew = 6 8 −1.067 × 10 8 2000 −6.689 × 10 1 × 10 cvi := D·(si·I – A)–1·B + E V1i := (cvi)1 V3i := (cvi)2 Vbi := V1i – V3i Net slope of intercept is >20 dB/decade implies unstable (R3 = 100 Meg). Net slope of intercept = 20 dB/decade implies stable (R3 = 2 K). With and without compensation
80 70 60
dBV
50 db(Aoli)
40
−db(Vai)
30
−db(Vbi)
20 10 0 −10 −20
2
3
4
Aol R3 = 100 Meg R3 = 2 K
Li
5
6
7
Log freq(Hz)
Plot Loop Gain as a Gain–Phase Plot: Loop gain is defined as (Aol)(Beta) AB1i := db(Aoli·Vai) AB2i := db(Aoli·Vbi) φi := rd·arg(Aoli·Vai) θi := rd·arg(Aoli·Vbi) φi := if(φi > 0, φi – 360, φi) θi := if(θ > 0, θi – 360, θi) Zero crossover markers: F1 := –192 F2 := –103
106
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Phase margin (R3 = 100 Meg) = 180 + F1 = −12 implies unstable. Phase margin (R3 = 2 K) = 180 + F2 = 77 implies stable. Gain-phase plot
50
F2
Gain (dBV)
F1
AB1i
0
AB2i
−50 −230
−210
−190
−170
−150 φi, θi Phase angle (Deg)
R3 = 100 Meg R3 = 2 K
−130
−110
−90
5.2 STABILITY OF LM158 OPAMP MODEL In this section, the stability of an LM158 opamp model embedded in a feedback circuit is analyzed. Meg := 106
R3
K := 103
U := 106
MHz := 106
Original circuit C1 V3 Rs
R3
0.1 uF
1.13 K
1.13 K R2
V1
R1
Ein 2.26 K
LM158 opamp
Ein
10 K 2 −
3
+
1
Feedback (beta) circuit C1 V3 Rs R3
R2 2.26 K
0.1 uF V1
R1 10 K
(V2) Ein1
X V2
LM158 model
R4 V4
4
Ein
(V2)
10 K
V− V+
Rs
R1
V1
11
p := 1012
0.1 uF V1
2.26 K
V5 C2
1.13 K
Using LMI 58 model C1 V3
R2
V2
N := 109
+ −
R5
EE2
V7
V6 C3
+ −
R6
EE3
V8 C4 EE4
+ −
Stability Analysis
107
R1 := 10·K R2 := 2.26·K R3 := 1.13·K R4 := 99.47·Meg R5 := 10 R6 := 10 C1 := 0.1·u C2 := 80·p C3 := 13.263·n C4 := 7.958·n Rs := 0.01 Ao := 105 U := 8 1 Y= 2 The feedback circuit consists of R1, R2, R3, and C1. The opamp model consists of R4, C2, R5, C3, R6, C4, and VCVSs EE2 through EE4. When analyzing the feedback factor beta, the output V2 becomes an input Ein1. For the opamp model, inverting input V1 becomes a new input Ein1. f1, f2, and f3 are the three pole frequencies (Hz) of the opamp model.
1 f1 : = 2 ⋅ πR 4 ⋅ C2
Ein := (99
1)
99 1 1 RR := 99 5 7 99 5 EE := 7 2
1 1 f2 : = f3 : = 2 ⋅ πR 5 ⋅ C 3 2 ⋅ πR 6 ⋅ C 4
LL := 0 R1 R2 R 3 R 4 R5 R6 Rs
1 0 0 4 6 8 3 0 0 0
4 6 8
0 0 0
GG := 0
3 4 CC := 6 8
1 0 0 0
C1 C2 C 3 C 4
1 1 Ao
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aold := A
Bold := B
Save arrays. New value for C2 C2 := 250·p Insert into CC array: CC2,3 := C2
1.3 log ( f ) = 6.08 6.3
108
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Call reference again with new value of C2: New pole frequency f1:
f1 :=
0.81 log ( f ) = 6.08 6.3
1 2 ⋅ πR 4 ⋅ C2
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Anew := A
Bnew := B
AC Analysis BF := 0
ND := 7
PD := 20
i := 1..ND·PD + 1
i −1 s := 2 ⋅ π ⋅ 10 L ⋅ −1 PD Vai := D·(si·I – Aold)–1·Bold + E Vai := (vai)1 L i = BF +
Vbi := D·(si·I – Anew)–1·Bnew + E
A3i := (vai)2
A4i := (vbi)2
rd :=
180 π
Loop gain: AB1i := A3i·Vai AB2i := A4i·Vai φi := rd·arg(A3i·Vai) αi := rd·arg(A4i·Vai) φi := if(φi > 0, φi – 360, φi) αi := if(αi > 0, αi – 360, αi) Zero crossover markers: F1 := –165
F2 :=–129
Phase margins: PM1 := 180 + F1
PM1 = 15
PM2 := 180 + F2
PM2 = 51
Stability rule of thumb: Phase margin should be greater than 45°. 80
Gain-phase plot of loop gain AB F1
dBV
60 db(AB1i)
40
db(AB2i)
20
F2
0
0 −20 −300
−250 C2 80 pF C2 250 pF
−200
−150 φi, αi Deg
−100
−50
0
Stability Analysis
109 Opamp open loop gain and inverse beta
120 100 80
dBV
db(A4i)
60
db(A3i)
40
−db(Vai)
20 0 −20
0
1
2
3
4
5
6
7
Li
C2 250 pF
Log freq(Hz)
C2 80 pF Inv Beta
Note: Net slope of intercept of Inv Beta with opamp Aol should be 20 dB/dec.
5.3 HIGH-VOLTAGE SHUNT REGULATOR — STABILITY ANALYSIS In this section, the stability analysis of the HV Shunt Regulator presented in Section 3.14 is given. K := 103
nF := 10–9
Hz := 1
MHz := 106
V := 1
Ehv R10
R4 R7 V8
C1
V10 V3
R8 Eref
V7
2
−
3 +
M2
11 V1 R1
V− V+
V2
C2
M1
V3
1 4
R2
V4
R9
V6 R5 V5
R3 R6
R1 R5 R9 C2
:= := := :=
10·K 215·K 1.96·K 4.7·nF
R2 := 10·K R6 := 6878 Ehv := 400
db(x) := 20·log(|x|)
R3 := 15·K R4 := 150·K R7 := 562·K R8 := 14.7·K Eref := 6.2 C1 := 2.7·nF
110
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Calculate poles, zeros, and critical gain points in dBV: T1 := C1·(R7 + R8) T6 := R9·C2
T3 := R8·C1
T2 := C2·(R4 + R9)
Breakpoint (bp) of loop gain 1 (lg1): F1 :=
1 2 ⋅ π ⋅ T1
F1 = 102.2 Hz
LF1 := log(F1)
LF1 = 2.01
LF2 := log(F2)
LF2 = 2.348
LF6 := log(F6)
LF6 = 4.24
First bp of lg2 (see plot marker): F 2 :=
1 2 ⋅ π ⋅ T2
F1 = 222.8 Hz
Second bp of lg2: 1 F6 = 17.3 KHz 2 ⋅ π ⋅ T6 BF := 0 ND := 7 PD := 20 F 6 :=
L i = BF +
i −1 PD
i := 1..ND·PD +1
s := 2 ⋅ π ⋅ 10 L ⋅ −1
Minor loop inverse beta (see the following derivation). s ⋅ T3 1g1i := − db i si ⋅ T1 + 1 Major loop inverse beta s ⋅ T6 + 1 R 4 ⋅ R6 ⋅ 1g 2 i : = – db i si ⋅ T2 + 1 R 3 ⋅ ( R 5 + R 6 ) High-frequency gain of lg1 R7 G1 := db 1 + R8
G1 = 31.87
High-frequency gain of lg2 R 3 ⋅ (R 4 + R9) ⋅ (R5 + R6) G 4 := db R 4 ⋅ R6 ⋅ R9
G4 = 47.96
Stability Analysis
111 Inverse betas & break points
80
LF2
70
LF6
60
G4
dBV
50 lg1i
40
lg2i
30
G1
20 10 0 −10
0
1
Minor loop Major loop
2
3 Li
4
Log freq(Hz)
Note: Net slope of intercept = 20 dB/dec. Opamp DC open loop gain in V/V: Ao := 106 Goa := db(Ao) Goa = 120 Foa := 30·Hz Foa = First opamp breakpoint. ω1 := 2·π·Foa ω2 := 2·π·2·106 (Opamp poles) Ao Ao1i = db 1 + si ⋅ 1 + si ω1 ω 2 Opamp open loop gain: R 3 ⋅ (R5 + R6) IG 2 := db R 4 ⋅ R6 LF 3 := LF 2 + LF 4 : =
G1 − IG 2 20
Goa − G1 + log ( Foa ) 20
IG2 = 10.17
LF3 = 3.43
LF4 = 5.88
5
6
112
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Ao1i lg1i lg2i
Stability intercepts
130 120 110 100 90 80 70 60 50 40 30 20 10 0 −10
LF3
LF4
G4 G1
0
0.5
1
1.5
Opamp Minor loop Major loop
2
2.5
3
3.5 Li
4
4.5
5
5.5
6
6.5
7
Note that at each intercept LF3 and LF4, the net slope is approximately 20 dB/decade, which implies stability. Calculate loop gain GH:
F 7 i :=
si ⋅ R 7 ⋅ C1 + 1 si ⋅ R 8 ⋅ C1
F 8 i :=
1 R 4 ⋅ ( si ⋅ R 9 ⋅ C2 + 1) R 6 ⋅ ⋅ R 3 s i ⋅ C2 ( R 4 + R 9 ) + 1 R 5 + R 6
GHi := db(F7i·F8i) + Ao1i
M1 = 37
− F 7 ⋅ F 8 ⋅ Ao 180 i i PH I := ⋅ arg π 1 + si ⋅ 1 + si ω1 ω 2
Stability Analysis
113 Gain vs. phase
200 M1
Gain
100 GHi 0
−100
0
20
40
60
80
100
phi Deg
Note: phasemargin := M1 phasemargin := 37 Voltage divider R1, R2 not included. Derivation of minor loop gain 1 (lg1) and major loop gain 2 (lg2): R7
C1
Ein = 1V 562 K
2.7 nF R8
lg1 derivation
1V
−
14.7 K
C2
R5
4.7 nF
215 K
Vb
+
lg1 R3
Va
15 K
R4
+
R9
150 K
1.96 K
Ebuff
−
lg2 derivation
Ebuff represents source follower M2. Ig1 is the drain current of M1, For lg1 derivation: Va =
R8 1 R8 + R 7 + sC1
For inverse, use –dBV
=
s ⋅ R 8 ⋅ C1 s ⋅ C1 ⋅ ( R 7 + R 8 ) + 1
Vc
R6
6.878 K
114
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
For lg2 derivation: Ig1 current =
1⋅ V R3
ZL =
R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1
of Ig1 Vb =
ZL 1 R 4 ⋅ ( s ⋅ R 9 ⋅ C2 + 1) = ⋅ R 3 R 3 s ⋅ C2 ⋅ ( R 4 + R 9 ) + 1
Vc =
Vb·R 6 R5 + R6
6
Transient Analysis
6.1 INTRODUCTION One method of transient analysis is based on the following equation: ∆x = Ax + Bu or ∆x = (Ax + Bu)·∆t ∆t Because A and B are already known using the NDS method, the task is to determine ∆t. If ∆t is too large, the solution will not be accurate. If ∆t is excessively large, the solution will not converge. If too small, a longer-than-necessary execution time may be required. The time increment ∆t generally should be less than the smallest time constant in the A matrix. This should be used as a guide in selecting the initial value of ∆t. Some adjustment may be required for circuits with very fast and very slow time constants. A simple circuit is used as the first example. R1
V1
Ein R2
R1 := 20·K
R2 := 40·K
C1
C1 := 0.5·uF
Ein := 4.5
The time constant of this circuit is easily found to be:
Rp := τ := Rp· C1
R1 ⋅ R 2 R1 + R 2
τ = 6.667 ms
To confirm this, KCL at the node V1 gives: Ein − V1 V1 = + iC1 R1 R2 1 Ein 1 iC1 = −V1 ⋅ + + R1 R 2 R1 115
116
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Noting that V1 = vC1 and substituting iC1 = C1 ⋅ dvC1 − vC1 = dt C1
dvC1 dt
Ein 1 1 , ⋅ + + R1 R 2 R1 ⋅ C1
which is in the state space form dx = Ax + Bu dt Then
A := u := Ein
−1 1 1 ⋅ + C1 R1 R 2
A = –150
B = 100
B :=
1 R1 ⋅ C1
u = 4.5
The time constant of A is 1 = 6.667 ms A which is τ as in the preceding text. We then chose ∆t = 1 ms < τ. Using ∆x = (Ax + Bu)⋅∆t we initialize: Vc1 := 0 (can be an initial condition other than zero) ∆Vc1 := (A·Vc1 +B·Ein)·∆t Vc1 = 0.45 Vc2 = ∆Vc1 +Vc1 Vc2 = 0.45 ∆Vc2 := (A·Vc2 +B·Ein)·∆t Vc2 = 0.383 Vc3 = ∆Vc2 +Vc2 Vc3 = 0.832 Combining: Vc2 := (A·Vc1 +B·Ein)·∆t + Vc1 Vc3 := (A·Vc2 +B·Ein)·∆t + Vc2
Vc2 = 0.45 Vc3 = 0.832
Setting the maximum number of iteration to kmax : = 50 and indexing k := 2..kmax, Vck : = (A·Vck-1 +B·Ein)·∆t + Vck-1 The total sweep time is: kmax⋅∆t = 50 ms, which should be sufficient because 5⋅τ = 33.33 ms.
Transient Analysis
117
We plot Vc and compare this to the continuous solution F ( t ) :=
−t Ein ⋅ Rp ⋅ 1 − exp R1 Rp ⋅ C1
t := 0, 0.005·ms..50·ms Widening the span of k to include k = 1 (Vc1 = 0): k := 1..kmax Time plot
Volts
3
Vck
2
F(t) 1
0 0
10
20
30 . k ∆t , t ms ms Time(ms)
40
50
Ein ⋅ Rp =3 R1 Note the lag of Vc behind the continuous time function F(t). We can decrease this lag by decreasing Dt to 0.5 ms and by increasing kmax from 50 to 100 to maintain the same sweep time: The steady-state value is
∆t := 0.5·ms
kmax :=
50 ⋅ ms ∆t
kmax = 100
k := 2..kmax (for computing) Vc1 := 0 Vck := (A·Vck–1 + B·Ein·∆t + Vck–1 k := 1..kmax (for plotting)
118
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Time plot
Volts
3
Vck
2
F(t) 1
0 0
10
20
30
40
50
k . ∆t , t ms ms Time(ms)
Further reduction of ∆t would result in the two plots approaching congruency. The reader is encouraged to select larger values of ∆t and note the deleterious effect on the solution. As will be shown, this method applies irrespective of whether A and B are scalars as in the preceding text or arrays.
6.2 SWITCHED TRANSIENT ANALYSIS A more complicated example is now shown to further illustrate the utility of the method. R1 Ein
V1 Q1
R2
V2
C1
V3
1 R3
R4
2
R1 := 10·K R2 := 10·K R3 := 2·K Qloff := 10·Meg Qlon := 0.5 (Q1 is a CMOS SPST switch.) C1 := 0.1·u
U := 3
1 Y := 2 3
R4 := 10·K
Ein := (99
Analytical Q1off and Q1on time constants: R 3 ⋅ ( R1 + R 2 ) τ1 := R 4 + ⋅ C1 R1 + R 2 + R 3
τ1 = 1.182m
1)
Transient Analysis
119
R2 ⋅ R 3 τ 2 := R 4 + ⋅ C1 R2 + R 3 V3pk :=
τ2 = 1.167m
10 ⋅ R 3 ⋅ R 4 R 3 ⋅ R 4 + ( R1 + R 2 ) ⋅ ( R 3 + R 4 )
99 1 RR := 1 2 3 LL := 0
1 0 2 0 0
R1 Q1off R2 R 3 R 4
EE := 0
CC:= (2
3
V3pk = 0.769
C1)
GG := 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Close sw Q1
Boff := B
Doff := D
Eoff := E
RR2,3 := Q1on
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A
Bon := B
Don := D
Eon := E
Compare time constants: t1 :=
1 Aoff
t1 = 1.182m
From above: 1 Aon
τ1= 1.182m
t 2 :=
From above: τ2 = 1.167m
∆t := 0.02·m
Per k max := floor ∆t
t2 = 1.167m
Per := 20·m
kmax = 1000
Ein := 10
Create input pulse from Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Eapp(t) := bpf(t, 0.05·Per, 0.9·Per, Ein) k := 2..kmax Initialize: V11 := 0 Switch time: Sw := 0.45·kmax Sw·∆t = 9m
120
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) Input & output waveforms
1.5
Sw . ∆t m
1
Volts
(Vok)2 − (Vok)3 (Vok)3 Eapp(k . ∆t)
V3pk
0.5 0
10
–V3pk
–0.5 –1
0
10 k . ∆t m Time(ms)
5 Vc1 V3 (Input pulse)/10
15
20
6.3 N = 2 SWITCHED CIRCUIT TRANSIENT RESPONSE In this section, a circuit with two capacitors (N = 2) with multiple time constants and a synchronously switched inputs is analyzed. K := 103
u := 10–6
Meg := 106
m := 10–3
R1
V1
Ein1 R3
R2 V2 1
C1
R4
V3 C2
Q1 2 Ein2
R1 := 10·K R2 := 10·K R3 := 20·K R4 := 100·K Q1off := 10·Meg Q1on := 0.5 C1 := 0.02·u C2 := 0.5·u U := 3 Y := (1 2 3)T 99 Ein := 98
1 1
LL := 0
GG := 0
EE := 0
Transient Analysis
121
Two inputs. To be changed to +25 V and −10 V later. Switch Q1 OFF 99 1 RR := 2 1 1
R1 R2 Q1off R 3 R 4
1 2 98 3 0
1 CC := 3
C1 C2
0 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Switch Q1 ON
Boff := B
Doff := D
Eoff := E
Save OFF arrays.
RR3,3 := Qlon
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A tau1 : =
Bon := B
Don := D
Eon := E
Save ON arrays.
1 1 1 1 tau 4 : = tau 2 : = tau 3 : = max ( Aoff ) min ( Aoff ) max ( Aon ) min ( Aon )
tau1 := (400
124.9
400
76.9)u
tau4 := 76.9 u
This is the shortest time constant; ∆t must be less than this. Choose ∆t := 50·u
Per1 := 20·m
Per2 := 40·m
Per 2 kmax := floor ∆t
kmax = 800 pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w, Ein) := Ein·pulse(x – f, w) Ein1 := 25 Ein2 := –10 Eapp1(t) := bpf(t, 0.05·Per1, 0.95·Per1, Ein1) Eapp2(t) := bpf(t, 0.4·Per1, 0.95·Per1, Ein2) Eapp1( t ) Eapp( t ) : = Eapp 2( t )
0.95·Per1 := 19m
k := 2..kmax Initialize: 0 V11 := 0
0.5·Per1 = 10m
122
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Switch time: Sw := 0.25·kmax Sw = 200 Sw·∆t = 10m V1k := if(k < Sw, Aoff·V1k–1·∆t + Boff·Eapp(k·∆t)·∆t + V1k–1, Aon·V1k–1·∆t + Bon·Eapp(k·∆t)·∆t + V1k–1) Vok := if(k < Sw, Doff·V1k + Eoff·Eapp(k·∆t), Don·V1k + Eon·Eapp(k·∆t)) 30 25
Sw . ∆t m
20
(Vok)1
15
(Vok)3
10
Eapp(k . ∆t)1
5
Eapp(k . ∆t)2
0 –5 –10 –15
0
5 V1 V3 Ein1 Ein2
10
15
20 k . ∆t m
25
30
35
40
SPICE Verification N=2 Switched Circuit Transient Response *File: n2tran.cir V1 99 0 PWL(0,0 1m,0 1.001m,25 19.99m,25 20m,0) V2 98 0 PWL(0,0 7.99m,0 8m,-10 17.99m,-10 18m,0) R1 99 1 10K R2 1 2 10K R3 1 3 20K R4 1 0 100K * C2 3 0 0.5u C1 1 0 0.02u * * Build separate switch control
Transient Analysis
123
* V3 97 0 PWL(0,0 9.99m,0 10m,+5 47.99m,+5 48m,0) RL 97 0 10K SQ1 2 98 97 0 SMOD .MODEL SMOD VSWITCH(RON=0.5 ROFF=10MEG VON=+5 VOFF=0) .TRAN 0.1m 40m 0 50u .PRINT TRAN V(99) V(98) V(1) V(3) .OPTIONS NOMOD NOECHO NOPAGE .END Tnom := READPRN(“c:\SPICEapps\datfiles\n2tran.txt”) N := rows(Tnom) N = 401 k := 1..N
Spice verification 30 25
Volts
Tnomk,2 Tnomk,3
20 15 10
Tnomk,4
5
Tnomk,5
0 –5 –10 –15
0
5
10
15
Ein1 Ein2 V1 V3
20 25 Tnomk,1 m Time(ms)
6.4 COMPARATOR 100-HZ OSCILLATOR K := 103 V := 1
u := 10–6 Hz := 1
Meg := 106
m := 10–3
30
35
40
124
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
LM339 comparator circuit
Redrawn explanatory circuit Ein
C1
2
3 R1 Ein +5V
Vp
Ein R5 +5V
Vn – +
R5 Vn
R4 11 V– V+
1
Vc
C1
R4
Vc
R3
Vp
R1 Ein
1 R2
Q1 2
4
R3 Q1 internal
R2
R1 := 100·K R5 := 3.3·K
R2 := 100·K Q1on := 150
R3 := 100·K R4 := 5.75·K Qloff := 10·Meg C1 := 1.15·u
Switch Q1 is the open-collector (OC) transistor output of an LM339 comparator. Vn is the inverting input, and Vp is the noninverting input to the LM339. Hence, when Vn > Vp, Q1 will be ON (switch closed), and when Vn < Vp, Q1 will be OFF (switch open). When power is applied (Ein = +5 V DC), C1 will charge up to a voltage greater than Vp, closing switch Q1, and then discharging C1 towards a voltage less than Vp, which opens the switch, and the cycle repeats. Hence, the output of the LM339 will go high (Q1 OFF) and low (Q1 ON) at a rate determined by the circuit time constants. With the given, component values the frequency of oscillation is about 100 Hz. From the plot in the following text, the falling edges of Vc are about 10 ms apart, for a period of 100 Hz. Note that max Vce(sat) is given on the LM339 data sheet as 0.25 V. This is simulated by setting the ON resistance of Q1 to 150 Ω. U := 3 LL := 0
Y := (1 2 EE := 0
3)T CC := (1 0 C1) GG := 0 Ein := (99 5)
Note: Vn = V1 = VC1 = minus input to LM339, Vc = V2 = Vcollector, Vp = V3 = plus input to LM339.
Transient Analysis
125
99 3 3 RR := 2 99 2
3 0 2 0 2 1
R1 R2 R3 Q1off R5 R4
with switch Q1 OFF → Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A Boff := B Save OFF arrays.
Doff := D
Eoff := E
RR4,3 := Q1on
Repeat with switch Q1 ON.
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A Bon := B Save ON arrays. ∆t := 0.05·m
Don := D
Per := 50·m
Eon := E
Per kmax = floor ∆t
kmax = 100 pulse(x) := φ(x) (φ(x) is Mathcad’s unit step function.) bpf(x, f, Ein) := pulse(x – f) Eapp(t) := bpf(t, 0.005·Per,1)
126
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Program
Comments
Vo := V11 ← 0
Initialize
Vn1 ← 0 Vc1 ← 0 Vp1 ← 0 for k ∈ 2..kmax if Vn k −1 > Vp k −1 V1k ← Aon ⋅ V1k −1 ⋅ ∆t + Bon ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1
Iterate from 2 to kmax Q1 to switch ON
Vn k ← Don1 ⋅ V1k + Eon1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Don 2 ⋅ V1k + Eon 2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Don 3 ⋅ V1k + Eon 3 ⋅ Eapp ( k ⋅ ∆t ) otherwise V1k ← Aoff ⋅ V1k −1 ⋅ ∆t + Boff ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V1k −1 Vn k ← Doff1 ⋅ V1k + Eoff1 ⋅ Eapp ( k ⋅ ∆t ) Vc k ← Doff2 ⋅ V1k + Eoff2 ⋅ Eapp ( k ⋅ ∆t ) Vp k ← Doff3 ⋅ V1k + Eoff3 ⋅ Eapp ( k ⋅ ∆t ) Vn Vc Vp
Q1 to swittch OFF
Transient Analysis
127 Oscillator waveforms
5
Volts
4 |(Vo1)k| 3 |(Vo2)k| 2 1 0
0
10
20
Vn Vc
k . ∆t m Time(ms)
30
40
50
Oscillator waveforms
5
Volts
4 |(Vo1)k| 3 |(Vo3)k| 2 1 00
10
20
Vn Vp
k . ∆t m Time(ms)
30
40
6.5 TRANSIENT ANALYSIS OF PULSE TRANSFORMER ns := 10–9
ps := 10–12
MHz := 106
For the schematic, see Section 2. 6. Insert AC circuit analysis file: → Reference:C:\mcadckts\CaNL11\xformerrs5.mcd Y := (1
3
5)T
Insert subprogram file: → Reference:C:\mcadckts\CaNL11\comm42.mcd
50
128
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Time constants of A: 1 max ( A )
tau1 : =
tau 2 : =
Specify time parameters: Choose ∆t < tau, ∆t := 2·ps m := 1..Npp Tper kmax := floor ∆t
1 min ( A )
2.5 tau ps 2.5
Tper := 200·ns
Npp := 200
kmax = 100000
kmax Npp = number of plotting points. rto := floor Npp Create delayed input pulse using Mathcad’s unit step function φ(x): pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Eapp(t) := bpf(t, 0.02·Ter, 0.5·Tper) Vo : = V11 ← ( 0
0
0
0
0
0)
T
for k ∈ 2..kmax V12 ← A ⋅ V11 ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + V11 Vx1 ← D ⋅ V11 + E ⋅ Eapp ( k ⋅ ∆t ) V11 ← V12 tx ←
k rto
vo tx ← Vx1 if tx = floor ( tx ) vo
Volts
Delayed input pulse 1.2 1 0.8 Eapp(m. ∆t ⋅rto) 0.6 0.4 0.2 0 −0.2
0
50
100 m. ∆t ⋅rto n Time(ns)
150
200
Transient Analysis
129 Output at node Y
15
Volts
(Vom)1 (Vom)2
10 5
(Vom)3 0 –5
0
Length(Vo) = 200
25
50
75
100 125 m. ∆t⋅rto ns
V1 V3 V5
Time(ns)
Npp = 200
1 Y := 3 5
150
175
200
Note the distortion on V3 and V5. Because the bandwidth is approximately 10 MHz (see Section 2.6), the rise or fall times of the input pulse should be greater than
Tr :=
ln ( 3) π ⋅ 10 ⋅ MHz
Tr = 34.97ns
The rise or fall time used here is 10 ps. SPICE Verification TRANSFORMER PULSE RESPONSE * File: xformer_tran.cir VEin 99 0 PWL(0,0 4ns,0 4.012ns,10 104.012ns,10 104.022ns,0) * 10ps rise & fall time; 100ns PW * 4.012ns - 4ns = 0.012ns = 12ps; 10% to 90% = 10ps * R1 99 1 10 R2 1 2 1.5 R3 3 0 20K
130
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
R4 3 4 1.5 R5 5 0 1K R6 1 6 0.5 R7 3 7 1 * C1 1 0 20pF C2 6 5 5pF C3 5 0 20pF * L1 2 3 1uH L2 7 0 2mH L3 4 5 1uH * .TRAN 1ns 200ns 0ns 2ps .PRINT TRAN V(99) V(1) V(3) V(5) .OPTIONS ITL5=0 .OPTIONS NOECHO NOPAGE NOMOD .END Tnom := READPRN(“c:\SPICEapps\datfiles\xformer_tran.txt”) N := rows(Tnom) N = 201 k := 1..N Spice verification
15
Volts
Tnomk,3 Tnomk,4
10 5
Tnomk,5 0 –5
0
50 V1 V3 V5
100 Tnomk,1 ns Time(ns)
150
200
Transient Analysis
131
6.6 PASSIVE RCL CIRCUIT TRANSIENT ANALYSIS The same circuit was used in Section 2.1 (Introduction). L3 R1
V1
C1
R2
V2
V3
Ein
R1 := 10 C1 := 0.1·u
R2 := 100 C2 := C1
99 1 RR := 2 3
1 2 3 0
Ein := (99
1)
R1 R4 R2 R 3
C2
R3
R4
L4
R3 := 50·K R4 := 10·K L3 := 2533.03·u L4 := 25.3303·u 1 CC := 3
EE := 0
2 0
GG := 0
C1 C2
1 LL := 3
U := 3
L 3 L 4
2 0
Y := (1
2
3)T
→ Reference:C:\mcadckts\CaNL11\comm42.mcd 1 = 25.33 u max ( A )
1 = 0.1 u min ( A )
Select ∆t as: ∆t := 0.02·u Set period: Tper := 100·u
Tper kmax := floor ∆t
kmax = 5000
Create delayed input pulse as before: pulse(x, w) := φ(x) – φ(x – w) bpf(x, f, w) := pulse(x – f, w) Pulse width = Tper (0.5) = 50 u
Eapp(t) := bpf(t, 0.05·Tper, 0.5·Tper)
Instead of looking at the output voltage nodes Y, we have the option of looking at the capacitor voltages and inductor currents using the following seeded iteration method. V1 is the voltage across C1, V2 on C2, I3 is the current in L3, and I4 in L4.
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
k := 2..kmax Initialize: V11 0 V21 0 := I31 0 I4 0 1 Iterate: V1k V1k −1 V1k −1 V2 k V2 k −1 V2 k −1 := A ⋅ ⋅ ∆t + B ⋅ Eapp ( k ⋅ ∆t ) ⋅ ∆t + I3k I3k −1 I3k −1 I4 I4 I4 k k −1 k −1 Output plots: Input pulse and transients on C1 & C2
1.2 0.8 V1k Volts
132
Eapp(k . ∆t) 5 . V2k
0.4 0 –0.4 –0.8
0
20
V1 Input pulse 5 x V2
V2 is scaled by 5
40
60
k . ∆t u Time(us)
80
100
Transient Analysis
133 Transient currents thru L3 & L4
15
Current (mA)
12.5 10
I3k
7.5
m
5
I4k
2.5
m
0 –2.5 –5
0
20
40
I3 I4
60
80
100
k . ∆t u Time(us)
6.7 MATHCAD’S DIFFERENTIAL EQUATION SOLVERS Consider passive RCL circuits (compare with the NDS method). For schematic and component values, see Section 6.6. → Reference:C:\mcadckts\CaNL11\LCtran.mcd Transient Analysis Using rkfixed or Rkadapt Functions Only step functions can be used. Pulse, ramp, and triangular input waveshapes require use of the NDS transient analysis method. Set time period T as: T := 100·u Set maximum number of time points: kmax := 200 Initialize x and form the {N 1}array D(t,x) from elements of the A and B arrays obtained from comm42.mcd. 0 0 x := 0 0
A1,1x1 + A1,2 ⋅ x 2 + A1,3 ⋅ x 3 + A1,4 ⋅ x 4 + B1 A 2,1x1 + A 2,2 ⋅ x 2 + A 2,3 ⋅ x 3 + A 2,4 ⋅ x 4 + B2 D ( t, x ) : = A 3,1x1 + A 3,2 ⋅ x 2 + A 3,3 ⋅ x 3 + A 3,4 ⋅ x 4 + B3 A x + A ⋅ x + A ⋅ x + A ⋅ x + B 4 ,1 1 4 ,2 2 4 ,3 3 4 ,4 4 4
134
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Call rkfixed: Z := rkfixed(x, 0, T, kmax, D) “rkfixed” uses a constant internally calculated ∆t. The Mathcad ordinary differential equation (ODE) solver “Rkadapt” uses a variable ∆t that can be faster because ∆t is large for slowly-varying outputs and small for fast-varying outputs. It is called in the same manner as “rkfixed.” Z : = Rkadapt(x, 0, T, kmax, D)
n := 1..kmax
(Note: To verify identical outputs with rkfixed and Rkadapt, right-click on Z statement, and then click “Disable Evaluation.” A black square will appear denoting disabled. Then compare with the following plots.) C1 & C2 voltage waveforms 1.2
Volts
0.8 Zn,2
0.4
5 . Zn,3
0 −0.4 −0.8
0
20
40
60
80
100
Zn,1 u Time(us)
Vc1 Vc2
L3 & L4 inductor current
15
Current (mA)
12.5 Zn,4 mA Zn,5 mA
10 7.5 5 2.5 0 −2.5 −5
0
20 L3 L4
40
60 Zn,1 u Time(us)
80
100
Transient Analysis
135
Stiff ODEs can be defined as a large disparity between absolute minimum and maximum values of the elements of the A matrix, i.e., very slow and very fast time constants in the circuit (the slow ones are “stiff”). This circuit is not stiff, but the pulse transformer model given earlier is, and the function rkfixed did not provide the correct output. For stiff circuits, use “Stiffb” as follows: initialize and form the {N N+1} Jacobian array function J(t,x) using the elements from the A matrix: 0 0 x := 0 0
0 0 J ( t, x ) : = 0 0
A1,1
A1,2
A1,3
A 2,1
A 2 ,2
A 2,3
A 3,1
A 3,2
A 3,3
A 4 ,1
A 4 ,2
A 4 ,3
A1,4 A 2,4 A 3,4 A 4 ,4
Call the function: Z := Stiffb(x, 0, T, kmax, D, J) Same output: Compare these step input waveforms with the plots in Section 6.6. C1 & C2 voltage waveforms
1.2
Volts
0.8 0.4
Zn,2 5 . Zn,3
0 −0.4 −0.8 0
20
40
60
80
100
Zn,1 u Time(us)
6.8 A MATHEMATICAL PULSE WIDTH MODULATOR (PWM) us := 10–6
KHz := 103
This PWM will be used as the switching function for the power supply presented in Section 6.9.
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
User inputs: Fsw := 50·KHz
Nper := 4 (number of periods)
Du := 0.5 (duty cycle)
Per :=
1 Fsw
Per = 20us
Nper ⋅ Per + 0.5 kmax : = floor ∆t
∆t := 0.1·us
kmax = 800
(1 − Du ) ⋅ kmax Du ⋅ kmax K2 : = floor + 0.5 K1 : = floor + 0.5 Nper Nper K1 = 100 K2 = 100 kper := K1 + K2 kper = 200 po : = c ← 1 p1 ← 1 for k ∈ 2..kmax p k ← 1 if k ≥ 1 + ( c − 1) ⋅ kper ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0.05 otherwise c ← c + 1 if k ≥ c ⋅ kper p k := 1..kmax PWM output 1 Switch on/off
136
pok
Du = 0.25
0.5 0
0
10
20
30
40 50 k . ∆t us Time(us)
60
70
80
Transient Analysis
137 PWM output
Switch on/off
1
pok
0.5 0
0
10
20
30
40 50 k ⋅ ∆t us Time(us)
60
70
80
Du = 0.5
6.9 SWITCHING POWER SUPPLY OUTPUT STAGE — BUCK REGULATOR This section analyses the turn-on (start-up) transient of a switched-mode power supply. us := 10–6 ms := 10–3
uF := 10–6 mV := 10–3
uH := 10–6 Meg := 106 3 KHz := 10
Sw1 represents the switch internal to the pulse width modulator (PWM). Sw2 represents the flywheel diode. When Sw1 is ON, Sw2 will be OFF, and vice versa. This section utilizes the Pulse Width Modulator (PWM) of Section 6.8. Ein
1
Sw1
2
V1
R1
V2
L1
1
R2
−
Sw2 2
V3 R3 V4
+ C1
R1 := 0.3 R2 := 0.085 R3 := 38 L1 := 20·uH U := 4 Y := 3
C1 := 47·uF
User inputs:
Fsw := 50·KHz
Nper := 20
Du := 0.5 (50% duty cycle)
Per :=
1 Fsw
Per = 20us
138
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
∆t = 1·us
Nper ⋅ Per kmax : = floor + 0.5 ∆t
kmax = 400
Ein := (99
1)
(1 − Du ) ⋅ kmax K1 := floor + 0 Nper
Du ⋅ kmax K2 : = floor + 0.5 Nper kper := K1 + K2 Switch ON/OFF resistances: Q1on := 1
Q1off := 10·Meg
99 1 RR := 1 3 3
1
EE := 0
0 2 4 0
Q1on Q 2 off R1 R 2 R 3
Q2on := 1
CC := (4
0
Q2off := 10·Meg
C1)
LL := (2
3
GG := 0
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A
B := B
Don := D
Eon := E
Change switch positions: RR1,3 := Q1off
RR2,3 := Q2on
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A
Boff := B
Doff := D
Eoff := E
Ein := 15
L1)
Transient Analysis
139
Vo : = c ← 1 0 Vc1 ← 0 Vo1 ← 0 p1 ← 1 for k ∈ 2..kmax p k ← 5 if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← 0 otherwise c ← c + 1 if k ≥ c ⋅ kper if p k = 5 Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Don ⋅ Vc k + Eon ⋅ Ein if p k = 0 Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Ein ⋅ ∆t + Vc k −1 Vo k ← Doff ⋅ Vc k + Eoff ⋅ Ein Vo p Pulse height is set to 5 V, see on the following plot. K := 1..kmax
M1 := Ein·Du
M1 = 7.5
Theoretical output = M1 = input times duty cycle.
140
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad 10 M1
|(Vo1)k| (Vo2)k
5
0
0
50
100
150
200 k . ∆t us
250
300
350
400
M3 := 7.42 M2 := 7.08 Ripple amplitude M3 – M2 = 340 mV 7.5
|(Vo1)k| (Vo2)k
M3
7.25 M2 7 300
320
340
360
380
400
k ⋅∆t us
6.10 STATE SPACE AVERAGING State Space Averaging was developed by Dr. R.D. Middlebrook of the California Institute of Technology in the early 1980’s. The concept itself is not difficult, but in those days the difficult part was the amount of algebra one had to resort to in obtaining the state space arrays. (See Section 1.1.1., Introduction, and Section 2.2). The NDS method now provides a painless method of obtaining the state space arrays, A, B, D, & E, greatly simplifying the process of State Space Averaging, as will be seen in this section. uF := 10–6 mV := 10–3 C1 := 47·uF
uH := 10–6 Meg := 106 us := 10–6 V := 1 R1 := 0.3 R2 := 0.085 L1 := 430·uH U := 6 Y := 6
V99 1
2
V1
Ein1 Sw1
Vs
R1
V2
+ −
+
V98
L1
V6
1 R2
Sw2 Ein2
V4
ms := 10–3 R3 := 38
V3
2
C1
−
− +
+
Vf
R3 V5
Transient Analysis
141
User inputs: 15 1
99 Ein := 98
Du := 0.63
Switch ON/OFF resistances: Q1on := 0.001 99 2 RR := 2 6 6 GG := 0
Q1off := 10·Meg
1 3 4 5 0
Q1on Q 2 off R1 R 2 R 3
Vs := 0.1
Q2on := 0.001
CC := (5
0
C1)
1 EE := 3
Vf := 0.7
Q2off := 10·Meg
LL := (4
2 0
98 0
0 98
6
L1)
Vs Vf
Vs is switch drop (e.g., Vcesat) Vf is diode forward drop. → Reference:C:\mcadckts\CaNL11\comm42.mcd Aon := A
Bon := B
Don := D
Eon := E
Change switch positions: RR1,3 := Q1off
RR2,3 := Q2on
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A
Boff := B
Doff := D
Eoff := E
Averaging the arrays with duty cycle Du: A := Du·Aon + (1 – Du)·Aoff D := Du·Don + (1 – Du)·Doff
B := Du·Bon + (1 – Du)·Boff E := Du·Eon + (1 – Du)·Eoff
Multiplying the state space arrays by the duty cycle (Du) and (1 – Du) as above, is the essence of the State Space Averaging concept. DC Analysis
X := –A–1·B
9.06 X= 0.24
vC1 i L1
Vodc := D·X
Vodc = 9.056V
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Theoretical no-loss output: Vt := Ein1,2·Du
Vt = 9.45V
AC Analysis BF := 2
ND := 2
i −1 PD Voi := db(cvi) L i := BF +
PD := 40
i := 1..ND·PD + 1
s := 2 ⋅ π ⋅ 10 L ⋅ −1
cvi := D·(si·I – A)–1·B + E
M3 := db(Vodc) DC & AC buck converter output y/u
40 30
M3
20 dBV
142
Voi
10 0 −10 −20
2
2.5
3 Li
3.5
4
Log freq(Hz)
Compare results with conventional state space methods [1] [2]: R2 W := −R 3 Ein1,2 u : = Vs Vf
B1 := C·S1·U B2 := C·S2·u
1 1
−1 Q := 0
C1 P := 0 15 u = 0.1 0.7
0 L1
− R1 − ( R1 + R 3)
1 S1 := 1
C := (W·P)–1
0 S2 := 0
0 0
−1 −1
A1 := C·C
−1 −1
A2 := A1
Compare arrays from conventional and NDS methods:
0 0
Transient Analysis
143
As := Du·A1 + (1 – Du)·A2 −558.66 As = −2320.39
Bs := Du·B1 + (1 – Du)·B2 −558.66 A= −2320.39
21229.11 −894.91
1.04 × 10 −12 Bs = 21227.91
21229.11 −897.23
0 B= 21227.91
6.11 SIMPLE TRIANGULAR WAVEFORM GENERATOR This section shows the implementation of a simple triangular wave generator that can be used as an input for transient analysis of other circuits. This analysis uses the PWM given in Section 6.8. K := 103
uF := 10–6
us := 10–6
Meg := 106
ms := 10–3
Hz := 1
C1 V2 Ein1
Ein2
2 2
1
V1 R1
11 2 − V−
1
3 +
V3 1
V+ 4
R1 := 10·K C1 := 0.05·uF U := 3 Y := 3 CC := (2 GG := 0 EE := (3 0 0 2 106) LL := 0
3
C1)
Switch is a SPDT CMOS type.
Fsw := 500·Hz ∆t := 5·us 99 Ein := 98
Du := 0.5
Nper := 5
Per :=
Nper ⋅ Per kmax : = floor + 0.5 ∆t 1 −1
1 Fsw
Per = 2ms
kmax = 2000
Du ⋅ kmax K2 : = floor + 0.5 Nper
(1 − Du ) ⋅ kmax K1 := floor + 0 Nper
kper := K1 + K2
Switch ON/OFF resistances: Q1on := 50
Q1off := 10·Meg
kmax·∆t = 10 ms
Einampl := 5
144
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
1 RR := 99 98
2 1 1
R1 Q1on Q1off
→ Reference:C:\mcadckts\CanL11\comm42.mcd Aon := A
Bon := B
Don := D
Eon := E
Bon = (1990)
Change switch positions: RR2,3 := Q1off
RR3,3 := Q1on
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Aoff := A
Boff := B
Doff := D
Eoff := E
Boff = (–1990)
Vo : = c ← 1 Vc1 ← 0 Vo1 ← 0 p1 ← 1 Hi ← 4.8 Lo ← 0.2 for k ∈ 2..kmaax p k ← Hi if k ≥ kper ⋅ ( c − 1) + 1 ∧ k ≤ K 2 + ( c − 1) ⋅ kper p k ← Lo otherwise c ← c + 1 if k ≥ c ⋅ kper Vc k ← Aon ⋅ Vc k −1 ⋅ ∆t + Bon ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Hi Vc k ← Aoff ⋅ Vc k −1 ⋅ ∆t + Boff ⋅ Einampl ⋅ ∆t + Vc k −1 if p k = Lo Vc p k := 1..kmax (switch position shown for reference)
Transient Analysis
145 Output at node Y
Volts
10 |(Vo1)k|
5
(Vo2)k
0
1
0
2
3
4
5 6 . k ∆t ms Time(ms)
7
8
9
10
6.12 QUADRATURE OSCILLATOR This section shows how the NDS transient analysis method can be used to analyze oscillators. Since there is no independent inputs in oscillator circuits, we must provide non-zero initial voltage conditions on the capacitors. This is illustrated below. K := 103
Hz := 1
nF := 10–9
us := 10–6
ms := 10–3
C1 R1 V1
2 − 3 +
11 V−
V2 1
V+ 4
R2 V3
3
C2
2 R3
V5
+ −
4 V+
1
V− 11
V4 C3
V4
R1 := 10·K
R2 := R1
4 Y := 4 RR := 2 0
C3 := C1
U := 5
Ao := 106
GG := 0
2 EE := 4
0 0
R3 := R1
0 3
LL := 0 1 5
Ao Ao
C1 := 1 3 5
Ein := (99
100 ⋅ nF 2⋅π R1 R 2 R 3
C2 := C1 1 CC := 3 4
2 0 5
C1 C2 C 3
0) Ein is a dummy variable here.
146
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
→ Reference:C:\mcadckts\CaNL11\comm42.mcd 0 B = 0 0
D = (0
1
1)
E = (0)
Because there is no independent input, B is a null array. tau1 : =
1 max ( A )
V11 1 V21 : = 1 V3 1 1
tau 2 : =
1 min ( A )
159.16 tau = us 159.15
Initial capacitor voltages = 1 V.
∆t := 5·us
kmax := 500
V1k V1k −1 V1k −1 V2 k : = A ⋅ V2 k −1 ⋅ ∆t + B ⋅ ∆t + V2 k −1 V3 V3 V3 k k −1 k −1
k := 2..kmax
V1k Vo k := D ⋅ V2 k V3 k
Per := kmax·∆t
Per = 2.5 ms
Capacitor voltages 4
Volts
V1k V2k V3k
2 0 −2 −4
0
500
V1 V2 V3
1000
1500 k ⋅ ∆t us Time(us)
2000
2500
Transient Analysis
147
All values are initialized at 1 V as before. M1 := 690
M2 := 1690
F := M2 – M1
F = 1000Hz
Output at node Y 5
Volts
M1 Vok
M2
0
−5
0
500
1000
1500
2000
2500
k⋅ ∆t us Time(us)
Verification of A matrix using algebraic method
1 W := 0 0
0 1 0
0 0 1
0 −1 Q := R2 0
1 R1 −1 R2 1 R3
1 R1 0 0
C1 P := diag C2 C 3
As := (W·P)–1·Q 0 As = −6283.185 0 −0.006 A = −6283.179 0 eigenvals ( A ) Le := 2⋅π
6283.185 −6283.185 6283.185 6283.179 −6283.185 6283.179
6283.185 0 0 6283.179 0 −0.006
−0 + 1000 i Le = −0 − 1000 i −1000
|Le1| = 1000
Eigenvalues indicate the frequency of oscillation (triple pole at 1000 Hz).
148
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
6.13 WEIN BRIDGE OSCILLATOR This section shows one more example of oscillator transient analysis using the NDS method. K := 103
nF := 10–9
KHz := 103
us := 10–6
R5
R6
V1
11 2 − V− + V+
3 V2
C4 := 10·nF
EE := (4
0
R6 := 20·K R1 :=
2
1
V3 R1
R2
ms := 10–3
1 2 ⋅ π ⋅ fo ⋅ C 3
106)
4
C3
C4
R5 := 10·K
V4 1
fo := 10·KHz C3 := 10·nF
R2 := R1
1 4 RR := 4 2
LL := 00
GG := 0
R 5 R 6 R1 R 2
0 1 3 0
3 2 C 3 CC := U := 4 Y := 4 2 0 C 4 (Ein is a dummy variable) Ein := (99 0) → Reference:C:\mcadckts\CaNL11\comm42.mcd −62831.9 A= −62831.9
125663.1 62831.3
0 B= 0
D = (0
3) E = (0)
No independent input, B = 0. ∆t := 0.01·us Per := 500·us
kmax :=
Per ∆t
kmax = 50000
k := 2..kmax There is no independent input; hence, an initial condition voltage to start the oscillation must be given to one or both capacitors.
Transient Analysis
V11 := (1
149
1)T
V1k := A·V1k–1·∆t + V1k–1 1 = 100 us 10 ⋅ KHz
Vok := D·V1k
Volts
Output at node Y
Vok
4 3 2 1 0 −1 −2 −3 −4
0
50
100
150
200
250
300
350
400
450
500
k⋅ ∆t us Time(us)
Verification of A matrix (assumes ideal opamp):
1 W := R1
−1 0
0 Q := −1
1 R2 R6 R5
C3 P := diag C 4
As := (W·P)–1·Q −62831.9 As = −62831.9
125663.7 62831.9
−62831.9 A= −62831.9
125663.1 62831.3
The oscillation frequency is the geometric mean of the two eigenvalues:
Le := eigevals(A)
−0.283 + 62831.853i Le = −0.283 − 62831.853i
fo :=
Le1 ⋅ Le 2 2⋅π
fl = 10KHz
REFERENCES 1. R.D. Middlebrook, et al., Using Small Computers to Model and Measure Magnitude and Phase of Regulator Transfer Functions and Loop Gain, Advances in SwitchedMode Power Conversion, Vols I & II, TESLACo, 1983. 2. R. Boyd, State Space Averaging with a Pocket Calculator, Proceedings of High Frequency Power Conversion Conference, Santa Clara, CA, 1990, p. 283.
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7
DC Circuit Analysis
DC analysis has been demonstrated in the introductory RCL circuit (see Section 2.1). What follows are DC analyses that will further illustrate how to use the NDS method.
7.1 RESISTANCE TEMPERATURE DETECTOR (RTD) CIRCUIT R8 Eref
V6
R9
11 2 − V− 3 +
Eref
V7
R2
R1
V+
1 4
R3
V1 R4 V3 RT V2 R5 R6
V4
11 2 − V− 3 +
V5 1
V+ 4
R7
Eref
R1 := 4.53 R2 := 34.8 R3 := 132 R4 := 9.09 R7 := 27.4 R8 := 20 R9 := 20 RT := 1.915 Eref := 5
R5 := 9.09
R6 := 4.53
Values in kohms: Opamp open loop gain: Ao := 106 RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C).
151
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
7 99 3 1 2 RR := 99 4 99 6 1 U := 7
R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT
1 3 5 3 4 2 0 6 7 2
Y := 5
7 EE := 5
GG := 0
0 0
Ein := (99
0 4
Ao Ao
6 3
Eref)
Note: For DC analysis, CC and LL component arrays are not required. Hence, only six inputs, RR, EE, U, Y, GG, and Ein, are now required for the subprogram dccomm42.mcd. Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd Vn :=1solve(A1, B2) V1
(
Vn T = −0.535
V2
V3
1.07
0.803
Vo = 4.326
Vo := VnY
V4
V5
V6
V7
0.803
4.326
5 × 10 −6
−5
)
Y=5
Note that nodes V3 (Vn3) and V4 (Vn4) are equal owing to the opamp, and that node V6 is approximately zero as expected.
7.2 AN UNDERGRADUATE EE TEXTBOOK PROBLEM Unit suffixes: V := 1
Amps := 1
All four types of controlled sources: VCVS, CCVS, CCCS, VCCS. R7
EE1
Ein
V1
+ −
V2
EE2
V3
+ −
V4 R3
V6
R4 R5
+
GG1
+
−
−
R6
R1 := 2 R7 := 1
R2
V5
R2 := 2 R3 := 4 Ein := (99 24.5)
R4 := 3
R5 := 6
R6 := 2
GG2
R1
DC Circuit Analysis
153
The controlled source equations are as follows:
EE1 = (VCVS)
EE2 = 8.la (CCVS)
Ia =
V6 R1
GG1 := 6.la (CCCS)
GG2 = 2·V6 (VCCS)
7.2.1 MATRIX SOLUTION TO DEMONSTRATE NDS METHOD
THE
UTILITY
OF THE
Igg1 is the current of GG1, Igg2 is GG2 current. Note column headers for A. V1
1 R5 A :=
+
1 R6
V2 +
1
1
R7
R4
V3 −
1 R4
−1
−1
1
R5
R4
R4
0
0
0
+ +
V4 1
R5
0
1 0
0
1
−1 R3
1
−1
−1
R3
R3
R1
0
0
0
0
1
1
−1
0
R3
0
1
0
−1
0
0
0
0
−
Igg1 Igg 2
0
1
R2 0
V6
R5
0
0
0
V5
1 + R1
0
R2 1
−8
0
0
R1
0
−3
9
−6
1
R1 0
Ein1,2 R7 0 0 B := 0 0 0 0 0 V1 Vn T = (14.50
0
0
0
0
−2
0
Vn := 1solve(A, B)
V2
V3
V4
V5
V6
13.00
8.00
6.00
1.00
0.50
Igg1 1.50
Igg 2 1.00 )
0 −1 0 0 0 0 1 0
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Using the NDS method: 1 EE := 3
2
6
0
4
6
0
6 5 4 RR := 2 1 1 99
3 8 R1
R1 R2 R 3 R 4 R5 R6 R 7
0 6 5 3 3 0 1
3 GG := 5
0
6
0
0
6
0
6 R1 2
U := 6
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vdc := 1solve(A1, B2) V1 VDC T = (14.5 Igg1 := Vdc7
V2
V3
V4
V5
13.0
8.0
6.0
1.0
Igg2 := Vdc8
V6
Igg1 Igg 2
0.5
Igg1 = 1.5 Amps
1.0 )
1.5
Igg2 = 1 Amps
7.3 DC TEST CIRCUIT This section exercised the NDS method using a DC circuit with multiple inputs and four VCVS’s and three VCCS’s embedded in a resistive network. The solutions are then compared to a SPICE simulation. K := 103
mA := 10–3 R12
V10 R15 V11
Ein4 (96) GG3
EE4 + −
R1 Ein1 (99)
Ein3 (97)
−
R2
V2
− +
EE3
R13
V14 +
V1
V4 R6
R17
R16
V13
R5
V5
− +
R9
R7
V12
GG1 V3 R3
GG2
V6 + −
EE2
R4
V9 +
Ein2 (98)
−
V7 R11 V8 EE1
+ −
R14
DC Circuit Analysis
155
R1 := 1·K R2 := R1 R3 := R1 R4 := R1 R5 := R1 R6 := R1 R7 := R1 R9 := R1 R11 := R1 R12 := R1 R13 := R1 R14 := R1
R15 := R1
R16 := R1 U := 14
99 2 3 9 5 4 3 RR := 2 7 96 4 12 10 13 5
1 3 9 98 4 97 0 6 8 10 12 0 11 0 14
R1 R2 R3 R 4 R5 R6 R7 R9 R111 R12 R13 R14 R15 R16 R17
14 GG : = 7 13
3 9 10
12 3 96
R17 := R1
8 6 EE := 2 5
0 0 0
0 0 1 11
0.02 0.04 0.01
→ Reference:C:\mcadckts\CaNL11\comm42.mcd Vn := 1solve(A1,B2) p := 1..U Vndsp := Vnp See SPICE listing in the following section.
99 98 EIN := 97 96
4 3 12 4
0 4 4 0
5 −3 8 13
10 2 4 −2
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
NDS 2.8613 −9.2842 −2.8539 6.0727 7.1818 −17.8532 174.8829 Vnds p = 60.7273 −60.0048 81.1636 19.3273 3.0364 −130.0000 −53.5455
SPICE 2.8613 −92842 −28539 6.0727 7.1818 −17.8530 174.8800 Vsp : = 60.7270 −60.0050 81.1640 19.3270 3.0364 −130.0000 −53.5450
Vnds −1 pce := Vsp
Percent error −0.001 −0 −0 0 0 0.001 0.002 pce = 0 −0 −0 0.001 −0.001 0 0.001 The last three entries (not shown) in Vn are the currents through GG1, GG2, and GG3, respectively. Igg1 := Vn15 Igg2 := Vn16 Igg3 := Vn17
Igg1 = 60.73 mA Igg2 = –114.16 mA Igg3 = 130 mA
DC Circuit Analysis
SPICE Comparison Testdc4a VEin1 99 0 DC 5 VEin2 98 0 DC -3 VEin3 97 0 DC 8 VEin4 96 0 DC 13 R1 99 1 1K R2 2 3 1K R3 3 9 1K R4 9 98 1K R5 5 4 1K R6 4 97 1K R7 3 0 1K R9 2 6 1K R11 7 8 1K R12 96 10 1K R13 4 12 1K R14 12 0 1K R15 10 11 1K R16 13 0 1K R17 5 14 1K * EE1 8 0 4 0 10 EE2 6 0 3 4 2 EE3 2 1 12 4 4 EE4 5 11 4 0 -2 * GG1 14 3 12 0 0.02 GG2 7 9 3 0 0.04 GG3 13 10 96 0 0.01 *
157
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
.OPTIONS NOMOD NOPAGE NOECHO .END **** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE (1) 2.8613 (2) -9.2842 (3) -2.8539 (4) 6.0727 (5)
7.1818
(6)
-17.8530
(9)
-60.0050
(10)
81.1640
(11)
(13) -130.0000
(14)
-53.5450
(96)
(98)
(99)
5.0000
-3.0000
(7) 174.8800
(8)
60.7270
19.3270
(12)
3.0364
13.0000
(97)
8.0000
VOLTAGE SOURCE CURRENTS NAME
CURRENT
VEin1
-2.139E-03
VEin2
-5.700E-02
VEin3
-1.927E-03
VEin4
6.816E-02
7.4 STACKING VCVS’s AND PARALLELING VCCS’s This DC circuit shows that VCCS’s can be paralleled and VCVS’s can be connected in series (stacked). K := 103
mA := 10–3 R1 Ein1
V1 + −
GG2
R2
V2
Ein2
GG1 R4 −
+
R5 V3
+ −
V4
+ −
R1 := 1·K
R2 := R1
R3 := R1
R3
R4 := R1
EE1 EE2
R5 := R1
U := 4
DC Circuit Analysis
99 1 RR := 2 1 2 1 GG : 1
0 0
159
1 2 98 0 3 2 3
0 0
R1 R2 R 3 R 4 R 5 0.1 0.2
3 EE : = 4
4 0
2 1
0 0
2 3
99 Ein : 98
2 −3
→ Reference:C:\mcadckts\CaNL11\comm42.mcd
Vn := A1–1·B2
0.5768 −06930 0.3444 Vn = 1.7303 −0.0693 0.0689
Igg1 is the current in GG1, and Igg2, the current in GG2. Igg1 := Vn5
Igg2 := Vn6
−69.30 Igg = mA 68.87
7.5 DC VOLTAGE SWEEP (RTD CIRCUIT) For the schematic and component values, see Section 7.1. (Get circuit data from Section 7.1.) → Reference:C:\mcadckts\CaNL11\dctrd.mcd Ein := (99 1) Reset Ein to 1 V for new inputs u: → Reference:C:\mcadckts\CaNL11\comm42.mcd Sweep the DC input (always initialized at 1 V as mentioned earlier) from 4.8 V to 5.2 V in 0.1V increments:
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
u : = for j ∈1..5 u1, j ← 4.7 +
j 10
u Vn := A1–1·B2·u
k := 1..cols(u)
Display node Y: Y=5 Input 4.8 4.9 u T = 5.0 5.1 5.2 Output
Vn Y,k
4.153 4.239 = 4.326 4.412 4.499
Nominal value of u is 5.0 V Display for all U nodes: u = (4.8
4.9
5.0
−0.514 1.027 0.771 Vn = 0.771 4.153 −6 4.9 × 10 −4.8
5.1
5.2)
−0.525 1.048 0.787 0.787 4.239 4.9 × 10 −6 −4.9
−0.535 1.07 0.803 0.803 4.326 5 × 10 −6 −5
−0.546 1.091 0.819 0.819 4.412 5.1 × 10 −6 −5.1
−0.557 1.113 0.835 0.835 4.499 5.2 × 10 −66 −5.2
DC Circuit Analysis
161
7.6 RTD CIRCUIT — STEP RESISTOR VALUE R8
R9
V6
Eref
11 2 − V− 3 +
Eref
V7
R2
R1
V+
1 4
R3
V1 R4 V3 RT V2 R5 R6
V4
11 2 − V− 3 +
V5 1
V+ 4
R7
Eref
R1 := 4.53 R6 := 4.53
R2 := 34.8 R7 := 27.4
R3 := 132 R4 := 9.09 R5 := 27.4 R8 := 20 R9 := 20 RT := 1.915
Values in kohms: RTD value (RT) varies from 1 K (Vo is approximately –5 V at 0°C) to 2 K (Vo is approximately +5 V at +260°C). 7 99 3 1 2 RR := 99 4 99 6 1
1 3 5 3 4 2 0 6 7 2
R1 R2 R 3 R 4 R5 R6 R 7 R8 R9 RT
Ao := 106
7 EE := 5
0 0
0 4
6 3
U := 7 Y := 5 GG := 0 Ein := (99 5) Get A1 and B2 DC arrays, and solve for node voltages Vn. → Reference:C:\mcadckts\CaNL11\comm42.mcd vn := 1solve(A1, B2)
Vo := VnY
Vo = 4.326
Now, sweep RT value from 1 K to 2 K in 0.1 K increments. RT := (1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2)T
Ao Ao
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Ndc := rows(RT)
k := 1..Ndc
Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR10,3 ← RTk AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 vr The line RR10,3 ← RTk loads new values of RT into the RR array. For the line AE ← G(U, EE, GG, RR, Ein); the G function is from the dccomm42.mcd subprogram. Plot: V5 := Vn(U, EE, GG, RR, Ein) Check linearity with straight line equation:
V5k yk
5 3.75 2.5 1.25 0 −1.25 −2.5 −3.75 −5
RTD Ckt linearity
Linearity delta
0.3 0.2 Volts DC
Volts DC
yk := 10(RTk – 1) – 5
yk − V5k
0.1 0 −0.1 −0.2
1
1.2 1.4 1.6 1.8 RTk RT (K Ohms)
2
−0.3
1
1.2 1.4 1.6 1.8 RTk RT (K Ohms)
The maximum linearity temperature error is 260 ⋅ deg C maxerr : = 0.3 ⋅ V ⋅ 10 ⋅ V
maxerr = 7.8 degC
2
DC Circuit Analysis
163
We can step two resistor values simultaneously as shown here: Step R4 and R5 from 8K to 10K in 0.2 K increments: Ra := (8
8.2
8.4
8.6
Ndc := rows(Ra)
8.8
9
9.2
k := 1..Ndc
9.4
9.6
9.8
10)T
(Ra in kohms)
Vn ( U, EE, GG, RR, Ein ) : = for k ∈1..Ndc RR 4 ,3 ← Ra k RR 5,,3 ← Ra k AE ← G ( U, EE, GG, RR, Ein ) A1 ← AE1 B2 ← AE 2 vn k ← lsolve ( A1, B2 ) v5 k ← ( vn k )5 v5 Plot: V5 := Vn(U, EE, GG, RR, Ein) Marker for nominal values: M1 := 9.09
M2 := 4.326 V5 vs. R4 & R5
8
Volts DC
M1 6 V5k
M2 4
2
8
8.5
9 9.5 Rak R4, R5 (K Ohms)
10
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
7.7 FLOATING 5-V INPUT SOURCE K :=103 At times it may be desired to have an input voltage source floating. The restriction of all Ein inputs being single-ended can be overcome as shown. R1
V6 +
V1
R4
V2
EE1
11 2 − V−
R2
−
V7 R3
+ −
R6
V4
V3
V99
R5
3 +
V5 1
V+ 4
R7
Ein
R1 := 1·K R2 := 20 R3 := 1·K R4 := 20·K R5 := 200·K R6 := 20·K R7 := 200·K Ao := 106 U := 7 Y := 5 6 1 7 RR := 1 2 3 4
1 3 3 2 5 4 0
R1 R2 R 3 R 4 R5 R6 R 7
6 EE := 5
7 0
99 4
GG := 0
0 2
Ein := (99
1)
5 Ao
→ Reference:C:\mcadckts\CaNL11\comm42.mcd V := 1solve(A1, B2) VT = (–0.223 –0.247
–0.272
–0.247
Input voltage: V6 – V7 = 5
Vo := VY
Vo = –0.495
–0.495
2.253
–2.747)
DC Circuit Analysis
165
Matrix solution: 1 1 1 R1 + R 3 + R 2 + R 4 −1 R4 Am := 1 1 − + R 2 R1 + R 3 0 0
−1
1 1 + R 2 R1 + R 3
−
R4 1 R4
+ 0
1
0
R5 1 R1 + R 3
0 Ao
+
1 R2
+
0
Vm := 1solve(Am, Bm)
−1
0
R5
1
−1
R6
R6
0
−1 R6 0
1 1 + R6 R 7 − Ao
5 R1 + R 3 0 Bm := −5 R1 + R 3 0 0 −0.223 −0.247 Vm = −0.272 −0.247 −0.495
0
Vo := Vm5
Vo = –0.495
0 1
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8
Three-Phase Circuits
8.1 CONVERT ∆ FLOATING VOLTAGE INPUTS TO SINGLE-ENDED Y INPUTS Circuits with single-ended inputs are easier to solve than those with floating inputs. Setup: pr(E, θ) := E·(cos(θ) + i·sin(θ)) 180 (convert radians to degrees) π mp(x) := (|x| rd·arg(x)) (get magnitude and phase) Line-to-line voltages are (in polar form): (convert polar to rectangular) rd :=
A – B = 115 1, because the sensitivities are no longer 1.0 %/% Call tolerance array subprogram TolArray: → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T as a check: The tolerances are in the order RR, CC, LL (if any) and Ein.
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
R1
R2
R3
C1
C2 Ein
Tr
Tr
Tr
Tc
Tc
Te
−0.02 0.02
−0.02 0.02
−0.1 0.1
−0.1 0.1
0 0
−0.02 T= 0.02
Specify log AC frequency sweep and number of Monte Carlo samples Nk: BF := 2
ND := 2
PD := 50
Nk := 2000
Call the AC MCA subprogram: → Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Create plots: Note the plot parameters — MPmca (for magnitude/phase MCA) column 1 is the output due to uniform distribution inputs; column 2 is for the normal distribution. Nk = 2000
dBV
db[(MPmca1,1)i] db[(MPmca2,1)i] db[(MPmca3,1)i]
Y=3 25 20 15 10 5 0 −5 −10 −15 −20 −25
Uniform MCA at node Y
2
2.25
2.5
Unif MCA Lo Nom Unif MCA Hi
2.75
3 3.25 Li Log freq(Hz)
3.5
3.75
4
AC Circuits
253
dBV
db[(MPmca1,2)i] db[(MPmca2,2)i] db[(MPmca3,2)i]
25 20 15 10 5 0 −5 −10 −15 −20 −25
Normal MCA at node Y
2
2.25
2.5
Norm MCA Lo Nom Norm MCA Hi
2.75
3 3.25 Li Log freq(Hz)
3.5
3.75
4
11.6 BUTTERWORTH LOW-PASS FILTER EVA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2
ND := 2
PD := 50
Call EVA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\acwcalog.mcd Plot sensitivities: Note the slight bipolarity of R2 and C2 sensitivities — more on this later.
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities, R1, R2, R3
1 0
%/%
%/%
Sensi,1 Sensi,2 Sensi,3
−1 −2
2
2.5
3 3.5 Li Log freq(Hz)
R1 R2 R3
Sensitivities, C1, C2
0.5 Sensi,4 Sensi,5
0 −0.5 −1 −1.5
4
2
2.5 C1 C2
3 3.5 Li Log freq(Hz)
4
Y=3 EVA at node Y
25 20 15
dBV
db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]
10 5 0 −5 −10 −15 −20 −25
2
2.25
2.5
EVA Lo EVA Hi Nom
2.75
3 3.25 Li Log freq(Hz)
3.5
3.75
4
This plot is virtually the same as the uniform MCA plot in Section 11.5.
11.7 BUTTERWORTH LOW-PASS FILTER FMCA See Section 11.4 for the schematic. The calculation sequence is the same as that of MCA except for the last analysis subprogram called. → Reference:C:\crc_book_ms\wca_mcd\bwlpf_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
AC Circuits
255
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2
ND := 2
PD := 50
Call FMCA analysis subprogram for log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Y=3 FMCA at node Y
25 20 15 10 dBV
db[(MPfmca1)i]
5
db[(MPfmca2)i]
0
db[(MPfmca3)i]
−5 −10 −15 −20 −25
2
2.25
2.5
2.75
FMCA Lo Nom Norm Hi
3 3.25 Li Log freq(Hz)
3.5
3.75
4
Because the sensitivities are not significantly bipolar, there is no discernible difference between (uniform input) MCA, EVA, and FMCA.
11.8 MULTIPLE-FEEDBACK BAND-PASS FILTER (BPF) CIRCUIT A Multiple-Feeback Band-Pass filter circuit is now used for another example. This band-pass filter has a center frequency of 500 Hz, and Q of 20. The same calculation sequence as in Section 11.7 for the Butterworth low-pass filter will be performed. C2
R3 C1
R1 Ein
V1 R2
K :=103
uF := 10–6
Hz := 1
V2
11 2 − V− 3 +
V3 1
V+
V := 1
4
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
R1 := 6.34·K R2 := 80.6 R3 := 127·K C2 := C1 U := 3 Y := 3 Ein := (99 99 RR : 1 3
1 0 2
R1 R 2 R 3
GG := 0
EE := (3
1 CC := 3 0
0
2
2 1
C1 := 0.1·uF 1)
C1 C2
LL := 0
106)
11.9 MULTIPLE-FEEDBACK BPF MCA See Section 11.8 for the schematic and component values. The same calculation sequence (except for the last subprogram) is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display T for tutorial purposes: R1 −0.02 T= 0.02
R2
R3
C1
−0.02 0.02
−0.02 0.02
−0.1 0.1
C2 Ein −0.1 0.1
0 0
This can be overwritten by an asymmetric T array if desired: −0.02 T= 0.02
−0.02 0.02
−0.03 0.05
−0.05 0.15
−0.05 0.15
0 0
Specify linear frequency sweep and Nk: BF := 400
LF := 600
DF := 2
Nk := 2000
Call the MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Extreme center frequency markers from EVA analysis: M1 := 447
M2 := 568
Y=3
Nk = 2000
AC Circuits
257 Uniform MCA at node Y
12 M1
Volts
10 (MPmca3,1)i
8
(MPmca2,1)i
6
(MPmca1,1)i
4
M2
2 0 400
420
440
460
480
Uniform MCA Hi Nominal Uniform MCA Lo
F41 = 480Hz
500 520 Fi Freq(Hz)
540
560
580
600
(MPmca3,1)41 = 10.794V
This is to be compared with the EVA at this same 480-Hz frequency of 3.38 V (see Section 11.10) and the FMCA value of 7.73 V (Section 11.11). Hence, MCA gives the best answer. Normal MCA at node Y
12
M1
Volts
10 (MPmca3,2)i
8
(MPmca2,2)i
6
(MPmca1,2)i
4
M2
2 0 400
420
440
460
480
Normal MCA Hi Nominal
500 520 Fi Freq(Hz)
540
560
580
600
Normal MCA Lo
F41 = 480
(MPmca3,2)41 = 10.586V
The normal distribution maximum is at 480 Hz.
11.10 MULTIPLE-FEEDBACK BPF EVA See Section 11.8 for the schematic and component values. The same calculation sequence except for the last subprogram is called.
258
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
→ Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400
LF := 600
DF := 2
Call the EVA analysis subprogram for linear frequency sweep. → Reference:C:\mcadwca\wcaref11\acwcalin.mcd
Sensi,1
5
Sensi,2
0
Sensi,3
−5
Sensitivities, R1, R2, R3
−10 400
450 R1 R2 R3
500 550 Fi Freq(Hz)
Sensitivities, C1, C2
10
%/%
%/%
10
5
Sensi,4 Sensi,5
0 −5 −10 400
600
450 C1 C2
500 550 Fi Freq(Hz)
600
With the exception of R1, note the significant bipolarity of the aforementioned sensitivities. Extreme center frequency markers for symmetric tolerances: M1 := 447
M2 := 568 EVA Outputs
12
M1
Volts
10 (MPeva1)i
8
(MPeva2)i
6
(MPa1)i
4
M2
2 0 400
420
440
460
480
500 520 Fi Freq(Hz)
540
560
580
600
AC Circuits
259
This plot indicates that maximum amplitudes will only be obtained at 447 and 568 Hz. What about at, say, 480 Hz? F41 = 480Hz
(MPeva2)41 = 3.38V
Is 3.38 V the maximum this circuit will ever see at 480 Hz? The answer is no. See the FMCA analysis in Section 11.11.
11.11 MULTIPLE-FEEDBACK BPF FMCA See Section 11.8 for the schematic and component values. The same calculation sequence as in Section 11.8, except for the last subprogram, is called. → Reference:C:\crc_book_ms\wca_mcd\mfb_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Specify linear frequency sweep: BF := 400 LF := 600 (1-Hz increments)
DF := 1
Call FMCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=3 Extreme center frequency markers: M1 := 447
M2 := 568
480-Hz amplitude marker: M3 := 7.73·V
260
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Band pass filter FMCA
14 M1
12
Volts
(MPfmca1)i
M2
10
M3
8
(MPfmca2)i
6
(MPfmca3)i
4 2 0 400
420
440
460
FMCA Lo Nom FMCA Hi
F81 = 480
480
500 520 Fi Freq(Hz)
540
560
580
600
(MPfmca3)81 = 7.73V
Peak responses are shown here for 9 of the 32 possible tolerance combinations. This analysis says that 7.73 V is the maximum we will ever see at 480 Hz. This obviously contradicts the EVA, where 3.38 V was predicted as the maximum amplitude. The FMCA, although showing interesting plots, is also incorrect. For the best answer, see the previous MCA (Section 11.9).
11.12 SWITCHING POWER SUPPLY COMPENSATION CIRCUIT A switching power supply compensation circuit is now used for a third example. Again, the same calculation sequence as in Section 11.7 for the Butterworth lowpass filter will be perfomed. K := 103 Meg := 106 u := 10–6 n := 10–9 p := 10–12 C4 R3 V4 C2 R1 Ein
L1
R4
V2
R5 V6 C3 V5
R6
V1 R2
RL V3
C1
V7
11 2 − V− 3 +
1
V+ 4
R1 := 0.2 RL := 9 R2 := 0.01 R3 := 4.99·K R4 := 100·K R5 := 100·K R6 := 1·Meg C1 := 47·u C2 := 1·n C3 := 1·n C4 := 100·p L1 := 180·u U := 7 Y := 7 LL := (1 2 L1) Ein := (99 1)
AC Circuits
261
99 2 2 RR := 2 2 5 5
1 3 0 4 5 6 7
Ao := 106
EE := (7
R1 R2 RL R 3 R4 R5 R 6
3 4 CC := 6 5
0
0
5
0 5 7 7
C1 C2 C 3 C 4
GG := 0
Ao)
11.13 SWITCHING POWER SUPPLY COMPENSATION MCA For the schematic and component values, see Section 11.12. Call data from that circuit. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd Component tolerances: Tr := 0.02
Tc := 0.1
Ti := 0.2
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd Display tolerance array T from TolArray.mcd: Tr −2 T= 2
−2 2
−2 2
Tc −10 10
−2 2
−2 2 Ti
−10 10
−10 10
−20 20
−2 2
−2 2
−10 10
Te 0 % 0
Tolerance array T in RR, CC, LL, and Ein order. R1 R2 RL R3 R4 R5 R6 C1 C2 C3 C4 L1 Ein BF : = 2
ND : = 2
PD : = 40
Nk : = 2000
262
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
→ Reference:C:\crc_book_ms\Ref_files_v11\mcalog.mcd Y=7 Uniform & normal MCA at node Y
20
dBV
15 db[(MPmca3,1)i]
10
db[(MPmca2,1)i]
5
db[(MPmca1,1)i]
0
db[(MPmca3,2)i]
−5
db[(MPmca1,2)i] −10 −15 −20
2
2.2
2.4
2.6
Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Lo Normal MCA Hi
2.8
3 3.2 Li Log Freq(Hz)
3.4
11.14 SWITCHING POWER SUPPLY COMPENSATION EVA See Section 11.12 for the schematic. Call circuit data from that file: KHz = 103 → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0.2
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd BF := 2
ND := 2
PD := 50
→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Notch marker: Mn := 3.23
3.6
3.8
4
AC Circuits
263
Plot sensitivities on same vertical scale: R1, R2, RL, R3
2
R4, R5, R6, C1
2
Mn
Sensi,2 Sensi,3 Sensi,4
0
Sensi,6
2
3 Li
R1 R2 RL R3
0
Sensi,7 Sensi,8
−1 −2
1
Sensi,5 0 %/%
%/%
Sensi,1
Mn
1
−1 −2
4
2 R4 R5 R6 C1
3 Li
4
C2, C3, C4, L1
2
Mn
%/%
Sensi,9 Sensi,10 Sensi,11 Sensi,12
1 0 0 −1 −2
2 C2 C3 C4
3 Li
4
L1
Note that C1 and L1 are significantly bipolar and, therefore, nonmonotonic. Also note that in the following plot, there is a notch in the EVA Hi trace, which is due to the nonmonotonicity of C1 and L1. Hence, the EVA is incorrect in the vicinity of the notch. The notch is at Mn = 3.23 Y=7
fnotch := 10Mn
fnotch = 1.698KHz
264
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y
20
Mn
15
dBV
db[(MPeva2)i] db[(MPeva1)i] db[(MPa1)i]
10 5 0 −5 −10 −15 −20
2
2.2
2.4
2.6
EVA Hi EVA Lo Nom
2.8
3 3.2 Li Log Freq(Hz)
3.4
3.6
11.15 SWITCHING POWER SUPPLY COMPENSATION FMCA For the schematic see Section 11.12. Call circuit data from that file. → Reference:C:\crc_book_ms\wca_mcd\srcmod_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0.2
Te := 0
Specify component tolerances. → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 2
ND := 2
PD := 50
Specify AC log frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\fmcalog.mcd Call AC FMCA subprogram. Y=7
3.8
4
AC Circuits
265
FMCA at Node Y
20 15 10
dBV
db (MPfmca3)i
5
db (MPfmca2)i
0
db (MPfmca1)i
5 10 15 20
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
4
Li
Log Freq (Hz)
FMCA Hi Nom FMCA Lo
11.16 SALLEN AND KEY BAND-PASS FILTER (BPF) CIRCUIT This circuit will show an unusual response to MCA with common component tolerances but not with precise component tolerances. An explanation for this anomaly will be given. uF := 10–6
K := 103 R2 R1 Ein
V1 C1
C2
V2
3
R3
+
2 − V3 R4
4 V+
V4
1
V− 11 R5
R1 := 15.8·K R2 := 5.11·K R3 := 2.61·K C1 := 0.1·uF C2 := C1 U := 4 Y := 4
R4 := 3.32·K R5 := 13.3·K Ein := (99 1)
99 4 RR := 2 3 4
C1 C2
GG := 0
1 1 0 0 3
R1 R2 R 3 R 4 R 5
EE := (4
1 CC := 1
0 2
3
106)
0 2
LL := 0
266
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
11.17 SALLEN AND KEY BPF MCA See Section 11.16 for the schematic and component values. Call subprograms per previous sequences: → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\mcadwca\wcaref11\comm42.mcd The MCA outputs are first given using precision tolerances and then with common tolerances: Precision tolerances: Tr := 0.002
Tc := 0.01
Ti := 0.
Te := 0
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd R1
R2
R3
R4
R5
C1
−02 T= 0.2
−02 0.2
−02 0.2
−02 0.2
−02 0.2
−1 1
C2 Ein −1 1
0 % 0
Displayed in percentage. Specify linear frequency sweep and Nk: BF := 400
LF := 600
DF := 1
Nk := 2000
Call MCA analysis subprogram for linear frequency sweep. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd 10
Volts
(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i
Precision tolerances
8 6 4 2 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo
AC Circuits
267
Note that the center frequency of 500 Hz does not vary. Only the amplitude varies. Change to common tolerances: Tr := 0.02
Tc := 0.1
Call tolerance array subprogram again: → Reference:C:\mcadwca\wcaref11\TolArray.mcd −2 T= 2
−2 2
−2 2
−2 2
−2 2
−10 10
−10 10
0 % 0
Call MCA subprogram again. → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd Note change of vertical scale! Nk = 2000 1500
Volts
(MPmca3,1)i (MPmca2,1)i (MPmca1,1)i
Common tolerances
1200 900 600 300 0 400 425 450 475 500 525 550 575 600 Fi Freq(Hz) MCA Hi Nom MCA Lo
See the following text for an explanation of what causes the MCA spikes with common tolerances.
11.17.1 SALLEN AND KEY BPF — MCA AND PRECISION TOLERANCES
WITH BOTH
COMMON
This circuit is designed for a center frequency fo of 500 Hz, a peak gain of 10 V/V, and a Q of 10. Two output plots were shown. The first is with precision resistor tolerances of 0.2% and capacitor tolerances of 1%.
268
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Compare this plot with the second one, which uses common tolerances of 2% and 10% for resistors and capacitors, respectively. The common tolerance plot becomes “pathological” in that there are numerous spikes in the output. The reason for this can be found by looking at the transfer function for this circuit. The standard form of the band-pass transfer function is: G (s) =
N1s s2 + D1s + D 0
in which for this circuit, D1 =
1 1 2 R5 R 4 + R5 + − and N i = R1 ⋅ R 4 ⋅ C1 C1 R1 R 3 R 2 ⋅ R 4
The peak gain is given by Gpk =
N1 . Obviously, if D1 is ever zero or close to D1
it, Gpk will “blow up.” 1 2 R5 + = . R1 R 3 R 2 ⋅ R 4 By assigning tolerance multipliers of 0.982 for R2, 0.9816 for R4, and 1.02 for R5 (all at or within the ±2% tolerance), it will be found that D1 = 0.166, N1 = 3267.56, and Gpk = 19,688 or about 85 dBV. Given Nk Monte Carlo samples, it can be seen from the second plot that there are many more random tolerance combinations that will cause Gpk to become extremely high. Hence, the culprit here is the minus sign in D1, for which the analog circuit designer should be wary of in band-pass filter circuits using this topology. Because of the random nature of MCA, the size of the spikes will be different for each run. It was stated in the introduction to Part II that Monte Carlo analysis (MCA) will produce realistic results for virtually any circuit that has a reasonably accurate and stable mathematical model. Because one term (D1) of the transfer function can become negative, this causes unstable roots in the right-half s-plane. Hence, with the common tolerances, this circuit does not qualify. The reader is cautioned that in using the NDS method, this instability would not have been foreseen. Hence, the transfer functions G(s) still serve a useful purpose and should be examined when any erratic circuit analysis behavior is observed. D1 will be zero when
11.18 SALLEN AND KEY BPF EVA See Section 11.16 for the schematic and component values.
AC Circuits
269
→ Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400
LF := 600
DF := 2
→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd R1 is the middle trace in the following plot. Sign-change markers: M1 := 456
20 Sensi,1 Sensi,2 Sensi,3
M2 := 554
Sensitivities, R1 thru R5 10
10
M2
M1
5 Sensi,6
0
Sensi,7
Sensi,4
Sensi,5 −10 −20 400
Sensitivities, C1 & C2
0 −5
450 R1 R2 R3 R4 R5
500 Fi
550
600
−10 400
450 C1 C2
500 Fi
550
600
The following large ugly gap is caused by the sign changes of C1 and C2 sensitivities. Note markers M1 and M2. Again, nonmonotonic components = bipolar sensitivities, and EVA results are rendered meaningless.
270
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA output at node Y
20
M1
Volts
(MPeva1)i
M2
15
(MPeva2)i 10 (MPa1)i
5 0 400
425
450
475
EVA Lo EVA Hi Nom
500 525 Fi Freq(Hz)
550
575
600
11.19 SALLEN AND KEY BPF FMCA See Section 11.16 for the schematic and component values. → Reference:C:\crc_book_ms\wca_mcd\bpfs&k_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 400
LF := 600
DF := 2
→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=4 FMCA at node Y
80
Volts
(MPfmca3)i 60 (MPfmca2)i 40 (MPfmca1)i
20 0 400
425
450
FMCA Hi Nom FMCA Lo
475
500 525 Fi Freq(Hz)
550
Number of components in this circuit including the input: Nc := 8
575
600
AC Circuits
271
With common tolerances, some of the 2Nc = 256 tolerance combinations will cause Gpk (FMCA Hi) to be large.
11.20 STATE VARIABLE FILTER CIRCUIT This circuit is used to show the affects of increasing the number of Monte Carlo samples Nk. It will be shown that Nk and the tolerance band are of course directly proportional, but nonlinear. For example, doubling Nk does not double the width of the tolerance band. n := 10–9 K := 103 R3
V7
C1 R2
V2 2
R1 V1 Ein
3
− +
11
V3
V−
1
V+ 4
C2
V4 R4 2
−
3 +
11
V6
V5 R5
V− 1
V+
2
4
−
3 +
11
V7
V−
1
V+ 4 R8
V9 V1
R6
V5
R7 2 R9 V8 3
− +
11
V10
V− V+
1 4
R10
V7
R1 := 10·K R2 := 20·K R3 := 10·K R4 := 182·K R5 := 2.2·K R6 := 20·K R7 := 10·K R8 := 100·K R9 := 10·K R10 := 100·K C1 := 1.125·n C2 := C1 U := 10 Y := 10 Ao := 106 LL := 0 GG := 0 99 7 2 3 5 RR := 1 5 9 3 8
1 2 3 4 6 5 9 10 8 7
R1 R2 R3 R 4 R5 Ein := (99 R6 R7 R8 R9 R10
1)
4 CC := 6
5 7
C1 C2
272
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
3 5 EE := 7 10
0 0 0 0
1 0 0 8
Ao Ao Ao Ao
2 4 6 9
11.21 STATE VARIABLE FILTER MCA For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd T=
−2 2
−2
−2
−2
−2
−2
−2
−2
−2
−2
−10
−10
2
2
2
2
2
2
2
2
2
10
10
BF := 3000
LF := 7000
NP := 100
DF :=
LF − BF NP
0
0
%
Nk := 2000
→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plots show the effects of increasing Nk on the tolerance bands. Extreme center frequency markers from EVA 11.22: M1 := 4388 M2 := 5795 Nk = 20 Y = 10
Volts
140 120
Uniform MCA at node Y M1
M2
(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz) MCA Lo Nom MCA Hi
AC Circuits
273
Nk = 200 140
Volts
120
Uniform MCA at node Y M1
M2
(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)
Nk = 2000
Volts
140 120
Uniform MCA at node Y
M1
M2
(MPmca1,1)i 100 80 (MPmca2,1)i 60 (MPmca3,1)i 40 20 0 3000 3500 4000 4500 5000 5500 6000 6500 7000 Fi Freq(Hz)
11.22 STATE VARIABLE FILTER EVA For the schematic and component values, see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000
LF := 7000
DF := 20
→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd
274
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad Sensitivities
10
Sensi,3 Sensi,4 Sensi,5
5
Sensi,11 %/%
%/%
Sensi,2
0 −5 −10
3
4
R2 R3 R4 R5
Sensitivities
10
5 6 Fi K Freq(KHz)
5
Sensi,12
0
Sensi,13
−5 −10
7
3
4
C1 C2 Ein
5 Fi
6
7
K Freq(KHz)
The preceding plots show that 6 of the 13 components are nonmonotonic. Ein sensitivity is +1 as expected. Extreme center frequency markers: M1 := 4388
M2 := 5795 EVA at node Y
140
Volts
(MPeva2)i (MPeva1)i (MPa1)i
M2
M1
120 100 80 60 40 20 0 3000
3500
4000
EVA Hi EVA Lo Nom
4500
5000 5500 Fi Freq(Hz)
6000
6500
7000
The “spike” at 5 KHz is caused by the asynchronous polarity change of the nonmonotonic components. From the zoomed sensitivity plots below, all zero crossovers do not take place at the same frequency.
AC Circuits
275 Sensitivities
10 Sensi,3
5
Sensi,4
0
Sensi,5
−5 −10 4.9
5 %/%
%/%
Sensi,2
Sensitivities
10
Sensi,11
0
Sensi,12
−5 4.95
R2 R3 R4 R5
5 5.05 Fi K Freq(KHz)
−10 4.9
4.95
C1
5 5.05 Fi K Freq(KHz)
C2
Hence, at 5.00 KHz to 5.02 KHz, the polarity of the sensitivities are not changing sign together. This causes the EVA process, which detects sensitivity sign changes, to show a different magnitude in this 20-Hz frequency band.
11.23 STATE VARIABLE FILTER FMCA AND MCA COMBINED For the schematic and component values see Section 11.20. → Reference:C:\crc_book_ms\wca_mcd\ieeesvrs_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 3000
LF := 7000
DF := 20
Nk := 2000
→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd
276
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad FMCA & MCA at node Y
140 120
Volts
(MPmca3,1)i (MPfmca2)i (MPfmca3)i
100 80 60 40 20 0 3000
3500
4000
MCA Hi Nom FMCA Hi
4500
5000 5500 Fi Freq(Hz)
6000
6500
7000
Another telltale sign of nonmonotonic components is that MCA is greater than FMCA. This occurs at about 5400 Hz, as the following plot shows.
140
FMCA & MCA (Zoomed)
Volts
(MPmca3,1)i (MPfmca2)i 120 (MPfmca3)i 100 4000
4500
5000
5500
6000
Fi Freq(Hz)
11.24 HIGH-Q HUM NOTCH FILTER CIRCUIT The following circuit has an extremely sharp notch. This notch would be very difficult to realize on a circuit board due to temperature drift of the components. In spite of this, the circuit is interesting to analyze and show the response to component tolerance variation. K := 103
nF := 10–9
AC Circuits
277 RS RB
R7
V10
V5 2
−
3+
FNOTCH R1
C1
11
V6
V−
V7
R9
R10 V8
1
V+ 4
2
C2
1K R3
4 V+
1
V−
− 11 V9
R2
V4
3 +
R4
Ein 2 QNOTCH R6A
−
3+ V3
11 V− V+ 4 R6B
1 V9
R1 := 4.73·K R2 := 100·K R3 := 100·K R4 := 200·K R6 := 100·K R7 := 100·K R8 := 4.99·K R9 := 681·K R10 := 681·K Rs := 0.01 C1 := 3.9·nF C2 := C1 a := 0.01 (Qnotch (R6) pot setting factor can be set from 0.01 to 0.99.) R6A := a·R6 R6B := (1 – a)·R6 U := 10 Y := 9 Ao := 106 Ein :=(99 1) 99 4 99 1 3 RR := 3 5 5 6 7 99 2 EE := 6 9
R1 R2 R3 R 4 R 6 A R 6B R7 R8 R9 R10 Rs
4 0 1 2 0 9 0 6 7 8 10 0 0 0
3 4 8
1 5 9
10 CC := 2
Ao Ao Ao
8 7
C1 C2
LL := 0
GG := 0
278
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
11.25 HIGH-Q HUM NOTCH FILTER MCA For the schematic and component values, see Section 11.24. Get circuit data. → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, and E state space arrays. → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd Display tolerance array T: −2 2
−2
−2
−2
−2
−2
−2
−2
−2
−2
−2
−10
−10
2
2
2
2
2
2
2
2
2
2
10 0
10
BF := 50
LF := 70
DF := 0.1
0
0
Nk := 2000
→ Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd The following plot shows both uniform and normal minimums. Y=9 MCA at node Y
−10 −30 db[(MPmca1,1)i] dBV
T=
db[(MPmca2,1)i] db[(MPmca3,1)i] db[(MPmca1,2)i]
−50 −70 −90 −110 50
52
54
56
Uniform MCA Lo Nominal Uniform MCA Hi Normal MCA Lo
58
60 62 Fi Freq(Hz)
64
66
68
70
%
AC Circuits
279
11.26 HIGH-Q HUM NOTCH FILTER EVA See Section 11.19 (MCA) for schematic. Get circuit data → Reference:C:\crc_book_ms\wca_mcd\hiqhum_ckt.mcd Get A, B, D, & E state space arrays → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
Component tolerances in decimal percent → Reference:C:\crc_book_ms\Ref_files_v11\TolArray.mcd BF := 50
LF := 70
DF := 0.1
→ Reference:C:\crc_book_ms\Ref_files_v11\acwcalin.mcd 200
C1 sensitivity
200
Sensi,12
100 %/%
%/%
100
C2 sensitivity
0
Sensi,13
0
−100
−100
−200 54 56 58 60 62 64 66 Fi Hz
−200 54 56 58 60 62 64 66 Fi Hz
Note the extreme bipolarity. Also note that Vo approaches zero at F = 60 Hz. Hence, dividing by Vo here causes the sensitivities to be very large. Extreme notch frequency markers: M1 := 53.5 Y=9
M2 := 68.3
280
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad EVA at node Y
−10
dBV
db[(MPeva1)i] db[(MPeva2)i] db[(MPa1)i]
M2
M1
−30 −50 −70 −90 −110 50
52
54
56
58
EVA Lo EVA Hi Nom
60 62 Fi Freq(Hz)
64
11.27 HIGH-Q HUM NOTCH FILTER FMCA For the schematic and component values, see Section 11.24. → Reference:C:\crc_book_ms\wca_fmcd\hiqhum_ckt.mcd → Reference:C:\crc_book_ms\Ref_files_v11\comm42.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\crc_book_ms\Ref_files_v11\tolArray.mcd BF := 50
LF := 70
DF := 0.1
EVA notch markers: M1 := 53.5
M2 := 68.3
→ Reference:C:\crc_book_ms\Ref_files_v11\fmcalin.mcd Y=9
Y=9
66
68
70
AC Circuits
281
−10
FMCA at node Y
M2
M1
−30
dBV
db[(MPfmca1)i] db[(MPfmca2)i] db[(MPfmca3)i]
−50 −70 −90 −110 50
52
54
56
FMCA Lo Nom FMCA Hi
58
60 62 Fi Freq(Hz)
64
66
68
70
11.28 LTC 1562 MCA See Part I (Section 3.15) for a schematic of the four connected sections and opamp rolloff subcircuit. Component count = 68. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
Nk := 2000
→ Reference:C:\mcadwca\wcaref11\tolArray.mcd Markers for EVA extreme center frequencies (see Section 11.29): → Reference:C:\crc_book_ms\Ref_files_v11\mcalin.mcd M1 := 87
M2 := 116
Y = 20
282
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad LTC 1562 MCA at node Y
30 20
dBV
db[(MPmca3,1)i]
Y = 20
M2
M1
10 0
db[(MPmca2,1)i] −10 −20 db[(MPmca1,1)i] −30 db[(MPmca3,2)i] −40 −50 −60 −70 40
60
80
Uniform MCA Hi Nominal Uniform MCA Lo Normal MCA Hi
100
120 Fi K Freq(KHz)
140
160
180
11.29 LTC 1562 EVA In this section an Extreme Value Analysis (EVA) of the 68-component LTC 1562 circuit is performed. The EVA markers M1 and M2, used in the previous section, are calculated here for MCA comparison. → Reference:C:\mcadckts\CaNL11\ltc1562.mcd Tr := 0.02
Tc := 0.1
Ti := 0
Te := 0
→ Reference:C:\mcadwca\wcaref11\tolArray.mcd → Reference:C:\mcadwca\wcaref11\acwcalin.mcd
AC Circuits
283 Some (Bipolar) sensitivities
%/%
4 Sensi,3
2
Sensi,6
0
Sensi,39
−2 −4
40
60
80
R1A R6 C2D
M1 := 87
100
120 Fi K Freq(KHz)
140
160
180
M2 := 116
These are the extreme frequency markers. Y = 20 EVA at node Y
dBV
30 20 10 0
db[(MPeva1)i] −10 db[(MPeva2)i] −20 −30 db[(MPa1)i] −40 −50 −60 −70 40
M2
M1
60
EVA Lo EVA Hi Nom
80
100
120 Fi K Freq(KHz)
140
160
180
284
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
REFERENCES 1. Spence and Soin, Tolerance Design of Electronic Circuits, Addison-Wesley, Wokingham, England, 1988, p. 31. 2. Improving the Manufacturability of Electronic Designs, IEEE Spectrum, June 1999, p. 70. 3. Boyd, R., Tolerance Analysis of Electronic Circuits Using MATLAB, CRC Press, Boca Raton, FL., 1999, p. 115.
12
Transient Tolerance Analysis
12.1 TRANSIENT MCA — TWIN-T RC NETWORK Tolerance analysis in the time domain is explored in this and subsequent sections. The first circuit analyzed is a passive 60-Hz notch filter. C2 V4
C3
V1 R5
Rs R1
R3
V2
V3
Ein C1
R7
K := 103 u := 10–6 Meg := 106 m := 10–3 R1 := 265·K R3 := 265·K R5 := 133·K R7 := 10·Meg Rs := 0.01 C1 := 0.02·u C2 := 0.01·u C3 := 0.01·u U := 4 Y := 3 Ein := (99 1) 99 2 RR := 1 3 99 LL := 0
R1 R 3 R5 R 7 Rs
2 3 0 0 4
2 CC := 4 1
0 1 3
C1 C2 C 3
GG := 0
EE := 0
→ Reference:C:\mcadwca\wcaref11\comm42.mcd See Part I for a review of the nominal Mathcad transient analysis method. 1 = 877.78 u min ( A ) kmax :=
Tper ∆t
1 = 5.3m max ( A )
∆t := 50·u
Tper := 80·m
Nk := 500
285
286
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Note that ∆t is 1), the tolerance analysis answers cannot merely be multiplied by 1 + Te, as they can for the M = 1 case. Thus, input tolerances become significant when M > 1. Te = 0.05 EVA magnitude
200
M1
M2
150 Volts
(MPeva1)i (MPeva2)i 100 (MPa1)i 50 0
2
2.5
3
M1
−70
Deg
(MPeva4)i (MPa2)i
4
4.5
5
EVA phase angle
−50
(MPeva3)i
3.5 Li Log freq(Hz)
M2
−90 −110 −130 −150
2
2.5
3
3.5 Li Log freq(Hz)
4
4.5
5
300
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
13.3 THREE-PHASE Y-CONNECTED UNBALANCED LOAD FMCA deg := 1
uH := 10–6
uF := 10–6
Single-ended two phase Y input as before. For the schematic, see Section 13.1. R1 := 12
R2 := 20
L1 := 636.62·uH
R3 := 3
C1 := 9.947·uF 99 1 RR := 3 4 98
log (fo) = 3.3
LL := (5
4
U := 5
Y := 3
R4 := 0.01
L1)
1 2 0 3 5
99 Ein := 98
fo :=
R5 := 0.01
1 2 ⋅ π ⋅ L1 ⋅ C1
fo = 2000
R5 R1 R2 R 3 R 4
CC := (2
3
1 1
EE := 0
GG := 0
C1)
→ Reference:C:\mcadwca\wcaref11\comm42m.mcd BF := 2 ND := 3 PD := 40 Tr := 0.02 Tc := 0.1 Ti := 0.2
Te := 0.05
→ Reference:C:\mcadwca\wcaref11\TolArray.mcd → Reference:C:\mcadwca\wcaref11\3ph_ac_fmcalog.mcd Display input amplitude and phase: 100 − 173.205 i u= |u1| = 200 −100 − 173.205 i |u2| = 200 rd·arg(u2) = –120 deg
rd·arg(u1) = –60 deg
Three-Phase Circuits
301 FMCA magnitude
200 150 Volts
(Vfmca1)i (Vfmca2)i 100 (Vfmca3)i
50 0
2
2.5
3
3.5 Li Log freq(Hz)
FMCA Lo Nom FMCA Hi
4
4.5
5
FMCA phase angle
−50 −70 Deg
(Vfmca4)i (Vfmca5)i
−90
(Vfmca6)i −110 −130 −150
2
2.5
3
3.5 Li Log freq(Hz)
4
4.5
5
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14
Miscellaneous Topics
14.1 COMPONENTS NOMINALLY ZERO Section 14.1 is background information for tolerance analysis of opamp offsets given in Section 14.2. mV := 10–3 Let the function be: G(A, B, C) := (A + B)·C Let the nominal component values be: A := 0
B := 0
C := 20
Vo := G(A, B, C)
Vo = 0
Then
Let the tolerances of the components be: Va := 0.02
Vb := 0.01
Tc := 0.03
The tolerances of A and B are in component units, e.g., Volts; the tolerance of C is in %. The tolerances of A and B cannot be in percentages, because X% of zero is zero. The derivatives of Vo wrt the components are: da := C
db := C
dc := A + B
Formal definition of RSS, the variance: Var := (da·A·Va)2 + (db·B·Vb)2 + (dc·C·Tc)2
Var = 0
We cannot use this form because A = B = 0. 3σA is Va, not the product of A and Va. Hence, Var := (da·Va)2 + (db·Vb)2 + (dc·C·Tc)2 Vs := Var
Var = 0.200
Vs = 0.447
303
304
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
RSS: −Va T := Va
Nc := 3
−Vb Vb
− Tc Tc
0.0001 Q= 0 0
Q := dpf·identity(Nc)
Vrp := G[Qp,1, Qp,2, C·(Qp,3 + 1)]
dpf := 0.0001 0 0.0001 0
p := 1..Nc
0 0 0.0001
2 Vr = 2 mV 0
Vr contains the nonnormalized sensitivities. It cannot be normalized, because the nominal value of Vo = 0. The RSS values are: Vrss : =
1 ⋅ dpf
∑ (Vr ⋅ T p
2 ,p
)2
Vrss = 0.447
p
This is the same as the formal definition Vs. MCA w := 1..Nc
Nk := 30000
zw := rnorm(Nk, 0, 1)
(Mathcad’s normal distribution function) k := 1..Nk Normally distributed random tolerances: T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmcak := G[Trnk,1, Trnk,2, C·(Trnk,3 + 1)] Vavg := mean(Vmca) Vavg = 0.407 mV Vsm := 3·stdev(Vmca) Vsm = 0.449 Trn k ,w =
The value Vsm = 0.449 is very close to the value of Vrss = 0.447. Hence, this is another example of how MCA with normal distribution inputs very closely approximates RSS. By repeating the MCA ten times, for example, Vs will show an average closer to Vrss = 0.447. EVA m :=1..2
Mm,p := if(m = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p))
Miscellaneous Topics
−0.02 M= 0.02
305
−0.01 0.01
−0.03 0.03 −0.582 Vev = 0.618
Vevm := G[Mm,1, Mm,2, C·(Mm,3 + 1)]
FMCA Nf := 2Nc
Nf = 8
m := 1..Nf
Re Re w+1,m : = floor w,m 2 0 Dr = 0 0
1 0 0
0 1 0
1 1 0
Rew,m := m – 1
Drw,m := Rew,m – 2·Rew+1,m 0 0 1
1 0 1
0 1 1
1 1 1
Binary array counting from 0 to Nf – 1. Tf is all eight possible tolerance combinations based on binary array Dr: Tfw,m := if(Drw,m = 0, T1,w, T2,w) −0.02 Tf = −0.01 −0.03
0.02 −0.01 −0.03
−0.02 0.01 −0.03
0.02 0.01 −0.03
−0.02 −0.01 0.03
0.02 −0.01 0.03
−0.02 0.01 0.03
0.02 0.01 0.03
Vfm := G[Tf1,m, Tf2,m, C·(Tf3,m + 1)] min ( Vf ) Vfmca : = max ( Vf ) VfT = (–0.582
0.194
−0.618 Vfmca : = 0.618 –0.194
0.582
–0.618
−0.582 Vev = 0.618 0.206
0.618)
Hence, FMCA is correct in choosing Vf5 = –0.618 as the minimum and not Vf1 = –0.582 as in EVA. Why did FMCA produce a slightly wider tolerance band than EVA? 2 Hint: Vr = 2 mV . 0
14.2 TOLERANCE ANALYSIS OF OPAMP OFFSETS Input sources nominally zero. K := 103 nA := 10–9 mV := 10–3
306
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad R1
R2 V1
Vos +
V2
−
2
lb1
−
V−
+ −
3 R3
V4
11
+
1
V+ 4
V3 lb2 +
R4
−
R1 := 10·K R2 := 200·K R3 := 10·K R4 := 200·K Ib := 100·nA los := 20·nA Vos := 5·mV (LM156 data sheet) Maximum offsets: los los Ib 2 := Ib + 2 2 Ib1 = 90nA Ib2 = 110nA Ib1 := Ib −
The Resistor tolerance is Tr := 0.02 Ein := (99
1)
Ao := 106
U := 4
Y := 4
Under the broad assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Vos := 0 1 1 RR := 3 3
0 4 0 0
R1 R2 R 3 R 4
4 EE := 1
0 2
3 99
2 0
Ao Vos
Miscellaneous Topics
1 GG := 3
307
0
99
0
0
99
0
Ib1 2 Ib 2 2
→ Reference:C:\mcadwca\wcaref11\dccomm42.mcd Vn := 1solve(A1, B2) VnY = –2mV Ig1 := Vn5 Ig1 = 45nA Ig2 := Vn6 (bias currents)
Ig2 = 55nA
Neither the NDS method nor SPICE is designed for tolerance analysis with nominal zero value components. Hence, we must resort to “manual” methods. Circuit function: Ib1 ⋅ R1 ⋅ R 2 Ib 2 ⋅ R 3 ⋅ R 4 R2 G ( R1, R 2, R 3, R 4, Vos, Ib1, Ib 2 ) : = Vos + − ⋅ 1 + R1 + R 2 R3 + R4 R1 Reset Vos to maximum: Vos := 5·mV Tolerance array T: − Tr − Tr − Tr T := Tr Tr Tr Nc := cols(T) Nc = 7
− Tr Tr
−Vos Vos
0 Ib1
0 Ib 2
p := 1..Nc
RSS dpf := 0.0001
Q := dpf·identity(Nc)
Again, under the assumption that the average value of Vos = 0 and that the average bias currents are half of the maximum: Ib1 Ib 2 Va : = R1, R 2, R 3, R 4, 0, , 2 2
Va = –2mV
This confirms the aforementioned NDS answer. Nonnormalized sensitivities: Vrp := G[R1·(Qp,1 + 1), R2·(Qp,2 + 1), R3·(Qp,3 + 1), R4·(Qp,4 + 1), Qp,5, Qp,6, Qp,7] VrT = (0 0 0 0 0.002 20 –20)
308
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Ta := Tr Vrssm :=
Tr
( −1)m ⋅ dpf
Tr
Tr
Vos
∑ (Vr ⋅ Ta ) p
2
p
p
Ib1 2
Ib 2 2
T
m := 1..2
−106 Vrss = mV 106
MCA w := 1..Nc Nk := 30000 (normal distribution) k := 1..Nk
zw := rnorm(Nk, 0, 1)
T2,w − T1,w ⋅ ( z w )k + 3 + T1,w 6 Vmk = G[R1·(Tnk,1 + 1), R2·(Tnk,2 + 1), R3·(Tnk,3 + 1), R4·(Tnk,4 + 1), Tnk,5, Tnk,6, Tnk,7] Vavg := mean(Vm) Vavg = –2mV Vsm := (–1)m·3·stdev(Vm) Tn k ,w :=
−106 Vs = mV 106 Compare this with RSS. EVA Mm,p := if[(m) = 1, if(Vrp < 0, T2,p, T1,p), if(Vrp ≥ 0, T2,p, T1,p)]
1 m= 2
Vevam := G[R1·(Mm,1 + 1), R2·(Mm,2 + 1), R3·(Mm,3 + 1), R4·(Mm,4 + 1), Mm,5, Mm,6, Mm,7] −127 Veva = mV 123 FMCA Nf := 2Nc
Nf = 128
Rew,k := k – 1
k := 1..Nf
Re Re w+1,k : = floor w,k 2
Drw,k := Rew,k – 2·Rew+1,k Tfw,k := if(Drw,k = 0, T1,w, T2,w Vmfk := G[R1·(Tf1,k + 1), R2·(Tf2,k + 1), R3·(Tf3,k + 1), R4·(Tf4,k + 1), Tf5,k, Tf6,k, Tf7,k]
Miscellaneous Topics
309
Vfmca1 := min(Vmf)
Vfmca2 := max(Vmf)
−132 Vfmca = mV 127
A slightly wider tolerance band than EVA is obtained.
14.3 BEST-FIT RESISTOR RATIOS Find the best parallel resistor values for Rp out of all the 96 or 192 resistor value combinations (choice 1), find the best noninverting gain values for gain Gp (choice 2), find the best inverting gain values for gain –Gn (choice 3), or find the best voltage divider values for gain D (choice 4). Choose B: B = 48 (2% values), or B = 96 (1% values), or B = 192 (0.1% values). B := 96 Required functions: frac(x) := x – trunc(x) Rx ( x ) : = 10
x trunc B
Lx(x) := round(B·log(x))
frac x ⋅ round 10 B , 2
User input: (choice = 1, or choice = 2, or choice = 3, or choice = 4) choice := 2 Rp := 55.86 Gp := 9.56 Gn := –3.861 D := 0.26 (example inputs for choices 1 to 4.)
310
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Rv : = E ← 10 6 for m ∈1..B + 1 R1x ← Rx ( B + m ) if choice = 1 R1x ← Rx ( Lx ( Rp ) + m ) R2t ←
Rp ⋅ R1x R1x − Rp
R2t ←
R1x if choice = 2 Gp − 1
R2t ←
R1x if choice = 3 −Gn
R2t ←
R1x ⋅ D if choice = 4 1− D
R 2 x ← Rx ( Lx ( R 2 t ) ) E1 ← R 2 x − R 2 t if E1 < E E ← E1 R1 ← R1x R 2 ← R 2x R1 R 2 11.8 Rv = 1.37 Use appropriate decade values.
Miscellaneous Topics
311
Ans := R ←
Rv1 ⋅ Rv2 Rv1 + Rv2
R ←1+
Ans = 9.613
Rv1 Rv2
if choice = 1 iff choice = 2
R←
− Rv1 Rv2
R←
Rv2 Rv1 + Rv2
if choice = 3 if choice = 4
Gp = 9.560
Percentage error: pce := 1 −
Ans Gp
pce = —0.56%
Changing B to 192 yields pce = 0. Using a “convenient value” method: Gpx : = 1 +
14.4
10 1.15
Gpx = 9.696
pce := 1 −
Gpx Gp
pce = –1.42%
TRUNCATED GAUSSIAN DISTRIBUTION
In this distribution, Gaussian probability densities less than –3σ and greater than 3σ are rejected. It does not use transcendental functions as does the Box–Muller form (see Reference 1) and is hence faster. This could be useful in manufacturing yield analyses to simulate using all in-spec components.
312
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
R := k ← 1 while k ≤ Nk x1 ← 2 ⋅ rnd (1) − 1 x 2 ← 2 ⋅ rnd (1) − 1 w ← x1 ⋅ x1 + x 2 ⋅ x 2 if w < 1 w←
−2 ⋅ 1n ( w ) w
y 2 ← w ⋅ x1 if ( y 2 > −3) ∧ ( y 2 < 3) y1k ← y 2 k ← k +1 y1 Create histogram: nb := 30 Nk := 30000 q := 1..nb + 1 nh := 1..nb VL := min(R) VH := max(R) VL = –2.995 VH = 2.988 VH − VL binq := VL + intv·(q – 1) pr := hist(bin,R) nb Vs := stdev(R) Vavg := mean(R) Vavg = 0.012 3·Vs = 2.966 E(R) := Nk·intv·dnorm(R, Vavg, Vs) intv :=
3000 3.Vs
−3.Vs prnh E(binnh)
2000 1000 0 −5
−4
−3
−2
Histogram Ideal Gaussian
−1
0 binnh
1
2
3
4
5
Miscellaneous Topics
313
14.5 LTC1060 SWITCHED CAPACITOR FILTER MCA with one and three stages K := 103
Hz := 1
KHz := 103
There are times when no circuit topology is available to construct the node list arrays. An example is the LTC1060 switched capacitor filter. Here, we must rely on information from the data sheet to perform a worst-case analysis. The diagram from the vendor’s data sheet is shown in the following. R4 R3 R2 R1 VIN
4 (17)
N S1A 3 (18) 5 (16)
–
+
+
∑
LP 1 (20)
– –
∫
SA/B 6
BP 2 (19)
∫
TLC1060-MO006
1/2 LTC1060
15
V– f0 =
fCLK 100(50)
R2 R3 ;Q= R4 R2
R2 ;H = –R2/R1; H0BP = –R3/R1; H0LP = –R4/R1 R4 0HP
Mode 3: 2nd order filter providing highpass, bandpass, lowpass.
14.5.1 DESIGN PROCEDURE
FROM THE
DATA SHEET
H := 1
fc := 51·KHz
fo := 640·Hz
Q1 := 100
wo := 2·π·fo
R1 := 412·K
wc R 4 := R 2 ⋅ wo
R 2 :=
H ⋅ R1 ⋅ wo Q1 ⋅ wc
wc := R 3 :=
2 ⋅ π ⋅ fc 50
wc ⋅ Q1 ⋅ R 2 wo
2
R2 = 2.585K
R3 = 412K
R4 = 6.566K
AC Analysis BF := 560
LF := 720
NP := 160
i := 1..NP + 1
DF :=
LF − BF NP
314
Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Fi := BF + DF·(i – 1) Tr := 0.02 Resistor tolerance 2% Twc := 0.075 Switching frequency tolerance 7.5% Construct component vector X and tolerance array T: X := (R1
R2
− Tr T := Tr
R3
− Tr Tr
R4 wc)T − Tr Tr
− Tr Tr
− Twc Twc
Magnitude function:
G ( X, ω ) : =
X5 ⋅ X2 ⋅ ω X1 ( X 5 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω2 + 5 2 X3 X4 2
Convert to rad/sec: ω := 2·π·F MCA V1i := G(X, ωi) Nominal output. Nc := length (X) w := 1..Nc Nk := 4000 k := 1..Nk Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 Random tolerance array, dim {Nc Nk} Uniform distribution. BWw,k := Xw·Tnw,k Random component array, dim {Nc Nk} Vck,1 := G(BW〈k〉,ωi) Random output array, dim {Nk NP + 1} Vmca1i := max(Vc〈i〉) The maximums of the output array at each of NP + 1 frequencies. Three stages Q3 := 51.1096 Design for overall Q of 100 for the three stages. H ⋅ R1 ⋅ wo Q 3 ⋅ wc
R1 := 412·K
R 2 :=
R3 = 412 K
wc R 4 := R 2 ⋅ wo
R5 := R1
R6 := R2
R2 = 5.058K
2
R7 := R3
R4 = 12.847 K R8 := R4
R 3 :=
wc ⋅ Q 3 ⋅ R 2 wo
Miscellaneous Topics
315
Same values for second stage. R9 := R1
R10 := R2
R11 := R3
R12 := R4
Same values for third stage. X := (R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
wc)T
Magnitude function for the three stages
G 3 ( X, ω ) : = a ←
b←
c←
X13 ⋅ X 2 ⋅ ω X1 ( X13 )2 ⋅ X 2 X ⋅ X ⋅ω2 − ω 2 + 13 2 X4 X3 2
X13 ⋅ X 6 ⋅ ω X5 ( X13 )2 ⋅ X 6 X ⋅ X ⋅ω2 − ω 2 + 13 6 X8 X7 2
X13 ⋅ X10 ⋅ ω X9 ( X13 )2 ⋅ X10 X ⋅ X ⋅ω2 − ω 2 + 13 10 X12 X11 2
Tf ← a ⋅ b ⋅ c − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr − Tr – Twc T := Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Tr Twc Tr V3i := G3(X, ωi) Nominal output for three stages. Nc := length(X) w := 1..Nc Tnw,k := (T2,w – T1,w)·rnd (1) + T1,w + 1 BXw,k := Xw·Tnw,k Vck,1 := G3(BW〈k〉,ωi) Vmca3i := max(Vc〈i〉) EVA markers: M1 := 580.3·Hz
M2 := 701.9·Hz
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
Bandpass Filter MCA
1.2 1
Volts
V1i
M1
M2
0.8
Vmca1i Vmca3i V3i
0.6 0.4 0.2 0 560
580
600
620
640 Fi Freq (Hz)
660
680
700
720
Nom_1 1 Stage MCA 3 Stage MCA Nom_3
Nk = 4000 This plot illustrates an important principle of statistical tolerance analyses. The question may well be asked as to why one stage with 5 components or variables has a wider frequency tolerance band than three stages with 13 variables. Also, note that the amplitude of the three stages shows a higher variance than the single stage, but the average is lower. The center frequency in Hz is given by fo =
D0 wc 2 ⋅ R 2 , in which D01 = for 2⋅π R4
wc 2 ⋅ R 6 wc 2 ⋅ R10 for the second, and D0 3 = for the third stage. R8 R12 Due to the separate tolerances on R2 through R12, each of these fo’s will be different for one frequency sweep, and different again for subsequent Nk frequency sweeps because of new random tolerances assigned by the Monte Carlo process. When ω2 = D01, the first term in the transfer function denominator radical
the first stage, D0 2 =
R3 , but D02 and D03 in the R1 second and third stages will not equal ω2, and the denominators here will be larger, pulling down the average peak gain of the three combined stages. The nominal peak gain is: becomes zero, and the peak gain is given by Gpk =
G 3pk :=
R 3 R 7 R11 ⋅ ⋅ R1 R 5 R 9
G3pk = 1
A numerical example will help illustrate.
Miscellaneous Topics
317
In the transfer function G ( s ) =
N1 :=
wc ⋅ R 2 R1
N1 = 78.7
D1 :=
wc ⋅ R 2 R3
D1 = 78.7
N1 ⋅ s s2 + D1 ⋅ s + D0
Assume the following random values for wc, R2, R4, ... , R12: R2 := R2·(1.015) R4 := R4·(0.998) R6 := R6·(1.006) R8 := R8·(0.991) R10 := R10·(0.993) R12 := R12·(0.982) wc := wc·(1.071) Then:
f1 :=
wc R2 ⋅ 2 ⋅ π R4
f1 = 691.3Hz
f 2 :=
wc R6 ⋅ 2 ⋅ π R8
f2 = 690.6Hz
f 3 :=
wc R10 ⋅ 2 ⋅ π R12
f3 = 689.3Hz
Use nominal values for the other components and convert to rad/sec: ω1 := 2·π·f1 Tfa :=
Tfb :=
N1 ⋅ ω1 2
wc 2 ⋅ R 2 2 2 R 4 − ω1 + ( D1 ⋅ ω1) N1 ⋅ ω1 2
wc 2 ⋅ R 6 2 2 R 8 − ω1 + ( D1 ⋅ ω1)
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
N1 ⋅ ω1
Tfc :=
2
wc 2 ⋅ R10 2 2 R12 − ω1 + ( D1 ⋅ ω1)
Tfa = 1 Tfb = 0.995 Tfc = 0.953 Tf := Tfa·Tfb·Tfc Tf = 0.948 Tfa = 1, but the product of all three is less. As to the wider center frequencies for the single stage, the chances of wc, R2, and R4 having random values approaching the minimum and maximum center frequencies are much greater than the likelihood of wc, R2, R4, R6, R8, R10, and R12 all having one set of random values for an extreme center frequency. The larger variance, not the mean, of the three-stage gain is again due to the larger number of components involved. Showing that the overall Q for the three stages is 100:
Q1 = 100
1 M 3 := fo ⋅ 1 − 2 ⋅ Q1
1 M 4 := fo ⋅ 1 + 2 ⋅ Q1
M3 = 636.8
M4 = 643.2
M5 :=
1 2
1 0.9 0.8 M5
V3 i 0.7 0.6 0.5 630
632
634
636
638
640 Fi
fo Q2 := M4 – M3
100 Q = 100 51.11
REFERENCES 1. www.taygeta.com/random/gaussian.html.
642
644
646
648
650
Appendix II SUMMARY OF TOLERANCE ANALYSIS METHODS DC It has been demonstrated that the conventional sensitivity-sign-based method of extreme value analysis (EVA) does not always yield the “extreme values.” Hence, the fast Monte Carlo analysis (FMCA) method must be used to guarantee accurate and reliable output tolerance spreads. However, this method may not be practical for large DC circuits because the number of required iterations is 2Nc, where Nc is the number of components. For small-to-medium-sized circuits, however, it is the preferred method. Normal distribution input MCA can be used to closely approximate RSS tolerance bands (Nk > 5000 as a guideline) but not for EVA or FMCA, as has been empirically demonstrated.
AC With AC circuits that have nonmonotonic components, RSS, EVA, and FMCA methods become unreliable and should not be used. Hence, prudence dictates that these methods should not be used for any AC circuit. That leaves MCA as the method of choice. A large number of samples of Nk must be used to obtain tolerance bands greater than those in RSS but less than those in EVA, using uniform distribution inputs. As in DC circuits, the normal (Gaussian) distribution will approximate the RSS 3 σ values for monotonic circuits. A rule of thumb is to use no less than Nk = 1000 samples for large circuits and Nk greater than 10,000 for small circuits.
TRANSIENT Several examples of transient Monte Carlo analysis have been given. The author has discovered that EVA, RSS, or FMCA methods, when applied to transient analysis, yield erroneous results. This is due to the bipolar sensitivities encountered with oscillatory waveforms, which many RC and RCL circuits exhibit. Hence, MCA is once again the recommended method. The execution time is a direct function of kmax (the total number of time increments), Nk (number of Monte Carlo samples), and N (the total number of capacitors and inductors in the circuit). The number N determines the dimensions of the A matrix to be {N N}, which, of course, has a direct effect on execution time.
319
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Node List Tolerance Analysis: Enhancing SPICE Capabilities with Mathcad
TABLE OF SUBPROGRAMS PART I NOMINAL ANALYSIS SUBPROGRAMS Lin or Log Frequency
File Namea
Function
comm42 comm42m dccomm42 dccomm42m FindU
AC Nominal AC Nominal DC Nominal DC Nominal Finds total number of circuit nodes
Either Either N/Ab N/A N/A
PART II TOLERANCE ANALYSIS SUBPROGRAMS (USED SUBPROGRAMS) File Namea
Function
Lin or Log Frequency
acwcalin acwcalog dc_beta dc_fmca dc_gap dc_mca
AC EVA AC EVA DC DC FMCA DC DC MCA
Lin Log N/A N/A N/A N/A
dcwca fmcalin fmcalog mcalin mcalog TolArray tranlin 3_ph_ac_evalog 3_ph_ac_fmcalog 3_ph_ac_mcalog
DC EVA AC FMCA AC FMCA AC MCA AC MCA T Array TA 3-Phase EVA 3-Phase FMCA 3-Phase MCA
N/A Lin Log Lin Log N/A N/A Log Log Log
a b
Comments
Superposed outputs for M > 1 Superposed outputs for M > 1 Optional use WITH
PART I
Comments Sensitivity outputs included Sensitivity outputs included Uses Mathcad rbeta functions Uses bimodal input distributions Histogram outputs; normal and uniform distributions EVA and sensitivity outputs
Normal and uniform distribution inputs Normal and uniform distribution inputs Creates symmetric tolerance array T Transient analysis; pulse input Sensitivity outputs included Magnitude and phase outputs Magnitude and phase outputs
All have the file extension mcd. Not applicable.
For required inputs, see example worksheet files.
IN CASE OF DIFFICULTY A checklist if comm42.mcd will not return A, B, D, and E: 1. Check nodes for sequence, i.e., they must be 1, 2, 3, 4, …, U. Make sure no node numbers are skipped or omitted.
Appendix II
321
2. The input source node sequence must be in descending order from 99, 98, …, 90. 3. Check that U is the same as the maximum number of nodes in the circuit. 4. Make sure that Y is at least one of the nodes in the circuit. 5. For AC, make sure that RR, CC, LL, U, Y, Ein, EE, and GG are all created or set to zero as required. 6. For DC, make sure that RR, U, Y, Ein, EE, and GG are all created or set to zero. 7. U, Y, RR, and Ein must all be nonzero. 8. Make sure that all the node numbers in RR, CC, LL, EE, Ein, and GG exist in the circuit and are connected properly. 9. Ensure that autocalculate is ON (Tools, Calculate). As a check, press CTRL + F9. 10. Check for all-capacitive loops and all-inductive cutsets. 11. Check for at least one ground (node 0) in the circuit (also a SPICE requirement). 12. Ensure that none of the four rules of circuit construction given on p. 37 are being violated.
ABBREVIATIONS BPF BJT dpf EVA FMCA HPF HV LPF MCA MFB MOSFET RNG RSS rv TA TTA WCA
Band-pass filter Bipolar junction transistor Derivative perturbation factor Extreme value analysis Fast Monte Carlo analysis High-pass filter High-voltage Low pass filter Monte Carlo analysis Multiple feedback Metal-oxide semiconductor field effect transistor Random number generator Root sum square Random variable Tolerance analysis Transient tolerance analysis Worst-case analysis (a generic term that includes EVA, RSS, FMCA, and MCA)
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Index A A and ß slope intersection method, 103 to 105 AC analysis ACLs, 33 to 34 all-capacitive circuits, 22 to 23 all-inductive circuits, 23 to 24 broadband pulse transformer models, 28 fifth-order active filter, 60 floating VCVSs, 39 HV (200 V) shunt MOSFET regulator, 77 LTC 1562 quad band filter IC, 83 MOSFET model (first-order), 46 output plots, 11 to 13 seventh-order elliptical low-pass filters, 65, 69 to 70, 72 to 73 square root of frequency (+10dB/decade) circuits, 75 State Space Averaging, 142 state variable filters, 62 subcircuits schemes, 57 to 58 third-order opamp models, 56 tolerance analysis, 213 to 216 twin-T RC networks, 26 two inputs, three outputs, 51 unity gain differential amplifiers, 104, 108 to 109 VCVS example, 48 AC and transient MCA — Bessel HPF, 288 to 291 AC circuits, tolerance analysis, 241 to 284 Butterworth low-pass filter circuits, 250 to 255 circuit output vs. component value, 241 to 246 CI sensitivity, exact values, 247 to 248 high-Q hum notch filter circuits, 276 to 281 LC 1562, 281 to 283 multiple-feedback BPF circuits, 255 to 260 multiple output EVA, 248 to 250 Sallen and Key BPF circuits, 265 to 271 state variable filter circuits, 271 to 276 switching power supply compensation circuits, 260 to 265 AC floating VCVS (voltage controlled voltage current), 199 to 202 ACLs (all-capacitive loops), 30 to 31, 32 to 34 Algorithms, Leverrier’s, 97 to 101 All-capacitive circuits, 21 to 23 All-capacitive loops, see ACLs
All-inductive circuits, 23 to 24 All-inductive cutsets, see ICS Amplifiers, video (uA733), 89 to 95, 212 Asymmetric tolerances, 217, 221 to 222
B Balanced Y-load, 181 to 186 Bessel HPF, AC and transient MCA, 288 to 291 Beta distributions [4-6], 232 to 234 Bimodal (gapped) distribution inputs, 236 to 239 Bipolar junction transistors, see BJTs BJTs (bipolar junction transistors), 46 to 47, 87 to 88, 211 to 212 Broadband pulse transformer models, 27 to 30 Buck regulator, switching power supply output stage, 137 to 140 Butterworth low-pass filter circuits, 250 to 255
C CASE FMCA greater than EVA, 228 to 230 CCCS (current-controlled current source), 35, 36 to 37 CCVS (current-controlled voltage source), 36 Centered difference approximation — sensitivities, 222 to 224 Circuit output vs. component value, 241 to 246 Circuits, discrete components, 211 to 212 Circuits with M