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NONLINEAR AND DISTRIBUTED CIRCUITS

Edited by

Wai-Kai Chen University of Illinois Chicago, U.S.A.

Boca Raton London New York

A CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa plc.

Copyright © 2006 Taylor & Francis Group, LLC

7276_Discl.fm Page 1 Monday, July 25, 2005 12:54 PM

This material was previously published in The Circuits and Filters Handbook, Second Edition. © CRC Press LLC 2002.

Published in 2006 by CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2006 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-7276-3 (Hardcover) International Standard Book Number-13: 978-0-8493-7276-6 (Hardcover) Library of Congress Card Number 2005050565 This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their use. No part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. For permission to photocopy or use material electronically from this work, please access www.copyright.com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC) 222 Rosewood Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged. Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe. Library of Congress Cataloging-in-Publication Data Nonlinear and distributed circuits / Wai-Kai Chen, editor-in-chief. p. cm. Includes bibliographical references and index. ISBN 0-8493-7276-3 (alk. paper) 1. Electronic circuits. 2. Electric circuits, Nonlinear. I. Chen, Wai-Kai, 1936TK7867.N627 2005 621.3815--dc22

2005050565

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7276_C000.fm Page v Tuesday, July 26, 2005 2:00 PM

Preface

The purpose of Nonlinear and Distributed Circuits is to provide in a single volume a comprehensive reference work covering the broad spectrum of analysis, synthesis, and design of nonlinear circuits; their representation, approximation, identification, and simulation; cellular neural networks; multiconductor transmission lines; and analysis and synthesis of distributed circuits. The book is written and developed for the practicing electrical engineers and computer scientists in industry, government, and academia. The goal is to provide the most up-to-date information in the field. Over the years, the fundamentals of the field have evolved to include a wide range of topics and a broad range of practice. To encompass such a wide range of knowledge, the book focuses on the key concepts, models, and equations that enable the design engineer to analyze, design, and predict the behavior of nonlinear and distributed systems. While design formulas and tables are listed, emphasis is placed on the key concepts and theories underlying the processes. The book stresses fundamental theory behind professional applications. In order to do so, it is reinforced with frequent examples. Extensive development of theory and details of proofs have been omitted. The reader is assumed to have a certain degree of sophistication and experience. However, brief reviews of theories, principles, and mathematics of some subject areas are given. These reviews have been done concisely with perception. The compilation of this book would not have been possible without the dedication and efforts of Professors Leon O. Chua and Thomas Koryu Ishii, and, most of all, the contributing authors. I wish to thank them all. Wai-Kai Chen Editor-in-Chief

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Editor-in-Chief

Wai-Kai Chen, Professor and Head Emeritus of the Department of Electrical Engineering and Computer Science at the University of Illinois at Chicago, is now serving as a member of the Board of Trustees at International Technological University. He received his B.S. and M.S. degrees in electrical engineering at Ohio University, where he was later recognized as a Distinguished Professor. He earned his Ph.D. in electrical engineering at the University of Illinois at Urbana/Champaign. Professor Chen has extensive experience in education and industry and is very active professionally in the fields of circuits and systems. He has served as visiting professor at Purdue University, University of Hawaii at Manoa, and Chuo University in Tokyo, Japan. He was Editor of the IEEE Transactions on Circuits and Systems, Series I and II, President of the IEEE Circuits and Systems Society, and is the Founding Editor and Editor-inChief of the Journal of Circuits, Systems and Computers. He received the Lester R. Ford Award from the Mathematical Association of America, the Alexander von Humboldt Award from Germany, the JSPS Fellowship Award from Japan Society for the Promotion of Science, the Ohio University Alumni Medal of Merit for Distinguished Achievement in Engineering Education, the Senior University Scholar Award and the 2000 Faculty Research Award from the University of Illinois at Chicago, and the Distinguished Alumnus Award from the University of Illinois at Urbana/Champaign. He is the recipient of the Golden Jubilee Medal, the Education Award, the Meritorious Service Award from IEEE Circuits and Systems Society, and the Third Millennium Medal from the IEEE. He has also received more than a dozen honorary professorship awards from major institutions in China and Taiwan. A fellow of the Institute of Electrical and Electronics Engineers and the American Association for the Advancement of Science, Professor Chen is widely known in the profession for his Applied Graph Theory (North-Holland), Theory and Design of Broadband Matching Networks (Pergamon Press), Active Network and Feedback Amplifier Theory (McGraw-Hill), Linear Networks and Systems (Brooks/Cole), Passive and Active Filters: Theory and Implements (John Wiley), Theory of Nets: Flows in Networks (Wiley-Interscience), and The VLSI Handbook (CRC Press) and The Electrical Engineering Handbook (Academic Press).

vii Copyright © 2006 Taylor & Francis Group, LLC

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Advisory Board

Leon O. Chua University of California Berkeley, California

John Choma, Jr. University of Southern California Los Angeles, California

Lawrence P. Huelsman University of Arizona Tucson, Arizona

ix Copyright © 2006 Taylor & Francis Group, LLC

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Contributors

Guanrong Chen

Michael Peter Kennedy

Tamás Roska

City University of Hong Kong Kowloon, Hong Kong

University College Dublin, Ireland

Hungarian Academy of Science Budapest, Hungary

Daniël De Zutter

Erik Lindberg

Vladimír Székely

Gent University Gent, Belgium

Technical University of Denmark Lyngby, Denmark

Manuel Delgado-Restituto

Luc Martens

Universidad de Sevilla Sevilla, Spain

Gent University Gent, Belgium

Martin Hasler

Wolfgang Mathis

Swiss Federal Institute of Technology Lausanne, Switzerland

University of Hannover Hannover, Germany

Jose L. Huertas

Csaba Rekeczky

Universidad de Sevilla Sevilla, Spain

Hungarian Academy of Sciences Budapest, Hungary

Thomas Koryu Ishii

Angel Rodríguez-Vázquez

Marquette University Milwaukee, Wisconsin

Universidad de Sevilla Sevilla, Spain

Budapest University of Technology and Economics Budapest, Hungary

Lieven Vandenberghe University of California Los Angeles, California

F. Vidal Universidad de Malaga Malaga, Spain

Joos Vandewalle Katholieke Universiteit Leuven Leuven Heverlee, Belgium

Ákos Zarándy Hungarian Academy of Science Budapest, Hungary

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Table of Contents

1

Qualitative Analysis

2

Synthesis and Design of Nonlinear Circuits Angel Rodriguez-Vázquez, Manual Delgado-Restituto, Jose L. Huertas, and F. Vidal .......................................... 2-1

3

Representation, Approximation, and Identification

4

Transformation and Equivalence

5

Piecewise-Linear Circuits and Piecewise-Linear Analysis Joos Vandewalle and Lieven Vandenberghe ............................................................................................ 5-1

6

Simulation

7

Cellular Neural Networks Tamás Roska, Ákos Zarándy, and Csaba Rekeczky............................................................................................................. 7-1

8

Bifurcation and Chaos

9

Transmission Lines

Martin Hasler ...................................................................... 1-1

Guanrong Chen .......... 3-1

Wolfgang Mathis .......................................... 4-1

Erik Lindberg ....................................................................................... 6-1

Michael Peter Kennedy ................................................... 8-1

Thomas Koryu Ishii .............................................................. 9-1

10

Multiconductor Tranmission Lines

11

Time and Frequency Domain Responses Luc Martens and Daniël De Zutter ........................................................................................................ 11-1

12

Distributed RC Networks

13

Synthesis of Distributed Circuits

Daniël De Zutter and Luc Martens ....... 10-1

Vladimír Székely ..................................................... 12-1 Thomas Koryu Ishii ................................... 13-1

Index ................................................................................................................. I -1 xiii Copyright © 2006 Taylor & Francis Group, LLC

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1 Qualitative Analysis 1.1 1.2

Introduction ....................................................................... 1-1 Resistive Circuits ................................................................ 1-1 Number of Solutions of a Resistive Circuit • Bounds on Voltages and Currents • Monotonic Dependence

1.3

Autonomous Dynamic Circuits ...................................... 1-12

1.4

Nonautonomous Dynamic Circuits................................ 1-18

Introduction • Convergence to DC-Operating Points

Martin Hasler Swiss Federal Institute of Technology

1.1

Introduction • Boundedness of the Solutions • Unique Asymptotic Behavior

Introduction

The main goal of circuit analysis is to determine the solution of the circuit, i.e., the voltages and the currents in the circuit, usually as functions of time. The advent of powerful computers and circuit analysis software has greatly simplified this task. Basically, the circuit to be analyzed is fed to the computer through some circuit description language, or it is analyzed graphically, and the software will produce the desired voltage or current waveforms. Progress has rendered the traditional paper-and-pencil methods obsolete, in which the engineer’s skill and intution led the way through series of clever approximations, until the circuits equations can be solved analytically. A closer comparison of the numerical and the approximate analytical solution reveals, however, that the two are not quite equivalent. Although the former is precise, it only provides the solution of the circuit with given parameters, whereas the latter is an approximation, but the approximate solutions most often is given explicity as a function of some circuit parameters. Therefore, it allows us to assess the influence of these parameters on the solution. If we rely entirely on the numerical solution of a circuit, we never get a global picture of its behavior, unless we carry out a huge number of analyses. Thus, the numerical analysis should be complemented by a qualitative analysis, one that concentrates on general properties of the circuit, properties that do not depend on the particular set of circuit parameters.

1.2

Resistive Circuits

The term resistive circuits is not used, as one would imagine, for circuits that are composed solely of resistors. It admits all circuit elements that are not dynamic, i.e., whose constitutive relations do not involve time derivatives, integrals over time, or time delays, etc. Expressed positively, resistive circuit elements are described by constitutive relations that involve only currents and voltages at the same time instants. Physical circuits can never be modeled in a satisfactory way by resistive circuits, but resistive circuits appear in many contexts as auxiliary constructs. The most important problem that leads to a resistive circuit is the determination of the equilibrium points, or, as is current use in electronics, the DC-operating points, of a dynamic circuit. The DC-operating points of a circuit correspond in a one-to-one fashion

1-1 Copyright © 2006 Taylor & Francis Group, LLC

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1-2

Nonlinear and Distributed Circuits

V

I

FIGURE 1.1 Symbols of the V- and the I-resistor.

to the solutions of the resistive circuit obtained by removing the capacitors and by short circuiting the inductors. The resistive circuit associated with the state equations of a dynamic circuit is discussed in [1]. Among the resistive circuit elements we find, of course, the resistors. For the purposes of this introduction, we distinguish between, linear resistors, V-resistors and I-resistors. V-resistors are voltage controlled, i.e., defined by constitutive relations of the form i = g (v )

(1.1)

In addition, we require that g is a continuous, increasing function of v, defined for all real v. Dually, an I-resistor is current controlled, i.e., defined by a constitutive relation of the form v = h(i )

(1.2)

In addition, we require that h is a continuous, increasing function of i, defined for all real i. We use the symbols of Figure 1.1 for V- and I-resistor. Linear resistors are examples of both I- and V-resistors. An example of a V-resistor that is not an I-resistor is the junction diode, modeled by its usual exponential constitutive relation

(

)

i = I s e v nVT − 1

(1.3)

Although (1.3) could be solved for v and thus the constitutive relation could be written in the form (1.2), the resulting function h would be defined only for currents between –Is and +∞, which is not enough to qualify for an I-resistor. For the same reason, the static model for a Zener diode would be an I-resistor, but not a V-resistor. Indeed, the very nature of the Zener diode limits its voltages on the negative side. A somewhat strange by-product of our definition of V- and I-resistors is that independent voltage sources are I-resistors and independent current sources are V-resistors. Indeed, a voltage source of value E has the constitutive relation v=E

(1.4)

which clearly is of the form (1.2), with a constant function h, and a current source of value I has the form i=I

(1.5)

which is of the form (1.1) with a constant function g. Despite this, we shall treat the independent sources as a different type of element. Another class of resistive elements is the controlled sources. We consider them to be two-ports, e.g., a voltage-controlled voltage source (VCVS). A VCVS is the two-port of Figure 1.2, where the constitutive relations are

+ V1 −

i1

i2 + −

Copyright © 2006 Taylor & Francis Group, LLC

v1 = αv 2

(1.6)

i1 = 0

(1.7)

+ V2 −

FIGURE 1.2 VCVS as a two-port.

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1-3

Qualitative Analysis

+ V1 −

i1

+ + −

∞

i2

+ V − 2

i1

i2

+

V1

V2

−

−

FIGURE 1.3 Operational amplifier as a juxtaposition of a nullator and a norator.

βRi′ βF i i

i′

FIGURE 1.4 Equivalent circuit of a bipolar npn transistor.

The other controlled sources have similar forms. Another useful resistive circuit element is the ideal operational amplifier. It is a two-port defined by the two constitutive relations v1 = 0

(1.8)

i1 = 0

(1.9)

This two-port can be decomposed into the juxtaposition of two singular one-ports, the nullator and the norator, as shown in Figure 1.3. The nullator has two constitutive relations: v =0 i=0

(1.10)

whereas the norator has no constitutive relation. For all practical purposes, the resistive circuit elements mentioned thus far are sufficient. By this we mean that all nonlinear resistive circuits encountered in practice possess an equivalent circuit composed of nonlinear resistors, independent and controlled sources, and nullator–norator pairs. Figure 1.4 illustrates this fact. Here, the equivalent circuit of the bipolar transistor is modeled by the Ebers–Moll equations: 1 1+ i1 βF = i 2 −1

1 1 + βR −1

g (v1 ) g (v ) 2

(1.11)

The function g is given by the right-hand side of (1.3). Actually, the list of basic resistive circuit elements given so far is redundant, and the nullator–norator pair renders the controlled sources superfluous. An example of a substitution of controlled sources by nullator–norator pairs is given in Figure 1.4. Equivalent circuits exist for all four types of controlled sources with nullator–norator pairs. Figure 1.5 gives an equivalent circuit for a voltage-controlled current source (VCCS), where the input port is floating with respect to the output port. The system of equations that describes a resistive circuit is the collection of Kirchhoff equations and the constitutive relations of the circuit elements. It has the following form (if we limit ourselves to resistors, independent sources, nullators, and norators):

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1-4

Nonlinear and Distributed Circuits

+

V1/R

V1 −

R

FIGURE 1.5 Equivalent circuit for a floating voltage-controlled current source.

Ai = 0 (Kirchhoff ’s voltage law)

(1.12)

Bv = 0 (Kirchhoff ’s voltage law)

(1.13)

ik = g (v k ) (V − resistor)

(1.14)

v k = h(ik )

(1.15)

(I − resistor)

vk = E k (independent voltage source)

(1.16)

ik = I k (independent current source)

(1.17)

v k = 0 ik = 0

(1.18)

(nullators)

In this system of equations, the unknowns are the branch voltages and the branch currents v1 v2 v = M v b

i1 i2 i = M i b

(1.19)

where the b is the number of branches. Because we have b linearly independent Kirchhoff equations [2], the system contains 2b equations and 2b unknowns. A solution ξ = v of the system is called a solution i of the circuit. It is a collection of branch voltages and currents that satisfy (1.12) to (1.19).

Number of Solutions of a Resistive Circuit As we found earlier, the number of equations of a resistive circuit equals the number of unknowns. One may therefore expect a unique solution. This may be the norm, but it is far from being generally true. It is not even true for linear resistive circuits. In fact, the equations for a linear resistive circuit are of the form H = e

(1.20)

where the 2b × 2b matrix H contains the resistances and elements of value 0, ±1, whereas the vector e contains the source values and zeroes. The solution of (1.20) is unique iff the determinant of H differs from zero. If it is zero, then the circuit has either infinitely many solutions or no solution at all. Is such a case realistic? The answer is yes and no. Consider two voltages sources connected as shown in Figure 1.6.

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1-5

Qualitative Analysis

i

E1

+

+

−

−

E2

FIGURE 1.6 Circuit with zero or infinite solutions.

i

E1

+ −

+ −

E2

FIGURE 1.7 Circuit with exactly one solution.

R2

R1 E

R3

− + + −

R4

FIGURE 1.8 Circuit with one, zero, or infinite solutions.

If E1 ≠ E2 , the constitutive relations of the sources are in contradiction with Kirchhoff ’s voltage law (KVL), and thus the circuit has no solution, whereas when E1 = E2, the current i in Figure 1.6 is not determined by the circuit equations, and thus the circuit has infinitely many solutions. One may object that the problem is purely academic, because in practice wires as connections have a small, but positive, resistance, and therefore one should instead consider the circuit of Figure 1.7, which has exactly one solution. Examples of singular linear resistive circuits exist that are much more complicated. However, the introduction of parasitic elements always permits us to obtain a circuit with a single solution, and thus the special case in which the matrix H in (1.9) is singular can be disregarded. Within the framework of linear circuits, this attitude is perfectly justified. When a nonlinear circuit model is chosen, however, the situation changes. An example clarifies this point. Consider the linear circuit of Figure 1.8. It is not difficult to see that it has exactly one solution, except when R1R3 = R2 R4

(1.21)

In this case, the matrix H in (1.29) is singular and the circuit of Figure 1.8 has zero or infinitely many solutions, depending on whether E differs from zero. From the point of view of linear circuits, we can disregard this singular case because it arises only when (1.21) is exactly satisfied with infinite precision. Now, replace resistor R4 by a nonlinear resistor, where the characteristic is represented by the bold line in Figure 1.9. The resulting circuit is equivalent to the connection of a voltage source, a linear resistor, and the nonlinear resistor, as shown in Figure 1.10. Its solutions correspond to the intersections of the nonlinear resistor characteristic and the load line (Figure 1.9). Depending on the value of E, either one, two, or three solutions are available. Although we still need infinite precision to obtain two solutions, this is not the case for one or three solutions. Thus, more than one DC-operating point may be observed in electronic circuits. Indeed, for static memories, and multivibrators in general, multiple DC-operating points are an essential feature.

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1-6

Nonlinear and Distributed Circuits

i

v E

load line

nonlinear resistor characteristic

R2 R1

FIGURE 1.9 Characteristic of the nonlinear resistor and solutions of the circuit of Figure 1.10.

R3

− +

+ E −

i − + E −

R1R3 R2

+ v −

FIGURE 1.10 Circuit with one, two or three solutions.

The example of Figure 1.10 shows an important aspect of the problem. The number of solutions depends on the parameter values of the circuit. In the example the value of E determines whether one, two, or three solutions are available. This is not always the case. An important class of nonlinear resistive circuits always has exactly one solutions, irrespective of circuit parameters. In fact, for many applications, e.g., amplification, signal shaping, logic operations, etc., it is necessary that a circuit has exactly one DC-operating point. Circuits that are designed for these functionalities should thus have a unique DCoperating point for any choice of element values. If a resistive circuit contains only two-terminal resistors with increasing characteristics and sources, but no nonreciprocal element such as controlled sources, operational amplifiers, or transistors, the solution is usually unique. The following theorem gives a precise statement. Theorem 1.1: A circuit composed of independent voltage and current sources and strictly increasing resistors without loop of voltage sources and without cutset of current sources has at most one solution. The interconnection condition concerning the sources is necessary. The circuit of Figure 1.6 is an illustration of this statement. Its solution is not unique because of the loop of voltage sources. The loop is no longer present in the circuit of Figure 1.7, which satisfies the conditions of Theorem 1.1, and which indeed has a unique solution. If the resistor characteristics are not strictly increasing but only increasing (i.e., if the v-i curves have horizontal or vertical portions), the theorem still holds, if we exclude loops of voltage sources and I – resistors, and cutsets of current sources and V – resistors. Theorem 1.1 guarantees the uniqueness of the solution, but it cannot assure its existence. On the other hand, we do not need increasing resistor characteristics for the existence. Theorem 1.2: Let a circuit be composed of independent voltage and current sources and resistors whose characteristics are continuous and satisfy the following passivity condition at infinity: v → + ∞ ⇔ i → + ∞ and v → − ∞ ⇔ i → − ∞

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(1.22)

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1-7

Qualitative Analysis

FIGURE 1.11 Feedback structure.

FIGURE 1.12 Short-open-circuit combinations for replacing the transistors.

If no loop of voltage sources and no cutset of current sources exist, then we have at least one solution of the circuit. For refinements of this theorem, refer to [1] and [3]. If we admit nonreciprocal elements, neither Theorem 1.1 nor 1.2 remain valid. Indeed, the solution of the circuit of Figure 1.10 may be nonunique, even though the nonlinear resistor has a strictly increasing characteristic. In order to ensure the existence and uniqueness of a nonreciprocal nonlinear resistive circuit, nontrivial constraints on the interconnection of the elements must be observed. The theorems below give different, but basically equivalent, ways to formulate these constraints. The first results is the culminating point of a series of papers by Sandberg and Wilson [3]. It is based on the following notion. Definition 1.1. • The connection of the two bipolar transistors shown in Figure 1.11 is called a feedback structure. The type of the transistors and the location of the collectors and emitters is arbitrary. • A circuit composed of bipolar transistors, resistors, and independent sources contains a feedback structure, if it can be reduced to the circuit of Figure 1.11 by replacing each voltage source by a short circuit, each current source by an open circuit, each resistor and diode by an open or a short circuit, and each transistor by one of the five short-open-circuit combinations represented in Figure 1.12. Theorem 1.3: Let a circuit be composed of bipolar transistors, described by the Ebers–Moll model, positive linear resistors, and independent sources. Suppose we have no loop of voltage sources and no cutset of current sources. If the circuit contains no feedback structure, it has exactly one solution. This theorem [4] is extended in [5] to MOS transistors. The second approach was developed by Nishi and Chua. Instead of transistors, it admits controlled sources. In order to formulate the theorem, two notions must be introduced. Definition 1.2. A circuit composed of controlled sources, resistors, and independent sources satisfies the interconnection condition, if the following conditions are satisfied: • No loop is composed of voltage sources, output ports of (voltage or current) controlled voltage sources, and input ports of current controlled (voltage or current) sources. • No cutset is composed of current sources, outputs ports of (voltage or current) controlled current sources, and input ports of voltage controlled (voltage or current) sources.

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1-8

Nonlinear and Distributed Circuits

Definition 1.3. A circuit composed exclusively of controlled sources has a complementary tree structure if both the input and output ports each form a tree. The fundamental loop matrix of the input port tree has the form B = BT 1

(1.23)

The circuit is said to have a positive (negative) complementary tree structure, if the determinant of BT is positive (negative). Theorem 1.4: Suppose a circuit composed of controlled sources, strictly increasing resistors satisfying (1.22), and independent sources satisfies the interconnection condition. If, by replacing each resistor either by a short circuit or an open circuit, all independent and some dependent voltage sources by short circuits, and all independent and some dependent current sources by open circuits, one never obtains a negative complementary tree structure, the circuit has exactly one solution [6]. A similar theorem for circuits with operational amplifiers instead of controlled sources is proved in [7]. The third approach is that of Hasler [1, 8]. The nonreciprocal elements here are nullator–norator pairs. Instead of reducing the circuit by some operations in order to obtain a certain structure, we must orient the resistors in certain way. Again, we must first introduce a new concept. Definition 1.4. Let a circuit be composed of nullator-norator pairs, resistors, and independent voltage and current sources. A partial orientation of the resistors is uniform, if the following two conditions are satisfied: • Every oriented resistor is part of an evenly directed loop composed only of oriented registors and voltage sources • Every oriented resistor is part of an evenly directed cutset composed only of norators, oriented resistors, and voltage sources Theorem 1.5: Let a circuit be composed of nullator-norator pairs, V- and I-resistors, and independent voltage and current sources. If the following conditions are satisfied, the circuit has exactly one solution: • The norators, I-resistors, and the voltage sources together form a tree. • The nullators, I-resistors, and the voltage sources together form a tree. • The resistors have no uniform partial orientation, except for the trivial case, in which no resistor is oriented. We illustrate the conditions of this theorem with the example of Figure 1.10. In Figure 1.13 the resistors are specified as V- and I-resistors and a uniform orientation of the resistors is indicated. Note that the nonlinear resistor is a V-resistor, but not an I-resistor, because its current saturates. The linear resistors, however, are both V- and I-resistors. The choice in Figure 1.13 is made in order to satisfy the first two conditions of Theorem 1.5. Correspondingly, in Figure 1.14 and 1.15 the norator–I-resistor–voltage source tree and the nullator-I-resistor voltage source tree are represented. Because the third condition is not satisfied, Theorem 1.5 cannot guarantee a unique solution. Indeed, as explained earlier, this circuit may have three solutions. Theorem 1.5 has been generalized to controlled sources, to resistors that are increasing but neither voltage nor current controlled (e.g., the ideal diode), and to resistors that are decreasing instead of increasing [9]. Theorems 1.3, 1.4, and 1.5 have common features. Their conditions concern the circuit structure — the circuit graph that expresses the interconnection of the elements and the type of elements that occupy the branches of the graph, but not the element values. Therefore, the theorems guarantee the existence and uniqueness of the solution for whole classes of circuits, in which the individual circuits differ by their element values and parameters. In this sense, the conditions are not only sufficient, but also

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1-9

Qualitative Analysis

V

I

I V

FIGURE 1.13 Circuit of Figure 1.10 with nullator and norator.

I

I

+ −

FIGURE 1.14 Norator–I-resistor–voltage source tree.

I

I

+ −

FIGURE 1.15 Nullator–I-resistor–voltage source tree.

necessary. This means, for example, in the case of Theorem 1.5 that if all circuits with the same structure have exactly one solution, then the three conditions must be satisfied. However, by logical contraposition, if one of the three conditions is not satisfied for a given circuit structure, a circuit with this structure exists which has either no solution or more than one solutions. On the other hand, if we consider a specific circuit, the conditions are only sufficient. They permit us to prove that the solution exists and is unique, but some circuits do not satisfy the conditions and still have exactly one solution. However, if the parameters of such a circuit are varied, one eventually falls onto a circuit with no solution or more than one solution. The main conditions of Theorems 1.3 and 1.4 have an evident intuitive meaning. The orientations to look for in Theorems 1.5 are linked to the sign of the currents and the voltages of the difference of two solutions. Because the resistors are increasing, these signs are the same for the voltage and current differences. If we extend the analysis of the signs of solutions or solution differences to other elements, we must differentiate between voltages and currents. This approach, in which two orientations for all branches are considered, one corresponding to the currents and one corresponding to the voltages, is pursued in [10].

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1-10

Nonlinear and Distributed Circuits

The conditions of Theorems 1.3 to 1.5 can be verified by inspection for small circuits. For larger circuits, one must resort to combinatorial algorithms. Such algorithms are proposed in [11,12]. As can be expected from the nature of conditions, the algorithms grow exponentially with the number of resistors. It is not known whether algorithms of polynomial complexity exist. Some circuits always have either no solution or an infinite number of solutions, irrespective of the element and parameter values. Figure 1.6 gives the simplest example. Such circuits clearly are not very useful in practice. The remaining circuits are those that may have a finite number n > 1 of solutions if the circuit parameters are chosen suitably. These are the circuits that are useful for static memories and for multivibrators in general. This class is characterized by the following theorem. Theorem 1.6: Let circuit be composed of nullator-norator pairs, V- and I-resistors, and independent voltage and current sources. If the following three conditions are satisfied, the circuit has more than one, but a finite number of solutions for a suitable choice of circuit parameters: • The norators, I-resistors, and the voltage sources together form a tree. • The nullators, I-resistors, and the voltage sources together form a tree. • A nontrivial, uniform partial orientation of the resistors occurs. Can we be more precise and formulate conditions on the circuit structure that guarantee four solutions, for example? This is not possible because changing the parameters of the circuit will lead to another number of solutions. Particularly with a circuit structure that satisfies the conditions of Theorem 1.6, there is a linear circuit that always has an infinite number of solutions. If we are more restrictive on the resistor characteristics, e.g., imposing convex or concave characteristics for certain resistors, it is possible to determine the maximum number of solutions. A method to determine an upper bound is given in [14], whereas the results of [15] allow us to determine the actual maximum number under certain conditions. Despite these results, however, the maximum number of solutions is still an open problem.

Bounds on Voltages and Currents It is common sense for electrical engineers that in an electronic circuit all node voltages lie between 0 and the power supply voltage, or between the positive and the negative power supply voltages, if both are present. Actually, this is only true for the DC-operating point, but can we prove it in this case? The following theorems give the answer. They are based on the notion of passivity. Definition 1.5. A resistor is passive if it can only absorb, but never produce power. This means that for any point (v, i) on its characteristic we have v ⋅i ≥ 0

(1.24)

A resistor is strictly passive, if in addition to (1.24) it satisfies the condition v ⋅i = 0 → v = i = 0

(1.25)

Theorem 1.7: Let a circuit be composed of strictly passive resistors and independent voltage and current sources. Then, for every branch k of the circuit the following bounds can be given: vk ≤

∑

vj

(1.26)

∑

ij

(1.27)

source branches j

ik ≤

source branches j

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Qualitative Analysis

+ E −

+ − R1

+ R2

v −

FIGURE 1.16 Voltage amplifier.

If, in addition, the circuit is connected and all sources have a common node, the ground node, then the maximum and the minimum node voltage are at a source terminal. The theorem implies in particular that in a circuit with a single voltage source, all branch voltages are bounded by the source voltage in magnitude, and all node voltages lie between zero and the source voltage. Similarly, if a circuit has a single current source, all branch currents are bounded by the source current in magnitude. Finally, if several voltage sources are present that are all connected to ground and have positive value, then the node voltages lie between zero and the maximum source voltage. If some sources have positive values and others have negative values, then all node voltages lie between the maximum and the minimum source values. This theorem and various generalizations can be found in [1]. The main drawback is that it does not admit nonreciprocal elements. A simple counterexample is the voltage amplifier of Figure 1.16. The voltage of the output node of the operational amplifier is v=

R1 + R2 E R1

(1.28)

Thus, the output node voltage is higher than the source voltage. Of course, the reason is that the operational amplifier is an active element. It is realized by transistors and needs a positive and a negative voltage source as the power supply. The output voltage of the operational amplifier cannot exceed these supply voltages. This fact is not contained in the model of the ideal operational amplifier, but follows from the extension of Theorem 1.7 to bipolar transistors [1, 16]. Theorem 1.8: Let a circuit be composed of bipolar transistors modeled by the Ebers–Moll equations, of strictly passive resistors, and of independent voltage and current sources. Then, the conclusion of Theorem 1.7 hold. At first glance, Theorem 1.8 appears to imply that it is impossible to build an amplifier with bipolar transistors. Indeed, it is impossible to build such an amplifier with a single source, the input signal. We need at least one power supply source that sets the limits of dynamic range of the voltages according to Theorem 1.8. The signal source necessarily has a smaller amplitude and the signal can be amplified roughly up to the limit set by the power supply source. Theorem 1.8 can be extended to MOS transistors. The difficulty is that the nonlinear characteristics of the simplest model is not strictly increasing, and therefore some interconnection condition must be added to avoid parts with undetermined node voltages.

Monotonic Dependence Instead of looking at single solutions of resistive circuits, as done earlier in the chapter, we consider here a solution as a function of a parameter. The simplest and at the same time the most important case is the dependence of a solution on the value of a voltage or current source. To have a well-defined situation, we suppose that the circuit satisfies the hypotheses of Theorem 1.5. In this case [1, 8], the solution is a continuous function of the source values. As an example, let us consider the circuit of Figure 1.17. We are interested in the dependence of the various currents on the source voltage E. Because the circuit contains only strictly increasing resistors,

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Nonlinear and Distributed Circuits

R1 R3

i1

R5

E R2

i5 R4

FIGURE 1.17 Circuit example for source dependence.

[A] i5 1 E −10

0

10 [V]

FIGURE 1.18 Nonmonotonic dependence.

we expect all currents to be strictly monotonic functions of E. This is not true. In Figure 1.18, the current i5(E) is represented for R1 = R2 = R3 = 2R4 = R5 = 1 Ω and for standard diode model parameters. Clearly, it is nonmonotonic.

1.3

Autonomous Dynamic Circuits

Introduction This section adds to the resistive elements of the previous section — the capacitors and the inductors. A nonlinear capacitor is defined by the constitutive relation v = h(q )

(1.29)

where the auxiliary variable q is the charge of the capacitor, which is linked to the current by i=

dq dt

(1.30)

The dual element, the nonlinear inductor, is defined by i = g (ϕ )

(1.31)

where the auxiliary variable ϕ, the flux, is linked to the voltage by v=

dϕ dt

The symbols of these two elements are represented in Figure 1.19.

FIGURE 1.19 Symbols of the nonlinear capacitor and the nonlinear inductor.

Copyright © 2006 Taylor & Francis Group, LLC

(1.32)

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Qualitative Analysis

The system of equations that describes an autonomous dynamic circuit is composed of (1.12) to (1.17), completed with (1.29) and (1.30) for capacitor branches and (1.31) and (1.32) for inductor branches. Hence, it becomes a mixed differential–nondifferential system of equations. Its solutions are the voltages, currents, charges, and fluxes as functions of time. Because it contains differential equations, we have infinitely many solutions, each one determined by some set of initial conditions. If all variables except the charges and fluxes are eliminated from the system of equations, one obtains a reduced, purely differential system of equations dq = f (q,ϕ) dt

(1.33)

dϕ = g (q, ϕ) dt

(1.34)

where q and ϕ are the vectors composed of, respectively, the capacitor charges and the inductor fluxes. These are the state equations of the circuit. Under mild assumptions on the characteristics of the nonlinear elements (local Lipschitz continuity and eventual passivity), it can be shown that the solutions are uniquely determined by the initial values of the charges and fluxes at some time t0, q(t0), and ϕ(t0), and that they exist for all times t0 ≤ t < ∞ [1, 17]. It cannot be taken for granted, however, that the circuit equations actually can be reduced to that state, Eqs. (1.33) and (1.34). On the one hand, the charges and fluxes may be dependent and thus their initial values cannot be chosen freely. However, the state equations may still exist, in terms of a subset of charges and fluxes. This means that only these charges and fluxes can be chosen independently as initial conditions. On the other hand, the reduction, even to some alternative set of state variables, may be simply impossible. This situation is likely to lead to impasse points, i.e., nonexistence of the solution at a finite time. We refer the reader to the discussion in [1]. In the sequel, we suppose that the solutions exist from the initial time t0 to +∞ and that they are determined by the charges and fluxes at t0. We are interested in the asymptotic behavior, i.e., the behavior of the solutions when the time t goes to infinity. If the dynamic circuit is linear and strictly stable, i.e., if all its natural frequencies are in the open left half of the complex plane, then all solutions converge to 1 and the same DC-operating (equilibrium) point. This property still holds for many nonlinear circuits, but not for all by far. In particular, the solutions may converge to different DC-operating points, depending on the initial conditions (static memories), they may converge to periodic solutions (free-running oscillators), or they may even show chaotic behavior (e.g., Chua’s circuit). Here, we give conditions that guarantee the solutions converge to a unique solution or one among several DC-operating points.

Convergence to DC-Operating Points The methods to prove convergence to one or more DC-operating points is based on Lyapunov functions. A Lyapunov function is a continuously differentiable function W(ξξ), where ξ is the vector composed of the circuit variables (the voltages, currents, charges, and fluxes). In the case of autonomous circuits, a Lyapunov function must have the following properties: 1. W is bounded below, i.e., there exists a constant W0 such that W (ξ) ≥ W0 for all ξ

(1.35)

2. The set of voltages, currents, charges, and fluxes of the circuit such that W(ξ) ≤ E is bounded for any real E. 3. For any solution ξ(t) of the circuit

( )

d W ξ(t ) ≤ 0 dt

Copyright © 2006 Taylor & Francis Group, LLC

(1.36)

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Nonlinear and Distributed Circuits

4. If

( )

d W ξ(t ) = 0 dt

(1.37)

then ξ(t) is a DC-operating point. If an autonomous circuit has a Lyapunov function and if it has at least one, but a finite number of DCoperating points, then every solution converges to a DC-operating point. The reason is that the Lyapunov function must decrease along each solution, and thus must result in a local minimum, a stable DCoperating point. If more than one DC-operating point exists, it may, as a mathematical exception that cannot occur in practice, end up in a saddle point, i.e., an unstable DC-operating point. The problem with the Lyapunov function method is that it gives no indication as to how to find such a function. Basically, three methods are available to deal with this problem: 1. Use some standard candidates for Lyapunov functions, e.g., the stored energy. 2. Use a certain kind of function and adjust the parameters in order to satisfy 2 and 3 in the previous list. Often, quadratic functions are used. 3. Use an algorithm to generate Lyapunov functions [18-20]. The following theorems were obtained via approach 1, and we indicate which Lyapunov was used to prove them. At first glance, this may seem irrelevant from an engineering point of view. However, if we are interested in designing circuits to solve optimization problems, we are likely to be interested in Lyapunov functions. Indeed, as mentioned previously, along any solution of the circuit, the Lyapunov function decreases and approaches a minimum of the function. Thus, the dynamics of the circuit solve a minimization problem. In this case, we look for a circuit with a given Lyapunov function, however, usually we look for a Lyapunov function for a given circuit. Theorem 1.9: Let a circuit be composed of capacitors and inductors with a strictly increasing characteristic, resistors with a strictly increasing–characteristic, and independent voltage and current sources. Suppose the circuit has a DC-operating point ξ. By Theorem 1.1, this DC-operating point is unique. Finally, suppose the circuit has no loop composed of capacitors, inductors, and voltage sources and no cutset composed of capacitors, – inductors, and current sources. Then, all solutions of the circuit converge to ξ. The Lyapunov function of this circuit is given by a variant of the stored energy in the capacitors and – the resistors, the stored energy with respect to ξ [1, 17]. If the constitutive relations of the capacitors and the inductors are given by vk = hk (qk) and ik = gk (vk), respectively, then this Lyapunov function becomes

∑ ∫ (h (q) − h (q ))dq

W (ξ ) =

qk

capacitor branches k

+

k

qk

k

k

∑ ∫ ( g (ϕ) − g (ϕ ))dϕ ϕk

inductor branches k

ϕk

k

k

(1.38)

k

The main condition (1.36) for a Lyapunov function follows from the fact that the derivative of the stored energy is the absorbed power, here in incremental form: d W (ξ ) = dt

∑

capacitor and inductor branches k

Copyright © 2006 Taylor & Francis Group, LLC

∆v k ∆ik = −

∑

resistor branches k

∆v k ∆ik ≤ 0

(1.39)

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Qualitative Analysis

Various generalizations of Theorem 1.9 have been given. The condition “strictly increasing resistor – characteristic” has been relaxed to a condition that depends on ξ in [1, 17] and mutual inductances and capacitances have been admitted in [17]. The next theorem admits resistors with nonmonotonic characteristics. However, it does not allow for both inductors and capacitors. Theorem 1.10: Let a circuit be composed of capacitors with a strictly increasing characteristic, voltagecontrolled resistors such that v → + ∞ ⇒ i > I + > 0 and v → − ∞ ⇒ i < I − < 0

(1.40)

and independent voltage sources. Furthermore, suppose that the circuit has a finite number of DC-operating points. Then every solution of the circuit converges toward a DC-operating point. This theorem is based on then following a Lyapunov function, called cocotent:

∑∫

( )

W ξ(t ) =

resistor branches k

vk o

g k (v )dv

(1.41)

where ik = gk(vk) is the constitutive relation of the resistor on branch k. The function W is decreasing along a solution of the circuit because

( ) ∑

d W ξ(t ) = dt

resistor branches k

=−

dv k i =− dt k

∑

capacitor branches k

∑

capacitor branches k

dv k i dt k (1.42)

dhk 2 i ≤0 dq k

where hk (qk) is the constitutive relation of the capacitor on branch k. Theorem 1.10 has a dual version. It admits inductors instead of capacitors, current-controlled resistors, and current sources. The corresponding Lyapunov function is the content: W (ξ ) =

∑∫

resistor branches k

ik o

hk (i )di

(1.43)

where vk = hk(ik) is the constitutive relation of the resistor on branch k. The main drawback of the two preceding theorems is that they do not admit nonreciprocal elements such as controlled sources, operational amplifiers, etc. In other words, no statement about the analog neural network of Figure 1.20 can be made. In this network the nonreciprocal element is the VCVS with the nonlinear characteristics v2 = σ(v1). However, Theorem 1.10 can be generalized to a reciprocal voltage controlled N-port resistor closed on capacitors and voltage sources. Such an N-port (Figure 1.21) is described by a constitutive relation of the form ik = g k (v1 , ... , v N )

(1.44)

and it is reciprocal, if for all v, and all k, j we have ∂g ∂g k v) = j (v) ( ∂v j ∂v k

Copyright © 2006 Taylor & Francis Group, LLC

(1.45)

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1-16

Nonlinear and Distributed Circuits

R1N

R12

R11 σ

I1 R2N

R22

R21

R1

C σ

I2

R2

RNN

RN2

C

RN1 σ

IN

RN

C

FIGURE 1.20 Analog neural network.

+ v1 −

i1

resistive N-port

iN

+ vN −

FIGURE 1.21 Resistive N-port.

Theorem 1.11: Let a circuit be composed of charge-controlled capacitors with a strictly increasing characteristic and independent voltage sources that terminate a reciprocal voltage-controlled N-port with constitutive relation (1.42) so that we find constants V and P > 0 such that N

v ≥V ⇒g ⋅v =

∑g

k

( v ) vk ≥ P

(1.46)

k =1

If the number of DC-operating points is finite, then all solutions converge toward a DC-operating point. The proof of this theorem is based on the Lyapunov function W(v) that satisfies ∂W (v) = gk (v) ∂v k

(1.47)

Thanks to condition (1.45), function W exists. The first two conditions for a Lyapunov function are a consequence of (1.46). Finally,

(

) ∑

gk (v)

∑

dv ik k dt

d W ξ (t ) = dt =

resistor branches k

resistor branches k

Copyright © 2006 Taylor & Francis Group, LLC

dv k dt (1.48)

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Qualitative Analysis

=–

∑

capacitor branches k

dhk 2 i ≤0 dq k

where hk(qk) is the constitutive relation of the capacitor on branch k. To illustrate how Theorem 1.11 can be applied when Theorem 1.10 fails, consider the analog neural network of Figure 1.20. If the capacitor voltages are denoted by ui and the voltages at the output of the voltage sources by vi , the state equations for the network of Figure 1.1 become − Ci

dui ui = + dt Ri

N

∑

ui − v j

+ Ii

Rij

j =1

(1.49)

Suppose that the nonlinear characteristic σ(u) is invertible. The state equations can be written in terms of the voltages vi : −C

N

dv dσ − 1 v i ) i = Gi σ − 1 (v i ) − ( dt dv

∑R

vj

j =1

+ Ii

(1.50)

ij

where Gi =

1 + Ri

N

∑ R1 j =1

(1.51)

ij

Equations (1.40) can be reinterpreted as the equations of a resistive N-port with the constitutive relations g i ( v ) = Gi σ − 1 (v i ) −

N

∑R j =1

vj

+ Ii

(1.52)

ij

closed on nonlinear capacitors with the constitutive relation q v=σ C

(1.53)

If σ is a sigmoidal function, as is most often supposed in this context (i.e., a strictly increasing function with s(u) → ±1 for u → ±∞), then the capacitors have a strictly increasing characteristic, as required by Theorem 1.11. Furthermore, the resistive N-port is reciprocal if for i ≠ j ∂g ∂g i 1 1 =− = j =− Rij ∂v i R ji ∂v j

(1.54)

Rij = R ji

(1.55)

In other words, if for all i, j

On the other hand, inequality (1.46) must be modified because the sigmoids have values only in the interval [–1, +1] and thus (1.50) are defined only on the invariant bounded set S = {v – 1 < vi < +1}. Therefore, inequality (1.50) must be satisfied for vectors v sufficiently close to the boundary of S. This

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Nonlinear and Distributed Circuits

is indeed the case, because σ–1(v) → ±∞ as v → ±1, whereas the other terms of the right-hand side of (1.52) remain bounded. It follows that all solutions of the analog neural network of Figure 1.20 converge to a DC-operating point as t → ∞, provided σ is a sigmoid function and the connection matrix Rij (synaptic matrix) is symmetrical. The Lyapunov function can be given explicitly: W (v) =

N

∑

Gi

i =1

1.4

1 N v iv j vi −1 σ v dv − + ( ) ∫0 2 i , j = 1 Rij

∑

N

∑v I

i i

(1.56)

i =1

Nonautonomous Dynamic Circuits

Introduction This section is a consideration of circuits that contain elements where constitutive relations depend explicitly on time. However, we limit time dependence to the independent sources. For most practical purposes, this is sufficient. A time-dependent voltage source has a constitutive relation v = e(t )

(1.57)

i = e(t )

(1.58)

and a time-dependent current source

where e(t) is a given function of time which we suppose here to be continuous. In information processing circuits, e(t) represents a signal that is injected into the circuit, whereas in energy transmission circuits e(t) usually is a sinusoidal or nearly sinusoidal function related to a generator. The time-dependent sources may drive the voltages and the currents to infinity, even if they only inject bounded signals into the circuit. Therefore, the discussion begins with the conditions that guarantee the boundedness of the solutions.

Boundedness of the Solutions In electronic circuits, even active elements become passive when the voltages and currents grow large. This is the reason that solutions remain bounded. Definition 1.6. A resistor is eventually passive if, for sufficiently large voltages and/or currents, it can only absorb power. More precisely, eventual passivity means that constants V and I exist such that, for all points (v, i) on the resistor characteristic with v > V or i > I, we have v ⋅i ≥ 0

(1.59)

Note that sources are not eventually passive, but as soon as an internal resistance of a source is taken into account, the source becomes eventually passive. The notion of eventual passivity can be extended to time-varying resistors. Definition 1.7. A time-varying resistor is eventually passive if constants V and I are independent of time and are such that all points (v, i), with v > V or i > I that at some time lie on the characteristic of the resistor, satisfy the passivity condition (1.59). According to this definition, time-dependent sources with internal resistance are eventually passive if the source signal remains bounded.

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Qualitative Analysis

Eventual passivity allows us to deduce bounds for the solutions. These bounds are uniform in the sense that they do not depend on the particular solution. To be precise, this is true only asymptotically, as t → ∞. Definition 1.8. The solutions of a circuit are eventually uniformly bounded if there exist constants V, I, Q, and Φ are such that, for any solution there exists a time T such that for any t > T, the voltages vk (t) are bounded by V, the currents ik (t) are bounded by I, the charges qk (t) are bounded by Q, and the fluxes ϕk(t) are bounded by Φ. Another manner of expressing the same property is to say that an attracting domain exists in state space [1]. Theorem 1.12: A circuit composed of eventually passive resistors with v · i → +∞ as v → ∞ or i → ∞, capacitors with v → ±∞ as q → ≠∞, and inductors with i → ±∞ as ϕ → ∞ has eventually uniformly bounded solutions if no loop or cutset exists without a resistor [1,17]. Again, this theorem is proved by using a Lyapunov function, namely the stored energy W (ξ ) =

∑∫

capacitor branches k

qk 0

hk (q)dq +

∑∫

capacitor branches k

ϕk 0

g k (ϕ)dϕ

(1.60)

Inequality (1.36) holds only outside of a bounded domain.

Unique Asymptotic Behavior In the presence of signals with complicated waveforms that are injected into a circuit, we cannot expect simple waveforms for the voltages and the currents, not even asymptotically, as t → ∞. However, we can hope that two solutions, starting from different initial conditions, but subject to the same source, have the same steady-state behavior. The latter term needs a more formal definition. Definition 1.9. A circuit has unique asymptotic behavior if the following two conditions are satisfied: 1. All solutions are bounded. 2. For any two solutions ξ1(t) and ξ2(t) ξ1 (t ) − ξ 2 (t ) →t →∞ 0

(1.61)

In order to prove unique asymptotic behavior, it is necessary to extend the notion of the Lyapunov function [1]. This does not lead very far, but at least it permits us to prove the following therorem. Therorem 1.13: Suppose a circuit is composed of resistors with a strictly increasing characteristic such that v · i → ∞ as v → ∞ or i → ∞, positive linear capacitors, positive linear inductors, time-depending voltage (current) sources with bounded voltage (current) and a positive resistor in series (parallel). If no loop or cutset is composed exclusively of capacitors and inductors, the circuit has unique asymptotic behavior [1, 17]. This theorem is unsatisfactory because linear reactances are required and real devices are never exactly linear. It has been shown that slight nonlinearities can be tolerated without losing the unique asymptotic behavior [21]. On the other hand, we cannot expect to get much stronger general results because nonautonomous nonlinear circuits may easily have multiple steady-state regimes and even more complicated dynamics, such as chaos, even if the characteristics of the nonlinear elements are all strictly increasing. Another variant of Theorem 1.13 considers linear resistors and nonlinear reactances [17].

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Nonlinear and Distributed Circuits

References [1] M. Hasler and J. Neirynck, Nonlinear Circuits, Boston: Artech House, 1986. [2] L. O. Chua, C. A. Desoer, and E. S. Kuh, Linear and Nonlinear Circuits, Electrical & Electronic Engineering Series, Singapore: McGraw-Hill International Editors, 1987. [3] A. N. Willson, Ed., Nonlinear Networks: Theory and Analysis, New York: IEEE Press, 1974. [4] R. O. Nielsen and A. N. Willson, “A fundamental result concerning the topology of transistor circuits with multiple equilibria,” Proc. IEEE, vol. 68, pp. 196–208, 1980. [5] A. N. Willson, “On the topology of FET circuits and the uniqueness of their dc operating points,” IEEE Trans. Circuits Syst., vol. 27, pp. 1045–1051, 1980. [6] T. Nishi and L. O. Chua, “Topological criteria for nonlinear resistive circuits containing controlled sources to have a unique solution,” IEEE Trans. Circuits Syst., vol. 31, pp. 722–741, Aug. 1984. [7] T. Nishi and L. O. Chua, “Nonlinear op-amp circuits: Existence and uniqueness of solution by inspection,” Int. J. Circuit Theory Appl., vol 12, pp. 145–173, 1984. [8] M. Hasler, “Nonlinear nonreciprocal resistive circuits with a unique solution,” Int. J. Circuit Theory Appl., vol. 14, pp. 237–262, 1986. [9] M. Fosséprez, Topologie et Comportement des Circuits non Linéaires non Réciproques, Lausanne: Presses Polytechnique Romands, 1989. [10] M. Hasler, “On the solution of nonlinear resistive networks,” J. Commun. (Budapest, Hungary), special issue on nonlinear circuits, July 1991. [11] T. Parker, M. P. Kennedy, Y. Lioa, and L. O. Chua, “Qualitative analysis of nonlinear circuits using computers,” IEEE Trans. Circuits Syst., vol. 33, pp. 794–804, 1986. [12] M. Fosséprez and M. Hasler, “Algorithms for the qualitative analysis of nonlinear resistive circuits,” IEEE ISCAS Proc., pp. 2165–2168, May 1989. [13] M. Fosséprez and M. Hasler, “Resistive circuit topologies that admit several solutions,” Int. J. Circuit Theory Appl., vol. 18, pp. 625–638, Nov. 1990. [14] M. Fosséprez, M. Hasler, and C. Schnetzler, “On the number of solutions of piecewise linear circuits,” IEEE Trans. Circuits Syst., vol. CAS-36, pp. 393–402, March 1989. [15] T. Nishi and Y. Kawane, “On the number of solutions of nonlinear resistive circuits,” IEEE Trans., vol. E74, pp. 479–487, 1991. [16] A. N. Willson, “The no-gain property for networks containing three-terminal elements,” IEEE Trans. Circuits Syst., vol. 22, pp. 678–687, 1975. [17] L. O. Chua, “Dynamic nonlinear networks: state of the art, “IEEE Trans. Circuits Syst., vol. 27, pp. 1059–1087, 1980. [18] R. K. Brayton and C.H. Tong, “Stability of dynamical systems,” IEEE Trans. Circuits Syst., vol. 26, pp. 224–234, 1979. [19] R. K. Brayton and C. H. Tong, “Constructive stability and asymptotic stability of dynamical systems,” IEEE Trans. Circuits Syst., vol. 27, pp. 1121–1130, 1980. [20] L. Vandenberghe and S. Boyd, “A polynomial-time algorithm for determining quadratic Lyapunov functions for nonlinear systems,” Proc. ECCTD-93, pp. 1065–1068, 1993. [21] M. Hasler and Ph. Verburgh, “Uniqueness of the steady state for small source amplitudes in nonlinear nonautonomous circuits,” Int. J. Circuit Theory Appl., vol. 13, pp. 3–17, 1985.

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2 Synthesis and Design of Nonlinear Circuits 2.1 2.2

Introduction ....................................................................... 2-1 Approximation Issues ........................................................ 2-3 Unidimensional Functions • Piecewise-Linear and PiecewisePolynomial Approximants • Gaussian and Bell-Shaped Basis Functions • Multidimensional Functions

2.3

Aggregation, Scaling, and Transformation Circuits....... 2-10

2.4

Piecewise-Linear Circuitry............................................... 2-16

Transformation Circuits • Scaling and Aggregation Circuitry Current Transfer Piecewise-Linear Circuitry • Transresistance Piecewise-Linear Circuitry • Piecewise-Linear Shaping of Voltage-to-Charge Transfer Characteristics

A. Rodríguez-Vázquez

2.5

Concepts and Techniques for Polynomic and Rational Functions • Multiplication Circuitry • Multipliers Based on Nonlinear Devices

Universidad de Sevilla, Spain

M. Delgado-Restituto Universidad de Sevilla, Spain

2.6

F. Vidal Universidad de Malaga, Spain

2.1

Sigmoids, Bells, and Collective Computation Circuits.. 2-26 Sigmoidal Characteristics • Bell-Like Shapes • Collective Computation Circuitry

J. L. Huertas Universidad de Sevilla, Spain

Polynomials, Rational, and Piecewise-Polynomial Functions .......................................................................... 2-20

2.7 2.8 2.9

Extension to Dynamic Systems ....................................... 2-30 Appendix A: Catalog of Primitives ................................. 2-31 Appendix B: Value and Slope Hermite Basis Functions... 2-32

Introduction

Nonlinear synthesis and design can be informally defined as a constructive procedure to interconnect components from a catalog of available primitives, and to assign values to their constitutive parameters to meet a specific nonlinear relationship among electrical variables. This relationship is represented as an implicit integro-differential operator, although we primarily focus on the synthesis of explicit algebraic functions, y = f (x )

(2.1)

where y is a voltage or current, f (·) is a nonlinear real-valued function, and x is a vector with components that include voltages and currents. This synthesis problem is found in two different circuit-related areas: device modeling [8, 76] and analog computation [26]. The former uses ideal circuit elements as primitives to build computer models of real circuits and devices (see Chapter 1). The latter uses real circuit components, available either off the shelf or integrable in a given fabrication technology, to realize hardware for nonlinear signal processing tasks. We focus on this second area, and intend to outline

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Nonlinear and Distributed Circuits

vbc Primitives for Synthesis

ic ic = Is (evbe/vt − evbe/vt)

vbe

Nonlinear Operators

Interconnection Law

Elementary Functions

Nonlinear Circuit

Approximation Procedure

Nonlinear Task

Φ (x) = (x − E)r sgn (x − E)

Q

f (x) ≈ g (x) =

∑ Wj Φj (x) j=1

FIGURE 2.1 Hierarchical decomposition of the synthesis problem.

systematic approaches to devise electronic function generators. Synthesis relies upon hierarchical decomposition, conceptually shown in Figure 2.1, which encompasses several subproblems listed from top to bottom: • Realization of nonlinear operators (multiplication, division, squaring, square rooting, logarithms, exponentials, sign, absolute value, etc.) through the interconnection of primitive components (transistors, diodes, operational amplifiers, etc.). • Realization of elementary functions (polynomials, truncated polynomials, Gaussian functions, etc.) as the interconnection of the circuit blocks devised to build nonlinear operators. • Approximation of the target as a combination of elementary functions and its realization as the interconnection of the circuit blocks associated with these functions. Figure 2.1 illustrates this hierarchical decomposition of the synthesis problem through an example in which the function is approximated as a linear combination of truncated polynomials [30], where realization involves analog multipliers, built by exploiting the nonlinearities of bipolar junction transistors (BJTs) [63]. Also note that the subproblems cited above are closely interrelated and, depending on the availability of primitives and the nature of the nonlinear function, some of these phases can be bypassed. For instance, a logarithmic function can be realized exactly using BJTs [63], but requires approximation if our catalog includes only field-effect transistors whose nonlinearities are polynomic [44]. The technical literature contains excellent contributions to the solution of all these problems. These contributions can hardly be summarized or even quoted in just one section. Many authors follow a blockbased approach which relies on the pervasive voltage operational amplifier (or op amp), the rectification properties of junction diodes, and the availability of voltage multipliers, in the tradition of classical analog computation. Examples are [7], [59], and [80]. Remarkable contributions have been made which focus on qualitative features such as negative resistance or hysteresis, rather than the realization of well-defined approximating functions [9, 20, 67]. Other contributions focus on the realization of nonlinear operators in the form of IC units. Translinear circuits, BJTs [23, 62] and MOSFETs [79] are particularly well suited to realize algebraic functions in IC form. This IC orientation is shared by recent developments in analog VLSI computational and signal processing systems for neural networks [75], fuzzy logic [81], and other nonlinear signal processing paradigms [56, 57, 71].

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Synthesis and Design of Nonlinear Circuits

This chapter is organized to fit the hierarchical approach in Figure 2.1. We review a wide range of approximation techniques and circuit design styles, for both discrete and monolithic circuits. It is based on the catalog of primitives shown in Appendix A. In addition to the classical op-amp-based continuoustime circuits, we include current-mode circuitry because nonlinear operators are realized simply and accurately by circuits that operate in current domain [23, 57, 62, 79]. We also cover discrete-time circuits realized using analog dynamic techniques based on charge transfer, which is very significant for mixedsignal processing and computational microelectronic systems [27, 72]. Section 2.2 is devoted to approximation issues and outlines different techniques for uni- and multidimensional functions, emphasizing hardware-oriented approaches. These techniques involve several nonlinear operators and the linear operations of scaling and aggregation (covered in Section 2.3, which also presents circuits to perform transformations among different kinds of characteristics). Sections 2.4 and 2.5 present circuits for piecewise-linear (PWL) and piecewise-polynomial (PWP) functions, 2.6 covers neural and fuzzy approximation techniques, and 2.7 outlines an extension to dynamic circuits.

2.2

Approximation Issues

Unidimensional Functions Consider a target function, f (x), given analytically or as a collection of measured data at discrete values of the independent variable. The approximation problem consists of finding a multiparameter function, g (x, w), which yields proper fitting to the target, and implies solving two different subproblems: (1) which approximating functions to use, and (2) how to adjust the parameter vector, w, to render optimum fitting. We only outline some issues related to this first point. Detailed coverage of both problems can be found in mathematics and optimization textbooks [73, 78]. Other interesting views are found in circuit-related works [6, 11, 30], and the literature on neural and fuzzy networks [12, 21, 33, 43, 51]. An extended technique to design nonlinear electronic hardware for both discrete [63, 80] and monolithic [35, 62, 79] design styles uses polynomial approximating functions, g (x ) =

Q

∑α x

j

(2.2)

j

j=0

obtained through expansion by either Taylor series or orthogonal polynomials (Chebyshev, Legendre, or Laguerre) [26]. Other related approaches use rational functions,

∑αx g (x ) = ∑β x

j

j

j = 0, Q

j

(2.3)

j

j 0, R

to improve accuracy in the approximation of certain classes of functions [14]. These can be realized by polynomial building blocks connected in feedback configuration [63]. In addition, [39] presents an elegant synthesis technique relying on linearly controlled resistors and conductors to take advantage of linear circuits synthesis methods (further extended in [28]). From a more general point of view, hardware-oriented approximating functions can be classified into two major groups: 1. Those involving the linear combination of basis functions g (x ) =

Copyright © 2006 Taylor & Francis Group, LLC

Q

∑ w j Φj ( x )

j =1

(2.4)

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Nonlinear and Distributed Circuits

δ11 x w11 Φ1(x)

x

Φ2(x)

+

W2

+ +

∑

h(•)

w21

h(•)

w22

δ12

W1

− w12

g(x)

+

+ ΦQ(x)

− ∑

∑

+ ∑

+ +

δ1Q w1Q

(a)

+

(b)

∑

g(x)

− δ2

−

WQ

h(•)

h(•)

w2Q

FIGURE 2.2 Block diagram for approximating function hardware. (a) Using linear combination of basis functions; (b) using two layers of nested sigmoids.

which include polynomial expansions. PWL and PWP interpolation and radial basis functions (RBF). The hardware for these functions consists of two layers, as shown in Figure 2.2 (a). The first layer contains Q nonlinear processing nodes to evaluate the basis functions; the second layer scales the output of these nodes and aggregates these scaled signals in a summing node. 2. Those involving a multilayer of nested sigmoids [51]; for instance, in the case of two layers [82], g ( x ) = h ∑ w 2 jh w1 j x − δ1 j − δ 2 j =1, Q

(

)

(2.5)

2 −1 1 + exp( − λx )

(2.6)

with the sigmoid function given by h( x ) =

where λ > 0 determines the steepness of the sigmoid. Figure 2.2(b) shows a hardware concept for this approximating function, also consisting of two layers.

Piecewise-Linear and Piecewise-Polynomial Approximants A drawback of polynomial and rational approximants is that their behavior in a small region determines their behavior in the whole region of interest [78]. Consequently, they are not appropriate to fit functions that are uniform throughout the whole region [see Figure 2.3 (a)]. Another drawback is their lack of modularity, a consequence of the complicated dependence of each fitting parameter on multiple target data, which complicates the calculation of optimum parameter values. These drawbacks can be overcome by splitting the target definition interval into Q subintervals, and then expressing approximating function as a linear combination of basis functions, each having compact support over only one subinterval, i.e., f x

f x parabolic

exponential

x

=

linear

FIGURE 2.3 Example of nonuniform function.

Copyright © 2006 Taylor & Francis Group, LLC

x

>

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Synthesis and Design of Nonlinear Circuits

zero value outside this subinterval. For the limiting case in which Q → ∞, this corresponds to interpolating the function by its samples associated to infinitely small subintervals [Figure 2.3(b)]. Such action is functionally equivalent to expressing a signal as its convolution with a delta of Dirac [10]. This splitting and subsequent approximation can be performed ad hoc, by using different functional dependences to fit each subregion. However, to support the systematic design of electronic hardware it is more convenient to rely on well-defined classes of approximating functions. In particular, Hermite PWPs provide large modularity by focusing on the interpolation of measured data taken from the target function. Any lack of flexibility as compared to the ad hoc approach may be absorbed in the splitting of the region. Consider the more general case in which the function, y = f (x), is defined inside a real interval [δ0, δN +1] and described as a collection of data measured at knots of a given interval partition, ∆ = {δ0, δ1, δ2, …, δN, δN +1}. These data may include the function values at these points, as well as their derivatives, up to the (M – 1)th order, dk k f ( ) δi = k f (x ) dx x =δ

( )

i = 0,1, 2, ... , N , N + 1

(2.7)

i

where k denotes the order of the derivative and is zero for the function itself. These data can be interpolated by a linear combination of basis polynomials of degree 2M – 1, g (x ) =

N +1 M −1

∑ ∑ f ( ) (δ )Φ (x) k

i

(2.8)

ik

i=0 k=0

where the expressions for these polynomials are derived from the interpolation data and continuity conditions [78]. Note that for a given basis function set and a given partition of the interval, each coefficient in (2.8) corresponds to a single interpolation kust. The simplest case uses linear basis functions to interpolate only the function values, g (x ) =

N +1

∑ f (δ )l (x) i

(2.9)

i

i=0

with no function derivatives interpolated. Figure 2.4 shows the shape of the inner jth linear basis function, which equals 1 at δi and decreases to 0 at δi– 1 and δ i +1. Figure 2.5(a) illustrates the representation in (2.9). By increasing the degree of the polynomials, the function derivatives also can be interpolated. In particular, two sets of third-degree basis functions are needed to retain modularity in the interpolation of the function and its first derivative at the knots g (x ) =

N +1

∑

f (δ i )v i ( x ) +

i=0

N +1

∑ f ( ) (δ )s (x) 1

i

i

(2.10)

i=0

where Appendix B shows the shapes and expressions of the value, vi (x), and slope, si (x), basis functions. li( x ) 1.0

0.5

0.0

δi−1

δi

δi+1

Copyright © 2006 Taylor & Francis Group, LLC

x

FIGURE 2.4 Hermite linear basis function.

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Nonlinear and Distributed Circuits O1*

O2* N

N

(b)

(a)

FIGURE 2.5 Decomposition of a PWL function using the extension operator.

The modularity of Hermite polynomials is not free; their implementation is not cheapest in terms of components and, consequently, may not be optimal for an application in which the target function is fixed. These applications are more conveniently handled by the so-called canonical representation of PWP functions. A key concept is the extension operator introduced in [6]; the basic idea behind this concept is to build the approximating function following an iterative procedure. At each iteration, the procedure starts from a function that fits the data on a subinterval, enclosing several pieces of the partition interval, and then adds new terms to also fit the data associated to the next piece. Generally, some pieces are fit from left to right and others from right to left, to yield g (x ) = g 0 (x ) +

N+

∑

−1

∑ ∆ g (x )

∆+ g i ( x ) +

i =1

−

i

(2.11)

i = –N−

It is illustrated in Figure 2.5(b). The functions in (2.11) have the following general expressions ∆+ g ( x ) = wu+ ( x − δ) ≡ w ( x − δ) sgn( x − δ) ∆− g ( x ) = wu− ( x − δ) ≡ w ( x − δ) sgn(δ – x )

(2.12)

g 0 ( x ) = ax + b where sgn (·) denotes the sign function, defined as an application of the real axis onto the discrete set {0,1}. This representation, based on the extension operator, is elaborated in [6] to obtain the following canonical representation for unidimensional PWL functions: g ( x ) = ax + b +

N

∑w x − δ i

(2.13)

i

i =1

which has the remarkable feature of involving only one nonlinearity: the absolute value function. The extension operator concept was applied in [30] to obtain canonical representations for cubic Hermite polynomials and B-splines. Consequently, it demonstrates that a PWP function admits a global expression consisting of a linear combination of powers of the input variable, plus truncated powers of shifted versions of this variable. For instance, the following expression is found for a cubic B-spline: g (x ) =

N

3

∑ r =0

αr x r +

∑ β (x − δ ) sgn(x − δ ) 3

i

i

i

(2.14)

i =1

with αr and βi obtainable through involved operations using the interpolation data. Other canonical PWP representations devised by these authors use

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Synthesis and Design of Nonlinear Circuits

(x − δi )

r

sgn( x − δ i ) =

{

}

r −1 1 x − δi + (x − δi ) (x − δi ) 2

(2.15)

to involve the absolute value, instead of the sign function, in the expression of the function.

Gaussian and Bell-Shaped Basis Functions The Gaussian basis function belongs to the general class of radial basis functions [51, 52], and has the following expression: ( x − δ )2 Φ( x ) = exp − 2σ 2

(2.16)

plotted in Figure 2.6. The function value is significant only for a small region of the real axis centered around its center, δ, and its shape is controlled by the variance parameter, σ2. Thus, even through the support of Gaussian functions is not exactly compact, they are negligible except for well-defined local domains of the input values. By linear combination of a proper number of Gaussians, and a proper choice of their centers and variances, as well as the weighting coefficients, it is possible to approximate nonlinear functions to any degree of accuracy [51]. Also, the local feature of these functions renders this adjustment process simpler than for multilayer networks composed of nested sigmoids, whose components are global [43, 50]. A similar interpolation strategy arises in the framework of fuzzy reasoning, which is based on local membership functions whose shape resembles a Gaussian. For instance, in the ANFIS system proposed by Jang [33] Φ( x ) =

1 x − δ 2 1 + σ

(2.17)

β

as plotted in Figure 2.7(a) where the shape is controlled by β and σ, and the position is controlled by δ. Other authors, for instance, Yamakawa [81], use the PWL membership function shape of Figure 2.7(b), Φ(x) 1.0 0.5 0.0

δ

x

FIGURE 2.6 Guassian basis function.

Φ(x)

Φ(x)

1.0

1.0

slope = −β/2σ

0.5 0.0 (a)

slope = −β

0.5 δ 2σ

0.0

x (b)

FIGURE 2.7 Fuzzy membership functions: (a) polynomial; (b) piecewise-linear.

Copyright © 2006 Taylor & Francis Group, LLC

δ 2σ

x

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Nonlinear and Distributed Circuits

which is similar to the Hermite linear basis function of Figure 2.4. From a more general point of view, cubic B-splines [78] used to build hardware [59] and for device modeling [76] also can be considered to be members of this class of functions.

Multidimensional Functions Approximation techniques for multidimensional functions are informally classified into five groups: 1. 2. 3. 4. 5.

Sectionwise piecewise polynominal functions [6, 30] Canonical piecewise linear representations [11] Neuro-fuzzy interpolation [33, 81] Radial basis functions [51, 52] Multilayers of nested sigmoids [82]

Sectionwise Piecewise-Polynomial Functions This technique reduces the multidimensional function to a sum of products of functions of only one variable: g (x ) =

M1 M 2

MP

k1 = 1 k2 = 1

kP = 1

∑∑ ∑

α(k1 , k2 ,

, kP )

P

∏ Φ (x ) j =1

kj

j

(2.18)

where α(k1, k2, …, kP ) denotes a constant coefficient. These function representations were originally proposed by Chua and Kang for the PWL case [6] where

( )

( ) ( ) Φ (x ) = x − δ

Φ1 x j = 1 Φ 2 x j = x j Φ3 x j = x j − δ j1 MP

j

(2.19)

jM P − 2

j

Similar to the unidimensional case, the only nonlinearity involved in these basis functions is the absolute value. However, multidimensional functions not only require weighted summations, but also multiplications. The extension of (2.18) to PWP functions was covered in [30], and involves the same kind of nonlinearities as (2.14) and (2.15). Canonical Piecewise Linear Representations The canonical PWL representation of (2.13) can be extended to the multidimensional case, based on the following representation: g (x ) = aT x + b +

Q

∑c w x − δ i

T i

i

(2.20)

i =1

where a and wi are P-vectors; b, ci, and δi are scalars; and Q represents the number of hyperplanes that divide the whole space RP into a finite number of polyhedral regions where g(·) can be expressed as an affine representation. Note that (2.20) avoids the use multipliers. Thus, g(·) in (2.20) can be realized through the block diagram of Figure 2.8, consisting of Q absolute value nonlinearities and weighted summers. Radial Basis Functions The idea behind radial basis function expansion is to represent the function at each point of the input space as a linear combination of kernel functions whose arguments are the radial distance of the input point to a selected number of centers

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2-9

Synthesis and Design of Nonlinear Circuits

N

=

=6N +

∑ +

N

M

>

M6N +

?

∑ − δ

6

N

M

MN +

?

∑ −

∑

CN

δ

N

M3

M36 N

+

?3

∑ − δ3

FIGURE 2.8 Canonical block diagram for a canonical PWL function.

g (x ) =

∑w Φ ( x − δ ) Q

j

j

j

(2.21)

j =1

where · denotes a norm imposed on RP, usually assumed Euclidean. The most common basis function is a Gaussian kernel similar to (2.16), x −δ 2 Φ( x ) = exp − 2σ 2

(2.22)

although many other alternatives are available [51], for instance,

(

Φ(r ) = σ 2 + r 2

)

–α

Φ(r ) = r

α ≥ −1

(2.23)

where r is the radial distance to the center of the basis function, r ≡ x – δ. Micchelli [42] demonstrated that any function where the first derivative is monotonic qualifies as a radial basis function. As an example, as (2.23) displays, the identity function Φ(r) = r falls into this category, which enables connecting the representation by radial basis functions to the canonical PWL representation [40]. Figure 2.9 is a block diagram for the hardware realization of the radial basis function model. Neuro-Fuzzy Interpolation This technique exploits the interpolation capabilities of fuzzy inference, and can be viewed as the multidimensional extension of the use of linear combination of bell-shaped basis functions to approximate nonlinear functions of a single variable [see (2.4) and (2.17)]. Apart from its connection to approximate reasoning and artificial intelligence, this extension exhibits features similar to the sectionwise PWP representation, namely, it relies on a well-defined class of unidimensional functions. However, neuro-fuzzy interpolation may be advantageous for hardware implementation because it requires easyto-build collective computation operators instead of multiplications. Figure 2.10 depicts the block diagram of a neuro-fuzzy interpolator for the simplest case in which inference is performed using the singleton algorithm [33] to obtain

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Nonlinear and Distributed Circuits

δ

É

x

δ

É

x

H

H

Φ.

M

Φ.

M

∑

δ3 x

É

H3

Cx

M3

Φ.

FIGURE 2.9 Concept of radial basis function hardware. N1

N2

Φ(.)

Γ(.)

Φ(.)

Γ(.)

I1

I2

N

M1

N

M2

∑

N2

Φ(.)

I3

Γ(.)

N

C (x )

M3

∑ FIGURE 2.10 Conceptual architecture of a neuro-fuzzy interpolator.

g (x ) =

s j (x )

Q

∑ w ∑ s (x )

(2.24)

j

j =1

i

i = 1,Q

where the functions si (x), called activities of the fuzzy rules, are given as

{

}

s j ( x ) = Γ Φ j1 ( x1 ), Φ j 2 ( x 2 ),…, Φ jP ( x P )

(2.25)

where Γ(·) is any T-norm operator, for instance, the minimum, and Φ(·) has a bell-like shape (see Figure 2.7). Multilayer Perceptron Similar to (2.5), but multilayer perceptron consists of the more general case of several layers, with the input to each nonlinear block given as a linear combination of the multidimensional input vector [82].

2.3

Aggregation, Scaling, and Transformation Circuits

The mathematical techniques presented in Section 2.2 require several nonlinear operators and the linear operators of scaling and aggregation (covered for completeness in this section). This section also covers

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2-11

Synthesis and Design of Nonlinear Circuits

ii

iy

+ vi −

+ vi −

Y

Z ix

ix

X

FIGURE 2.11 First-order models for voltage op amps and CCIIs using nullators and norators.

+

−

+

+

−

+

∑

+

−

=

+

= −

+ −

−

>

@

= −

−

+

++11

?

=

+

+

−

−

A

−

+

− = β −

FIGURE 2.12 Voltage-to-current transformation: (a) using an OTA; (b) using voltage feedback; (c) using a current conveyor; (d) using virtual ground of an op amp; (e) same as d, but with active resistors.

transformation circuits. This is because in many practical situations we aim to exploit some nonlinear mechanism which intrinsically involves a particular kind of characteristics. For instance, a MOS transistor has inherent square-law transconductance, while a diode exhibits an exponential driving-point. Similarly, many nonlinear operators are naturally realized in current-mode domain and involve currents at both the input and the output. Thus, transformation circuits are needed to exploit these mechanisms for other types of characteristics.

Transformation Circuits Two basic problems encountered in the design of transformation circuits are how to convert a voltage node into a current node and vice versa. We know no unique way to realize these functions. Instead, there are many alternatives which depend on which active component from Appendix A is used. The OTA can be represented to a first-order model as a voltage-controlled current source (VCCS) with linear transconductance parameter gm. Regarding the op amp and CCII, it is convenient to represent them by the first-order models of Figure 2.11, which contain nullators and norators.1 A common appealing feature of both models is the virtual ground created by the input nullator. It enables us to sense the current drawn by nodes with fixed voltage — fully exploitable to design transformation circuits. Voltage-to-Current Transformation A straightforward technique for voltage-to-current conversion exploits the operation of the OTA as a VCCS [see Figure 2.12(a)] to obtain i0 = gm vi , where gm is the OTA transconductance parameter [22]. A 1

A nullator simultaneously yields a short circuit and an open circuit, while the voltage and the current at a norator are determined by the external circuitry. The use of a nullator to model the input port of an op amp is valid only if the component is embedded in a negative feedback configuration. With regard to the CCII, the required feedback is created by the internal circuitry.

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2-12

Nonlinear and Distributed Circuits

drawback is that its operation is linear only over a limited range of the input voltage. Also, the scaling factor is inaccurate and strongly dependent on temperature and technology. Consequently, voltage-tocurrent conversion using this approach requires circuit strategies to increase the OTA linear operation range [17, 70], and tuning circuits to render the scaling parameter accurate and stable [70]. As counterparts, the value of the scaling factor is continuously adjustable through a bias voltage or current. Also, because the OTA operates in open loop, its operation speed is not restricted by feedback-induced pole displacements. The use of feedback attenuates the linearity problem of Figure 2.12(a) by making the conversion rely on the constitutive equation of a passive resistor. Figure 2.12(b) illustrates a concept commonly found in op-amp-based voltage-mode circuits [29, 59]. The idea is to make the voltage at node ① of the resistor change linearly with vo , v1 = vo + avi , and thus render the output current independent of vo , to obtain io = G(vo + avi – vo) = aGvi . The summing node in Figure 2.12 (b) is customarily realized using op amps and resistors, which is very costly in the more general case in which the summing inputs have high impedance. The circuits of Figure 2.12(c) and (d) reduce this cost by direct exploitation of the virtual ground at the input of current conveyors [Figure 2.12(c)] and op amps [Figure 2.12 (d)]. For both circuits, the virtual ground forces the input voltage vi across the resistor. The resulting current is then sensed at the virtual ground node and routed to the output node of the conveyor, or made to circulate through the feedback circuitry of the op amp, to obtain io = Gvi . Those implementations of Figure 2.12(b), (c), and (d) that use off-the-shelf passive resistors overcome the accuracy problems of Figure 2.12(a). However, the values of monolithic components are poorly controlled. Also, resistors may be problematic for standard VLSI technologies, where high-resistivity layers are not available and consequently, passive resistors occupy a large area. A common IC-oriented alternative uses the ohmic region of the MOS transistor to realize an active resistor [69] [Figure 2.12(e)]. Tuning and linearity problems are similar to those for the OTA. Circuit strategies to overcome the latter are ground in [13, 32, 66, 69]. Current-to-Voltage Transformation The most straightforward strategy consists of a single resistor to draw the input current. It may be passive [Figure 2.13(a)] or active [Figure 2.13(b)]. Its drawback is that the node impedance coincides with the resistor value, and thus makes difficult impedance matching to driving and loading stages. These matching problems are overcome by Figure 2.13(c), which obtains low impedances at both the input and the output ports. On the other hand, Figure 2.13(d) obtains low impedance at only the input terminal, but maintains the output impedance equal to the resistor value. All circuits in Figure 2.13 obtain vo = Rii , where R = g –1 m for the OTA. Voltage/Charge Domain Transformations for Sampled-Data Circuits The linearity and tuning problems of previous IC-related transformation approaches are overcome through the use of dynamic circuit design techniques based on switched-capacitors [72]. The price is that the operation is no longer asynchronous: relationships among variables are only valid for a discrete set of time instants. Variables involved are voltage and charge, instead of current, and the circuits use capacitors, switches, and op amps.

ii

R

(a)

+ vo −

ii + vo − (b)

ii − +

−

gm

+ (c)

R −1

+ vo −

Y CCII Z X ii

R

+ vo −

(d)

FIGURE 2.13 Current-to-voltage transformation: (a) using a resistor; (b) using a feedback OTA; (c) using op amps; (d) using current conveyors.

Copyright © 2006 Taylor & Francis Group, LLC

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Synthesis and Design of Nonlinear Circuits

ϕe

vi−

C

∆q

ϕe

∆q

vi+

ϕo

C

ϕe

−

ϕo

+

(a)

n

ϕo

vo

n+1

(b)

FIGURE 2.14 Transformations for sampled-data circuits: (a) V-to-q; (b) q-to-V.

a12/a11 − 1/a11

x

+

∑

x′ a22

f(⋅) y′

+

∑

y +

a21 A=

cos θ − sin θ sin θ cos θ

A=

cos 2θ sin 2θ sin 2θ cos 2θ

FIGURE 2.15 Concept of linear transformation converter for transfer characteristics: general architecture, and transformation matrices for rotation (left) and reflection (right).

Figure 2.14(a) is for voltage-to-charge transformation, while Figure 2.14(b) is for charge-to-voltage transformation. The switches in Figure 2.14(a) are controlled by nonoverlapping clock signals, so that the structure delivers the following incremental charge to the op amp virtual ground node:

(

)

∆q e = C v i + − v i – = − ∆ q o

(2.26)

where the superscript denotes the clock phase during which the charge is delivered. Complementarily, the structure of Figure 2.14(b) initializes the capacitor during the even clock phase, and senses the incremental charge that circulates through the virtual ground of the op amp during the odd clock phase. Thus, it obtains

( )

v 0o = C ∆q o

(2.27)

References [45, 46] and [68] contain alternative circuits for the realization of the scaling function. Such circuits have superior performance in the presence of parasitics of actual monolithic op amps and capacitors. Transformation among Transfer Characteristics Figure 2.15 depicts the general architecture needed to convert one kind of transfer characteristics, e.g., voltage transfer, into another, e.g., current transfer. Variables x′ and y ′ of the original characteristics can be either voltage or current, and the same occurs for x and y of the converted characteristic. The figure depicts the more general case, which also involves a linear transformation of the characteristics themselves: x x ′ a11 = A = y y ′ a21

Copyright © 2006 Taylor & Francis Group, LLC

a12 x ′ a22 y ′

(2.28)

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Nonlinear and Distributed Circuits

io

Y CCII Z X

+ vi

+

R′

+

−

(b)

−

−

vi (a)

f (ii)

R′ ii

+

ii = f (vi)

−

io

ii = f (vi)

vo = −f (ii)

− +

vo = f (ii)

(c)

FIGURE 2.16 From driving-point to transfer characteristics: (a) and (b) transconductance from voltage-controlled driving-point; (c) transimpedance from current-controlled driving-point.

For example, the figure encloses the matrices to rotate the characteristics by an angle θ, and to reflect the characteristics with respect to an edge with angle θ. This concept of linear transformation converters and its applications in the synthesis of nonlinear networks was proposed initially by Chua [5] for drivingpoint characteristics, and further extended by different authors [24, 29]. In the simplest case, in which the nondiagonal entries in (2.28) are zero, the transformation performed over the characteristics is scaling, and the circuits of Figures 2.12 and 2.13 can be used directly to convert x into x′ at the input front end, and y ′ at the output front end. Otherwise, aggregation operation is also required, which can be realized using the circuits described elsewhere. From Driving-Point to Transfer and Vice Versa Figure 2.16 illustrates circuits to transform driving-point characteristics into related transfer characteristics. Figure 2.16(a) and (b) use the same principle as Figure 2.12(c) and (d) to transform a voltagecontrolled driving-point characteristic, ii = f (vi ), into a transconductance characteristics. On the other hand Figure 2.16(c) operates similarly to Figure 2.13(c) to transform a current-controlled driving-point characteristic, vi = f (ii ), into a transimpedance characteristic. If the resistance characteristics of the resistor in Figure 2.16(a) and (b), or the conductance characteristic of the resistor in Figure 2.16(c), is invertible, these circuits serve to invert nonlinear functions [63]. For instance, using a common base BJT in Figure 2.16(c) obtains a logarithmic function from the BJT exponential transconductance. Also, the use of a MOST operating in the ohmic region serves to realize a division operation. Lastly, let us consider how to obtain driving-point characteristics from related transfer characteristics. Figure 2.17(a) and (b) correspond to the common situation found in op amp-based circuits, where the transfer is between voltages. Figure 2.17(a) is for the voltage-controlled case and Figure 2.17(b) is for the current-controlled case. They use feedback strategies similar to Figure 2.17(b) to render either the input ii

R ∑

+

ii

+

−a

+

vi

−1

vi

1

−

R

+

+

− f (.)

(a)

+ ∑

1

(b)

ii = aR−1f (vi)

vi = af (Rii)

∑ +

ii

+ −

vi

+

f (.)

Rii

ii

− (d)

FIGURE 2.17 From transfer to driving-point characteristics.

Copyright © 2006 Taylor & Francis Group, LLC

Y CCII Z X

+

vi

(c)

f (.)

ii io

vi −

vo

a

−1

ii ii

+

f (.)

7276_C002.fm Page 15 Tuesday, August 2, 2005 7:11 AM

2-15

Synthesis and Design of Nonlinear Circuits

voltage or the input current independent of the linear contributions of the other port variable. A general theory for this kind of transformation converter can be found in [29]. Note that these figures rely on a Thévenin representation. Similar concepts based on Norton representations allow us to transform current transfer characteristics into driving-point characteristics. However, careful design is needed to preserve the input current while sensing it. Other interesting transformation circuits are depicted in Figure 2.17(c) and (d). The block in Figure 2.17(c) is a transconductor that obtains io = –f (vi ) with very large input impedance. Then, application of feedback around it obtains a voltage-controlled resistor, io = f (vi ). Figure 2.17(d) obtains a current-controlled resistor, vi = f (ii ), using a current conveyor to sense the input current and feedback the output voltage of a transimpedance device with vo = f (ii ).

Scaling and Aggregation Circuitry Scaling Operation Whenever the weights are larger than unity, or are negatives, the operation of scaling requires active devices. Also, because any active device acts basically as a transconductor, the scaling of voltages is performed usually through the transformation of the input voltage into an intermediate current and the subsequent transformation of this current into the output voltage. Figure 2.18 illustrates this for an op-amp-based amplifier and an OTA-based amplifier. The input voltage is first scaled and transformed in io , and then this current is scaled again and transformed into the output voltage. Thus, the scaling factor depends on two design parameters. Extra control is achieved by also scaling the intermediate current. Let us now consider how to scale currents. The most convenient strategy uses a current mirror, whose simplest structure consists of two matched transistors connected as shown in Figure 2.19(a) [25]. Its operating principle relies on functional cancellation of the transistor nonlinearities to yield a linear relationship i p io = p2 f (v i ) = p2 f f −1 i = 2 ii p1 p1

(2.29)

R2 R1 vi io

vi − +

+g −

vo vo = −

(a)

R2 v R1 i

vo

− gm1 +

m2

io

gm2 vo = g vi m1

(b)

FIGURE 2.18 Mechanisms for voltage scaling. ii

p1 (a)

io

+ M1 vi −

M2

p2

io

ii io ∼

ii

p2 i p1 i

p1

io1

io2

+

−

+

−

+

−

(b)

FIGURE 2.19 Current scaling using current mirrors.

Copyright © 2006 Taylor & Francis Group, LLC

Q1

+ vi −

p2 Q2

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Nonlinear and Distributed Circuits

i1 v1

v-i conversion

v2

v-i conversion

i2

io1 io2

X CCII Z ip

vp

Y

p

io1 = ∑ ik (vk) k=1

v-i conversion

FIGURE 2.20 Aggregation of voltages through intermediate currents and current conveyor.

where p1 and p2 are parameters with value that can be designer controlled; for instance, β of the MOST or Is of the BJT (see Appendix A and [44]). The input and output currents in Figure 2.19(a) must be positive. Driving the input and output nodes with bias currents IB and (p2 /p1 )IB , respectively, one obtains ii = ii′ + IB and io = Io′ + (p2 /p1 )IB, and this enables bilateral operation on ii′ and io′. In practical circuits, this simple design concept must be combined with circuit strategies to reduce errors due to nonnegligible input current of BJTs, DC voltage mismatch between input and output terminals, finite input resistance, and finite output resistance. Examples of these strategies can be found in [25, 56, 77]. On the other hand, sizing and layout strategies for other problems related to random mismatches between input and output devices are found in [41] and [48], which are applicable to most matching problems in MOS IC design. The current mirror concept is extensible to any pair of matched transconductors, provided their transconductance characteristics are invertible and parameterized by a designer-controlled scale factor p, and that the dependence of the output current with the output voltage is negligible. In particular, the use of differential transconductors enables us to obtain bilateral operation simply, requiring no currentshifted biasing at the input and output nodes. It also simplifies achieving noninverting amplification (that is, positive scale factors), as Figure 2.19(b) illustrates. This figure also serves to illustrate the extension of the mirror concept to multiple current outputs. Note that except for loading considerations, no other limitations exist on the number of output transconductors that can share the input voltage. Also, because fan-out of a current source is strictly one, this replication capability is needed to enable several nodes to be excited by a common current. On the other hand, the fact that the different current output replicas can be scaled independently provides additional adjusting capability for circuit design. Signal Aggregation As for the scaling operation, aggregation circuitry operates in current domain, based on Kirchhoff ’s current law (KCL). Thus, the aggregation of voltages requires that first they be transformed into currents (equivalently, charge packets in the switched-capacitor circuitry) and then added through KCL, while currents and incremental charges are added by routing all the components to a common node. If the number of components is large, the output impedance of the driving nodes is not large enough, and/or the input importance of the load is not small enough, this operation will encompass significant loading errors due to variations of the voltage at the summing node. This is overcome by clamping the voltage of this node using a virtual ground, which in practical circuits is realized by using either the input port of an op amp, or terminals X and Y of a current conveyor. Figure 2.20 illustrates the current conveyor case.

2.4

Piecewise-Linear Circuitry

Consider the elementary PWL function that arise in connection with the different methods of representation covered in Section 2.2: • Two-piece concave and convex characteristics [see (2.12)] • Hermite linear basis function (see Figure 2.4 and Appendix B) • Absolute value [see (2.13)]

Copyright © 2006 Taylor & Francis Group, LLC

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Synthesis and Design of Nonlinear Circuits

where rectification is the only nonlinear operator involved. The circuit primitives in Appendix A exhibit several mechanisms which are exploitable in order to realize rectification: • Cut-off of diodes and transistors — specifically, current through a diode negligible for negative voltage, output current of BJTs, and MOSTs negligible under proper biasing • Very large resistance and zero offset voltage of an analog switch for negative biasing of the control terminal • Digital encoding of the sign of a differential voltage signal using a comparator Similar to scaling and aggregation operations, rectification is performed in current domain, using the mechanisms listed previously to make the current through a branch negligible under certain conditions. Three techniques are presented, which use current transfer in a transistor-based circuit, current-to-voltage transfer using diodes and op amp, and charge transfer using switches and comparators, respectively.

Current Transfer Piecewise-Linear Circuitry Figure 2.21(a) and (b) presents the simplest technique to rectify the current transferred from node ① to node ➁. They exploit the feature of diodes and diode-connected transistors to support only positive currents. Figure 2.21(a) operates by precluding negative currents to circulate from node ① to node ➁, while Figure 2.21(b) also involves the nonlinear transconductance of the output transistor Mo ; negative currents driving the node ① force vi to become smaller than the cut-in voltage and, consequently, the output current becomes negligible. A drawback to both circuits is that they do not provide a path for negative input currents, which accumulates spurious charge at the input node and forces the driving stage to operate outside its linear operating regime. Solutions to these problems can be found in [57] and [61]. Also, Figure 2.21(a) produces a voltage displacement equal to the cut-in voltage of the rectifying device, which may be problematic for applications in which the voltage at node ① bears information. A common strategy to reduce the voltage displacements uses feedback to create superdiodes (shown in Figure 2.21(c) for the grounded case and Figure 2.21(d) for the floating case), and where the reduction of the voltage displacement is proportional to the DC gain of the amplifier. Figure 2.22(a), called a current switch, provides paths for positive and negative currents entering node ①, and obtains both kinds of elementary PWL characteristics exploiting cut-off of either BJTs or MOSTs. It consists of two complementary devices: npn (top) and pnp BJTs, or n-channel (top) and p-channel MOSTs. Its operation is very simple: any positive input current increases the input voltage, turning the bottom device ON. Because both devices share the input voltage, the top device becomes OFF. Similarly, the input voltage decreases for negative input currents, so that the top device becomes

1

ii

Source

ii

io

1

2

(a)

Load

M

2

io

M

+ −

vi i

(b) D

+

ii

(c)

+ vi

−

− +

−

ii

(d)

+

vi

−

FIGURE 2.21 (a) and (b) circuit techniques for current rectification; (c) and (d) superdiodes.

Copyright © 2006 Taylor & Francis Group, LLC

o

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2-18

Nonlinear and Distributed Circuits

in

in

0.0

in ii ii

ii

+

1

E

Vi

− A +

−

1

+

ip

ii A

Vi

Vi

−

+

ii

−

ip

ip

0.0

(a)

−

0.0 ii

↑

Vi E

(b)

io3

1

1

P

1

b IB

ii

ii io4

δ

io

1

1

P

P

1

P

a

1

1

io2

(c)

(d)

FIGURE 2.22 Current switch and its application for different basic PWL curves.

ON and the bottom OFF. In sum, positive input currents are drawn to the bottom device, while negative currents are drawn to the top device. An inconvenience of Figure 2.22(a) is the dead zone exhibited by its input driving-point characteristics, which is very wide for MOSTs. It may produce errors due to nonlinear loading of the circuitry that drives the input node. Figure 2.22(b) overcomes this by using a circuit strategy similar to that of the superdiodes. The virtual ground at the op amp input renders the dead-zone centered around the voltage level E, and its amplitude is reduced by a factor proportional to the amplifier DC gain. Some considerations related to the realization of this amplifier are found in [58]. Proper routing and scaling of the currents ip and in in Figure 2.22(a) gives us the concave and convex basic characteristics with full control of the knot and position and the slope in the conducting region. Figure 2.22(c) is the associated circuit, in which the input bias current controls the knot position, and the slope in the conducting region is given by the gain of the current mirrors. Note that this circuit also obtains the absolute value characteristics, while Figure 2.22(d) obtains the Hermite linear basis function. The way to obtain the PWL fuzzy membership function from this latter circuit is straightforward, and can be found in [58].

Transresistance Piecewise-Linear Circuitry The circuit strategies involved in PWL current transfer can be combined in different ways with the transformation circuits discussed previously to obtain transconductance and voltage-transfer PWL circuits. In many cases, design ingenuity enables optimum merging of the components and consequently, simpler circuits. Figure 2.23(a) depicts what constitutes the most extended strategy to realize the elementary PWL functions using off-the-shelf components [63, 80]. The input current is split by the feedback circuitry around the op amp to make negative currents circulate across Dn and positive currents circulate

Copyright © 2006 Taylor & Francis Group, LLC

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2-19

Synthesis and Design of Nonlinear Circuits

ii

Rp

Dp

Rn

Dn

R p ii

0.0

R

vop

0.0

−

+

R′ R′

R″

vo

R′

R′″

− +

R′

vo

−

R′

+

(c)

+

R′

(b)

Rn Rp

−

−

R n ii

ii

R′

R ii

von

− + (a)

R′

+

FIGURE 2.23 PWL transimpedance circuits.

across Dp . Consequently, this feedback renders the input node of the op amp a virtual ground and thus reduces errors due to finite diode cut-in voltage in the transresistance characteristics. Similar to Figure 2.22, the position of the knot in these elementary characteristics is directly controlled by an input bias current. Also note that the virtual ground can be exploited to achieve voltage-to-current transformation using the strategy of Figure 2.12(d) and thus, voltage-transfer operation. Algebraic combination of the elementary curves provided by Figure 2.23(a) requires transforming the voltages von and vop into currents and then aggregating these currents by KCL. For example, Figure 2.23(b) is the circuit for the absolute value and Figure 2.23(c) presents a possible implementation of the Hermite basis function. Other related contributions found in the literature focus on the systematic realization of PWL drivingpoint resistors, and can be found in [7] and [10].

Piecewise-Linear Shaping of Voltage-to-Charge Transfer Characteristics The realization of PWL relationships among sampled-data signals is based on nonlinear voltage-to-charge transfer and uses analog switches and comparators. Figure 2.24(a) is a circuit structure, where one of the capacitor terminals is connected to virtual ground and the other to a switching block. Assume that nodes ① and ➁ are both grounded. Note that for (v – δ) > 0 the switch arrangement set node ➃ to δ, while node ➄ is set to v. For (v – δ) < 0, nodes ➃ and ➄ are both grounded. Consequently, voltage at node ➂ in this latter situation does not change from one clock phase to the next, and consequently, the incremental

ϕe 1 δ

−

v

+

4

ϕe

∆q 3

2 (a)

5

ϕo

ϕo C − (b)

FIGURE 2.24 Circuits for rectification in voltage-to-charge domain.

Copyright © 2006 Taylor & Francis Group, LLC

C

δ

+ v

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Nonlinear and Distributed Circuits

R2 + ∑ e −

x

A

z

R1 x i1

y

(a)

z = α(x/y)

(b)

− +

io

y

i2

x z

z = −α(x/y) (R2/R1)

(c)

i1 + gm1 − y

io

z

z = α(x/y)gm1

FIGURE 2.25 Division operator using a feedback multiplier: (a) concept; (b) with voltage multiplier and op amp; (c) with transconductance multiplier and OTA.

charge becomes null for (v – δ) < 0. On the other hand, for (v – δ) > 0, the voltage at node ➂ changes from one clock phase to the next, and generates an incremental charge ∆q e = C (v − δ) = − ∆q o

(2.30)

which enables us to obtain negative and positive slopes using the same circuit, as shown in Figure 2.24(a). To make the characteristics null for (v – δ) > 0, it suffices to interchange the comparator inputs. Also, the technique is easily extended to the absolute value operation by connecting terminal ① to v, and terminal ➁ to δ. The realization of the Hermite linear basis function is straightforward and can be found in [55]. Other approaches to the realization of PWL switched-capacitor circuitry use series rectification of the circulating charge through a comparator-controlled switch [Figure 2.24(b)], and can be found in [16] and [31]. The latter also discusses exploitation of these switched-capacitor circuits to realize continuous time driving-point characteristics, the associated transformation circuits, and the dynamic problematics.

2.5

Polynomials, Rational, and Piecewise-Polynomial Functions

These functions use rectification (required for truncation operation in the PWP case) and analog multiplication, z=

xy α

(2.31)

as basic nonlinear operators.2 Joining the two inputs of the multiplier realizes the square function. Analog division is realized by applying feedback around a multiplier, illustrated at the conceptual level in Figure 2.25(a); the multiplier obtains e = (zy)/α, and, for A → ∞, the feedback forces x = e. Thus, if y ≠ 0, the circuit obtains z = α(x/y). Joining y and z terminals, the circuit realizes the square root, z = (αx)1/2. This concept of division is applicable regardless of the physical nature of the variables involved. In the special case in which e and x are current and z is a voltage, the division can be accomplished using KCL to yield x = e. Figure 2.25(b) shows a circuit for the case in which the multiplication is in voltage domain, and Figure 2.25(c) is for the case in which multiplication is performed in transconductance domain. The transconductance gain for input z in the latter case must be negative to guarantee stability.

Concepts and Techniques for Polynomic and Rational Functions Figure 2.26 illustrates conceptual hardware for several polynomials up to the fifth degree. Any larger degree is realized similarly. Figure 2.27 uses polynomials and analog division to realize rational functions

2Scale factor α in (2.31) must be chosen to guarantee linear operation in the full variation range of inputs and outputs.

Copyright © 2006 Taylor & Francis Group, LLC

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Synthesis and Design of Nonlinear Circuits

α2

α0 +

x

α2

+

x

∑ +

α4

+

g(x)

+ + ∑

∑ +

α0 + +

g(x)

α3

α1

α1

α3

x

α3

α0 + + ∑ + + g(x)

α2

α5

x

α4

α1

α1

+ ∑ + α2

α0 + + ∑ + + g(x) +

FIGURE 2.26 Conceptual hardware for polynomial functions.

x

Q

∑ αj x j

j=0

+

g(x)

∑

A −

R

∑ βj x j

j=0

FIGURE 2.27 Rational function generation through feedback division.

∑α x g (x ) = ∑β x

j

j

i =0,Q

j

(2.32)

j

j =0, R

For simplicity, we have assumed that the internal scaling factors of the multipliers in Figure 2.26 and Figure 2.27 equal one. An alternative technique to realize rational functions is based on linearly controlled resistors, described as v = (Lx)i, and linearly controlled conductors, i = (Cx)v, where L and C are real parameters. This technique exploits the similarity between these characteristics and those which describe inductors and capacitors in the frequency domain, to take advantage of the synthesis techniques for rational transfer function in the s-plane through interconnection of these linear components [28] [39] (Figure 2.28). As for the previous cases, realization of linearly controlled resistors and conductors require only multipliers and, depending upon the nature of the variables involved in the multipliers, voltage-to-current and current-to-voltage transformation circuits.

Multiplication Circuitry Two basic strategies realize multiplication circuitry: using signal processing and exploiting some nonlinear mechanism of the primitive components. Signal processing multipliers rely on the generation of a pulsed signal whose amplitude is determined by one of the multiplicands and its duty cycle by the other, so that the area is proportional to the result of the multiplication operation. Figure 2.29(a) presents an implementation concept based on averaging. This is performed by a low-pass filter where the input is a pulse train

Copyright © 2006 Taylor & Francis Group, LLC

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Nonlinear and Distributed Circuits

i

i + v

+

x

x

v −

− i = (Cx)v

H(x)

Interconnecting these components and controlled sources generates rational network functions in s.

H(s)

v = (Lx)i

I(s)

I(s)

+ V(s)

+ V(s) −

C

−

Interconnecting these components and controlled sources generates rational network functions in x.

I(s) = sC V(s)

L

V(s) = sL I(s)

FIGURE 2.28 Usage of linearly controlled resistors to synthesize rational network functions.

vc LP Filter

x vc

z 2T

T −

ref (t)

y

+

t

3T

ref (t) y (a)

T x

α

t

3T

S

z(t)

Sample & Hold

hz(t)

− (b)

2T

z(τ)

+ y

hy(t)

FIGURE 2.29 Signal processing multipliers: (a) by averaging; (b) by shaping in time domain.

with amplitude proportional to x and duty cycle proportional to y. The latter proportionality is achieved through nonlinear sampling by comparing y with a time reference sawtooth signal. Thus, the area under each pulse in the train is the product of x × y, extracted by the low-pass filter. This implementation concept is discussed in further detail in classical texts on analog computation [63], and applied more recently to analog VLSI signal processing [72]. Figure 2.29(b) is an alternative implementation concept based on signal shaping in the time domain. It uses two linear blocks with normalized unit step response given as hz (t) and hy (t). The first is driven by level x to obtain z (t ) = xhz (t ) 0 ≤ t < τ

(2.33)

where τ denotes the duration of the time interval during which the switch S remains closed. The other is driven by a references level α, to render τ given by y τ = hy−1 α

Copyright © 2006 Taylor & Francis Group, LLC

(2.34)

7276_C002.fm Page 23 Tuesday, August 2, 2005 7:11 AM

Synthesis and Design of Nonlinear Circuits

2-23

Assuming both linear blocks are identical and the time function invertible, one obtains the steady-state value of z, z(τ), as the product of levels x and y. The simplest implementation of Figure 2.29 uses integrators, i.e., h(t) = t, as linear blocks [see Figure 2.41(b)]. Also note that the principle can be extended to the generation of powers of an input signal by higher order shaping in time domain. In this case, both linear blocks are driven by reference levels. The block hy (t) consists of a single integrator, τ = y/α. The other consists of the cascade of P integrators, and obtains z(t) = βtp. Thus, z(t) = β(y/α)p. Realizations suitable for integrated circuits are found in [34] and [55].

Multipliers Based on Nonlinear Devices The primitives in Appendix A display several mechanisms that are exploitable to realize analog multipliers: • Exponential functionals associated to the large-signal transconductance of BJTS, and the possibility of obtaining logarithmic dependencies using feedback inversion • Square-law functionals associated to the large-signal transconductance of the MOS transistor operating in saturation region • Small-signal transconductance of a BJT in active region as a linear function of collector current • Small-signal transconductance of a MOST in saturation as a linear function of gate voltage • Small-signal self-conductance of a MOS transistor in ohmic region as a linear function of gate voltage These and related mechanisms have been explained in different ways and have resulted in a huge catalog of practical circuits. To quote all the related published material is beyond the scope of this section. The references listed at the end were selected because of their significance, and their cross-references contain a complete view of the state of the art. Also, many of the reported structures can be grouped according to the theory of translinear circuits, which provides a unified framework to realize nonlinear algebraic functions through circuits [23, 62, 79]. Log-Antilog Multipliers Based on the exponential large-signal transconductance of the BJT, and the following relationships, z ′ = ln( x ) + ln( y ) = ln( xy ) z = e z′ = e ln( xy ) = xy

(2.35)

which can be realized as illustrated in Figure 2.30(a) [65]. This circuit operates on positive terminal currents to obtain i0 = (i1 i2 )/i3 , which can be understood from translinear circuit principles by noting that the four base-to-emitter voltages define a translinear loop, 0 = v be1 + v be 2 − v be 3 − v be 4 i i i i = ln 1 + ln 2 − ln 3 − ln o Is Is Is Is

(2.36)

The circuit can be made to operate in four-quadrant mode, though restricted to currents larger than –IB , by driving each terminal with a bias current source of value IB . Also, because all input terminals are virtual ground the circuit can be made to operate on voltages by using the voltage-to-current transformation concept of Figure 2.12(d). Similarly, the output current can be transformed into a voltage by using an extra op amp and the current-to-voltage transformation concept of Figure 2.13(c). Extension

Copyright © 2006 Taylor & Francis Group, LLC

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Nonlinear and Distributed Circuits

i

i Q

+ −

Q

− +

i

i Q

− +

iα

Q

ix

− +

kR

− +

−kR

ix

iα

− +

− +

iy

< k

− + k <

−kR

iy

R

FIGURE 2.30 (a) Core block of a log-antilog multiplier; (b) circuits to elevate to a power.

of this circuit structure to generate arbitrary powers is discussed in [23]. Figure 2.30(b) [1] uses similar techniques, based on introducing scaling factors in the translinear loop, to obtain i y = i1α−kixk

(2.37)

Square-Law Multipliers These are based on the algebraic properties of the square function, most typically z=

[

]

2 2 1 x + y ) − ( x− y ) = xy ( 4

(2.38)

shown conceptually in Figure 2.31(a), and the possibility of obtaining the square of a signal using circuits, typically consisting of a few MOS transistors operating in saturation region. Figure 2.31(b) through (f) depict some squarer circuits reported in the literature. The completeness of square-law operators for the realization of nonlinear circuits was demonstrated from a more general point of view in [47], and their exploitation has evolved into systematic circuit design methodologies to perform both linear and nonlinear functions [3]. Transconductance Multipliers A direct, straightforward technique to realize the multiplication function exploits the possibility of controlling the transconductance of transistors through an electrical variable (current or voltage). Although this feature is exhibited also by unilateral amplifiers, most practical realizations use differential amplifiers to reduce offset problems and enhance linearity [25]. Figure 2.32 presents a generic schematic for a differential amplifier, consisting of two identical three-terminal active devices with common bias current. The expressions on the right display its associated transconductance characteristics for npn-BJTs and n-channel MOSTs, respectively [25]. These characteristics are approximated to a first-order model as izBJT ≈

Copyright © 2006 Taylor & Francis Group, LLC

iy 4U t

vx

izMOST ≈

( βi )v y

x

(2.39)

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Synthesis and Design of Nonlinear Circuits

+

∑

+ ∑ +

+ +

− ∑

=

=

=

β

− −

=

β

− −

=

β

− +

FIGURE 2.31 (a) Block diagram of the quarter-square multiplier; (b) current-mode squarer circuit in [3]; (c) current-mode squarer circuit in [79]; (d) voltage-mode squarer circuit in [36]; (e) voltage-mode squarer circuit in [60]; (f) voltage-mode squarer circuit in [49].

iz−

iz+ vx+

iz ≈ iy tanh

vx 2Ut

vx−

iz = iz+− iz−

iy

vx = vx+− vx−

iz ≈

√βiyvx √1 − v2xβ/ (4iy) iy sgn vx

|vx| ≤ √2iy/β |vx| ≥ √2iy/β

FIGURE 2.32 Differential amplifiers and their associated large-signal transconductances.

+

−

+

−

−

+

−

≈

tanh

2

tanh

2

FIGURE 2.33 Bipolar Gilbert cell.

which clearly displays the multiplication operation, although restricted to a rather small linearity range. Practical circuits based on this idea focus mainly on increasing this range of linearity, and follow different design strategies. Figure 2.33 gives an example, known as the Gilbert cell, or Gilbert multiplier [23].

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Nonlinear and Distributed Circuits

vy+

vz−

vy−

vy−

vx+

vx+

iz+

vx−

i′z+

iz+

vy+

vz+

−

vo

+ vx−

iz−

(a)

vx−

vx+

(b)

vy−

i′z−

iz−

vz− vz+

vy+

FIGURE 2.34 Four-quadrant multipliers based on MOS transistors in the ohmic region.

Corresponding realizations using MOS transistors are discussed in [2] and [53]. Sánchez-Sinencio et al. [61] present circuits to realize this multiplication function using OTA blocks. On the other hand, [17] presents a tutorial discussion of different linearization techniques for MOS differential amplifiers. Multiple Based in the Ohmic Region of MOS Transistors The ohmic region of JFETs has been used to realize amplifiers with controllable gain for automatic gain control [54]. It is based on controlling the equivalent resistance of the JFET transistor in its ohmic region through a bias voltage. More recently, MOS transistors operating in the ohmic region were used to realize linear [69, 70] and nonlinear [35] signal processing tasks in VLSI chips. There exist many ingenious circuits to eliminate second- and higher-order nonlinearities in the equivalent resistance characteristics. The circuit in Figure 2.34(a) achieves very good nonlinearity cancellation through cross-coupling and fully differential operation, obtaining

(

iz + − iz − = 2β v x + − v x −

) (v

y+

− vy −

)

(2.40)

and its use in multiplication circuits is discussed in [35] and [66]. A more general view is presented in Figure 2.34(b) [35], where the conductance as well as the resistance of the MOS ohmic region are used to obtain a versatile amplifier-divider building block. Enomoto and Yasumoto [18] report another interesting multiplier that combines the ohmic region of the MOS transistor and sampled-data circuits.

2.6

Sigmoids, Bells, and Collective Computation Circuits

Sigmoidal Characteristics As (2.5) illustrates, approximating a nonlinear function through a multilayer perceptron requires the realization of sigmoidal functions, with arguments given as linear combinations of several variables. The exact shape of the sigmodial is not critical for the approximation itself, although it may play an important role in fitting [82]. Figure 2.35 depicts two shapes used in practice. Figure 2.35(a), the hard limiter, has y

y

E+

0.0

(a)

slope = β

E+ δ

x

−E−

0.0

(b)

FIGURE 2.35 Typical sigmoidal shapes: (a) hard limiter; (b) soft limiter.

Copyright © 2006 Taylor & Francis Group, LLC

δ −E−

x

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Synthesis and Design of Nonlinear Circuits

ii

− +

δ

R ii

− +

vo

=

>

δ

vo

IB

IB

ii

IB

IB

+−

?

IB

io

ii

@

− +A

io

IB

FIGURE 2.36 Realization of sigmoidal characteristics with input current: (a) transimpedance soft limiter; (b) transimpedance hard limiter; (c) and (d) soft and hard limiters in current transfer domain.

an inner piece of large (ideally infinite) slope, while for Figure 2.35(b), the soft limiter, this slope is smaller and can be used as a fitting parameter. Most amplifiers have large-signal transfer characteristics whose shape is a sigmoid or an inverted sigmoid. We present only those circuits whose inputs are currents because this simplifies the circuitry needed to obtain these inputs as linear combinations of other variables. The op amp circuit of Figure 2.36(a) realizes the soft limiter characteristics in transimpedance form. The center is set by the input bias current and the slope through the resistor (β = R). If the branch composed of the two Zener diodes is eliminated, the saturation levels E+ and E– are determined through the internal op amp circuitry, inappropriate for accurate control. (Otherwise, they are determined through the Zener breakdown voltages.) On the other hand, Figure 2.36(b) also realizes the hard sigmoid in transimpedance domain [58]. The output saturation levels for this structure are E+ = VTn and E– = VTp , where VTn and VTp are the threshold voltages of the NMOS transistor and the PMOS transistor, respectively. To obtain the output represented by a current, one can use voltage-to-current transformation circuits. References [15, 57, 58] discuss simpler alternatives operating directly in current domain. For instance, Figure 2.36(c) and (d) depict circuits for the soft limiter characteristics and the hard limiter characteristics. With regard to the calculation of the input to the sigmoid as a linear combination of variables, note that the input node of all circuits in Figure 2.36 is virtual ground. Consequently, the input current can be obtained as a linear combination of voltages or currents using the techniques for signal scaling and aggregation presented in Section 2.3.

Bell-Like Shapes The exact shapes of (2.16) and (2.17) involve the interconnection of squarers, together with blocks to elevate to power, and exponential blocks — all realizable using techniques previously discussed in this chapter. However, these exact shapes are not required in many applications, and can be approximated using simpler circuits. Thus, let us consider the differential amplifier of Figure 2.32, and define vi = vx, IB = iy , and io = iz for convenience. The expressions for the large-signal transconductance displayed along with the figures show that they are sigmoids with saturation levels at IB and –IB. They are centered at vi = 0, with the slope at this center point given by (2.39). The center can be shifted by making vi = vx+ and δ = vx– .

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Nonlinear and Distributed Circuits

ΙB δ2

i2

i1

ΙB

0.0

0.0

δ1 kvi

kvi δ2

− +

vi

−ΙB

−ΙB

i2

i1

gm

gm io = i1 + i2

(a)

io+

io−

i1+

i1−

i2+

+

δ1

−

vi

i2−

δ1

δ2

vi

k IB

(b)

IB

FIGURE 2.37 Transconductance circuits for bell-shaped function: (a) using OTAs; (b) using differential amplifiers.

Similar to the differential amplifier, most OTAs exhibit sigmoid-like characteristics under large-signal operation, exploitable to realize nonlinear functions [19, 37, 56, 61, 71]. This may rely on the mathematical techniques behind multilayer perceptrons, or on those behind radial basis functions and fuzzy interpolation. Figure 2.37(a) obtains a bell-shaped transconductance through a linear, KCL combination of the two sigmoidal characteristics, one of negative slope and the other of positive slope. The width and center of the bell (see Figure 2.7) are given respectively by 2σ = δ 2 − δ1

δ=

δ 2 + δ1 2

(2.41)

controlled by the designer. The slope of the bell at the crossover points is also controlled through the transconductance of the OTAs. For simpler circuit realizations, this technique can be used directly with differential amplifiers, as shown in Figure 2.37(b). The differential output current provided by the circuit can be transformed into a unilateral one using a p-channel current mirror. Equation (2.41) also applies for this circuit, and the slope at the crossovers is slope MOST = k βI B

slopeBJT =

kI B 4U t

(2.42)

Note that the control of this slope through the bias current changes the height of the bell. It motivates the use of a voltage gain block in Figure 2.37. Thus, the slope can be changed through its gain parameter k. The slope can also be changed through β for the MOSTs. Practical realizations of this concept are found in [4], [71], and [74]. The voltage amplifier block can be realized using the techniques presented in this chapter. Simpler circuits based on MOS transistors are found in [53].

Collective Computation Circuitry Radial basis functions and fuzzy inference require multidimensional operators to calculate radial distances in the case of radial basis functions, and to normalize vectors and calculate T-norms in the case of fuzzy

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Synthesis and Design of Nonlinear Circuits

(1)

(4/P)

(2(P+1)/P)

iy

ix1

ix2

ixP

FIGURE 2.38 CMOS self-biased Euclidean distance circuit [38].

i

i

i

i

iP

iP

i

i

i

i

iP

iP

IB

IB

=

>

FIGURE 2.39 Current-mode normalization circuits: (a) BJT; (b) CMOS.

inference. These operators can be expressed as the interconnection of the nonlinear blocks discussed previously, or realized in a simpler manner through dedicated collective computation circuitry. Most of these circuits operate intrinsically in current domain and are worth mentioning because of this simplicity and relevance for parallel information processing systems. Euclidean Distance Figure 2.38 [38] presents a current-mode circuit to compute iy =

∑

k = 1. P

2 ixk

(2.43)

based on the square-law of MOS transistors in the saturation region. If the current ik at each terminal is shifted through a bias current of value δk, the circuit serves to compute the Euclidean distance between the vector of input currents and the vector . Normalization Operation Figure 2.39 depicts circuits to normalize an input current vector, for the BJT [23] and the CMOS [74] cases, respectively. Their operation is based on KCL and the current mirror principle. Kirchhoff ’s circuit law forces the sum of the output currents at node ① to be constant. On the other hand, the current mirror operation forces a functional dependency between each pair of input and output currents. Thus, they obtain ik ≈

ik

∑i

(2.44) j

j = 1, P

for each current component. T-Norm Operator The calculation of the minimum of an input vector x is functionally equivalent to obtaining the complement of the maximum of the complements of its components. Figure 2.40(a) illustrates a classical

Copyright © 2006 Taylor & Francis Group, LLC

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Nonlinear and Distributed Circuits

+

N1

+

N2

− ∑ ∑

)

K−1

)

K−1

−

∑

O

+

+

EN1 1*

− + ∑

N2

)

K−1

EN2 1*

M12

8HAB

M22 L/

M11

+ −

(a)

+

EN2 1*

+

EO 1*

M 22

M21

M 21

1,

(b)

FIGURE 2.40 Concept for maximum operator and current-mode realization.

approach used in analog computation to calculate the maximum of an input vector x. It is based on the following steady-state equation: −y+

∑ u ( A(x −1

k

)

− y) = 0

k = 1, P

(2.45)

where A is large. This concept can be realized in practice using OTAs, op amps, or diodes. Both of these have voltage input and output. Alternatively, Figure 2.40(b) shows a CMOS current-mode realization [74]. In this circuit the maximum current determines the value of the common gate voltage, vG . The only input transistor operating in the saturation region is that which is driven by maximum input current; the rest operate in the ohmic region.

2.7

Extension to Dynamic Systems

A dynamic system with state vector x and dynamics represented as Tk

dx k = fk ( X ), 1 ≤ k ≤ P dt

(2.46)

can be mapped on the block diagram of Figure 2.41(a), and realized by the interconnection of non-linear resistive blocks and integrators. This approach is similar to that followed in classical analog computation [26] C R

− +

vi f1(.)

∫

io vi

fP(.) x1 x2

−

∫

gm

vo io

C

τ = C/gm

≈

≈ ≈

f2(.)

+

τ = RC vo

+

∫

xP

(a)

vi (b)

−

Y CCII Z X G = R−1

io vo C

τ = RC

FIGURE 2.41 Conceptual state-variable block diagram of dynamic systems integrator circuits.

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Synthesis and Design of Nonlinear Circuits

and has integrators as key components. Figure 2.41(b) illustrates several integrator circuits. Combining these circuits with the circuitry for nonlinear functions provides systematic approaches to synthesize nonlinear dynamic systems based on the approximations presented in this chapter [56]. On the other hand, Rodríguez-Vázquez and Delgado-Restituto [57] discuss related techniques to synthesize nonlinear systems described by finite-difference equations.

2.8

Appendix A: Catalog of Primitives

Figure 2.42 outlines our catalog of primitive components, all of which are available off-the-shelf, and, depending on the fabrication technology, can be realized on a common semiconductor substrate [44]. Generally, the catalog differs between individual technologies; for instance, no npn BJTs are available in a CMOS n-well technology. The use of linear capacitors may appear surprising because we constrain ourselves to cover only static characteristics. However, we will not exploit their dynamic i–v relationship, but instead their constitutive equation in the charge-voltage plane, which is algebraic.

+

+

=

+ = (/ − 1)

=

β"

+

= ( / − / )

(

=

−

−

−

/ − 1) +

β

(

/ − 1)

=0

= 1

=0

= 0

−

=0

| | < | |

= β( − − 2 )

β

=

(

| | > | |

| | < | | − | |

− )2

| | > | |

| | > | | − | |

= + γ (√2|φ!| + − √2|φ!|)

−

− −

−

+

+

+

−

=0

− +

= = (+ − − )

+

+

0 0 0 = 1 0 0 0 ±1 0

−

+

FIGURE 2.42 Section catalog of primitive circuit components.

Copyright © 2006 Taylor & Francis Group, LLC

− +

+

= −

=

−

+

++11

−

+

=

≠ (o)

1

=0

>0

0 is a constant, with the nonlinear resistor N satisfying

( (

) )

m V − e 0 C1 N VC1 − e = m1 VC − e − (m1 − m0 ) sgn VC − e 1 1

(

)

(

VC1 − e < 1

)

VC1 − e ≥ 1

In general, systems that are described by (linear or nonlinear) partial differential equations, with initialboundary value conditions, are studied under a unified frame work of (linear or nonlinear) operator semigroup theory, and are considered to have an infinite-dimensional system representation [7].

Input-Output Representation A state-variable representation of a nonlinear physical system generally can be written as

(

x⋅ (t ) = f x (t ), u(t ), t x (0) = x 0

)

t≥0 (3.14)

where f(·, ·, t) is a nonlinear, vector-valued function, x0 is a (given) initial value for the state vector x at t = 0, and u is a control input to the system. Because not all state variables in the state vector x can be measured (observed) in a physical system, let us suppose that what can be measured is only part of x, or a mixture of its components, expressed by a vector-valued function of x in the form

(

y (t ) = g x (t ), t

Copyright © 2006 Taylor & Francis Group, LLC

)

t ≥0

(3.15)

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3-7

Representation, Approximation, and Identification

u

. x

f(⋅, ⋅, t)

x

∫

y

g(⋅, t)

FIGURE 3.3 System I-O relationship.

where y is called a (measurement or observation) output of the physical system, and g is in general a lower dimensional vector-valued nonlinear function. As a particular case, g can be linear or, even more so, be g(x(t), t) = x(t) when all the components of the state vector are directly measurable. If both f = f(x(t), u(t)) and g = g(x(t)) are not explicit functions of the independent time variable t, the corresponding state-variable representation (3.14) and (3.15) is said to be autonomous. It is clear that with both the system input u and output y, one can simply represent the overall physical system by its input-output (I-O) relationship, as illustrated in Figure 3.3. Now, under certain mild conditions on the nonlinear function f, for a given control input u, and an initial value x0, the state-variable representation (3.14) has a unique solution, x, which depends on both u and x0. If we denote the solution as

(

x (t ) = t ; u(t ), x 0

)

(3.16)

where is called an input-state mapping, then the overall I-O relationship shown in Figure 3.3 can be formulated as

( (

) )

y (t ) = g t ; u(t ), x 0 , t

(3.17)

This is an I-O representation of the physical system having the state-variable representation (3.14) and (3.15). As a simple example, let us consider the linear state-space representation (3.5), with a special linear measurement equation of the form y(t) = Cx(t), where C is a constant matrix. It is well known [31] that

(

)

y (t ) = C t ; u(t ), x 0 = C e tA x 0 +

t

∫e 0

(t − τ ) A Bu τ dτ

()

t ≥0

(3.18)

yielding an explicit representation formula for the I-O relationship of the linear circuit (together with the assumed measurement equation). Note that because the state-variable representation (3.14) is not unique, as mentioned previously, this I-O representation is not unique in general. However, we note that if two state-variable representations are equivalent, then their corresponding I-O relationships also will be equivalent. It is also important to note that although the above I-O relationship is formulated for a finitedimensional open-loop system, it can also be applied to infinite-dimensional [7] and closed-loop systems [39]. In particular, similar to linear systems, many finite-dimensional, closed-loop nonlinear systems possess an elegant coprime factorization representation. The (left or right) coprime factorization representation of a nonlinear feedback system is a general I-O relationship that can be used as a fundamental framework, particularly suitable for studies of stabilization, tracking, and disturbance rejection. The problem is briefly described as follows. Let a nonlinear system (mapping) P be given, not necessarily stable, and assume that it has a right-coprime factorization P = ND–1, where both N and D are stable (D–1 usually has the same stability as P). One is looking for two stable, nonlinear subsystems (mappings), A and B–1, representing feedback and feed-forward controllers, respectively, satisfying the Bezout identity AN + BD = I

Copyright © 2006 Taylor & Francis Group, LLC

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3-8

Nonlinear and Distributed Circuits

+

B−1

−

P

A

FIGURE 3.4 Right-coprime factorization of a nonlinear feedback system.

which are connected as shown in Figure 3.4, where B is also stable. If two controllers, A and B, can be found to satisfy such conditions, then even with an unstable P, the resulting closed-loop control system will be I-O, as well as internally, stable. In this sense, A and B together stabilize P. For the left-coprime factorization, one simply uses formulas P = D–1N and NA + DB = I instead and interchanges the two blocks of A and B–1 in Figure 3.4. Taking into account causality and well-posedness of the overall closed-loop system, it is a technical issue as to how to construct the four subsystems A, B, D, and N, such that the preceding requirements can be satisfied. Some characterization results and construction methods are available in the literature [38, 45, 51, 95].

Volterra Series Representation Recall from the fundamental theory of ordinary differential equations that an explicit I-O representation of the overall system still can be found, even if the linear state-space representation (3.5) is time varying, via the state transition matrix Φ(t, τ) determined by d (t , τ) = A(t )(t , τ) dt (τ, τ) = I

t≥τ

(3.19)

where I is the identity matrix. The formula, for the simple case y(t) = C(t) x (t), is y (t ) = C (t ) (t , 0)x 0 +

∫ (t , τ)B(τ)u(τ)dτ t

0

t ≥0

(3.20)

For linear time-invariant systems, we actually have Φ(t, τ) = e(t – τ) A, so that (3.20) reduces to the explicit formula (3.18). For a nonlinear system, a simple explicit I-O representation with a single integral of the form (3.18) or (3.20) is generally impossible. A natural generalization of such an integral formulation is the Volterra series representation. For simplicity, let us consider the one-dimensional case in which y(t) = g(x(t), t) = x(t) below. A Volterra series representation for a nonlinear I-O relationship (·), convergent in some measure, is an infinite sum of integrals in the following form:

(

)

t , u(t ) = φ0 (t ; x 0 ) + +

t

τ2

0

0

∫ ∫

∫ φ (t , τ )u(τ )dτ + t

0

1

1

1

1

φn (t , τ1 ,…, τ n )u(τ1 ) u(τ n )dτ1

(3.21) dτ n +

where {φn}∞n=0 are called the Volterra kernels of the series. Here, we note that this Volterra series representation can be extended easily to higher-dimensional systems. For some representations , the corresponding Volterra series may have only finitely many nonzero terms in the above infinite sum. In this case, it is called a Volterra polynomial, which does not have convergence problem for bounded inputs, provided that all the integrals exist. In particular, when is

Copyright © 2006 Taylor & Francis Group, LLC

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3-9

Representation, Approximation, and Identification

affine (or linear, if initial conditions are zero, so that φ0 = 0), its Volterra series has at most two nonzero terms, as given by (3.18) and (3.20), and is called a first-order Volterra polynomial. In general, however, the Volterra series (3.21) is an infinite sum. Hence, the convergence of a Volterra series is a crucial issue in formulating such a representation for a given nonlinear I-O relationship [5, 12, 59, 85]. In order to state a fundamental result about the convergence of a Volterra series, we must first recall that a mapping that takes a function to a (real or complex) value is called a functional and a mapping that takes a function to another function is called an operator. A functional may be considered to be a special operator if one views a value as a constant function in the image of the mapping. Clearly, the I-O relationship (3.17) and the Volterra series (3.21), including Volterra polynomials, are nonlinear operators. Recall also that an operator : X → Y, where X and Y are normed linear spaces, is said to be continuous at x ∈ X if xn – x x → 0 implies (xn) – (x)y → 0 as n → ∞. Note that for a linear operator, if it is continuous at a point, then it is also continuous on its entire domain [34], but this is not necessarily true for nonlinear operators. As usual, we denote by C [0, T] and Lp[0, T], respectively, the space of continuous functions defined on [0, T] and the space of measurable functions f satisfying ∫ T0 f (t)p dt < ∞ for 1 ≤ p < ∞ or supt∈[0,T] f (t) < ∞ for p = ∞. The following result [5] is an extension of the classical Stone–Weierstrass theorem [22, 36, 40]. Theorem 3.1: Let X be either C [0,T] or Lp [0,T], with 1 ≤ p < ∞, and Ω be a compact subset in X. Then, for any continuous operator : Ω → Lq [0, T], where (1/p) + (1/q) = 1, and for any ε > 0, a Volterra polynomial Pn(·) exists, with n determined by ε, such that sup ( x ) − Pn ( x ) x ∈Ω

T

[ f ]T (t ) =

Then, form a normed linear space Xe, called the extended linear space associated with X, by

{

X e = f ∈ X [ f ]T

X

}

< ∞, ∀T < ∞

For a subset D ⊆ X e, any (linear or nonlinear) operator : D → Y e satisfying

[ (x )] − [ (x )] 1

2

T

T Y

≤L

[x ] − [x ] 1 T

2 T X

, ∀x1 , x 2 ∈ D, ∀T ∈[0, ∞)

for some constant L < ∞, is called a generalized Lipschitz operator defined on D. The least of such constants L is given by the semi-norm of the operator :

: sup

[ (x )] − [ (x )] 1

sup

T ∈[ 0, ∞ ) x1 , x2 ∈D [ x1 ] ≠ [ x2 ] T

T

2

T

[x ] − [x ] 1 T

T Y

2 T X

and the operator norm of is defined via this semi-norm by

Lip

= (x0 ) + Y

for an arbitrarily chosen and fixed x0 ∈D. The following result has been established [45]. Theorem 3.7: The family of generalized Lipschitz operators

(

)

{

Lip D, Y e = : D ⊆ X e → Y e

Lip

}

< ∞ on D

is a Banach space. Based on this theorem, a best approximation problem for generalized Lipschitz operators can be similarly formulated, and many fundamental approximation results can be obtained. In addition, generalized Lipschitz operators provide a self-unified framework for both left- and right-coprime factorization

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3-15

Representation, Approximation, and Identification

representations of nonlinear feedback systems. Under this framework, the overall closed-loop system shown in Figure 3.4 can have a causal, stable, and well-posed coprime factorization representation, which can be applied to optimal designs such as tracking and disturbance rejection [45]. We now discuss briefly a different kind of min-max (uniform) approximation: the best Hankel norm approximation, where the norm (3.27) is replaced by the operator norm of a Hankel operator defined as follows [32, 77]. Consider, for instance, the transfer function H ( z ) = α 0 + α1z −1 + α 2 z −2 + of a discrete time linear time-invariant system. The Hankel operator associated with this series is defined as the infinite matrix

[ ]

Γα := α i − j

α 0 α1 = α 2

α1

α2

α2

which is a linear operator on a normed linear space of sequences. The operator norm of Γα over the l2-space is called the Hankel norm of Γα. One important feature of the Hankel operators is reflected in the following theorem [32, 77]. Theorem 3.8: An infinite Hankel matrix has a finite rank iff its corresponding functional series is rational (it sums up to a rational function); and this is true iff the rational series corresponds to a finite-dimensional bilinear system. Another useful property of Hankel operators in system approximation is represented in the following theorem [28]. Theorem 3.9: The family of compact Hankel operators is an M-ideal in the space of Hankel operators that are defined on a Hilbert space of real-valued functions. Here, a compact operator is one that maps bounded sets to compact closures and an M-ideal is a closed subspace X of a Banach space Z such that X⊥, the orthogonal complemental subspace of X in Z, is the range of the projection P from the dual space Z* to X⊥ that has the property f = P( f ) + f − P( f ) ∀f ∈ Z * The importance of the M-ideal is that it is a proximinal subspace with certain useful approximation characteristics, where the proximinal property is defined as follows. Let L(X) and C(X) be the classes of bounded linear operators and compact operators, respectively, both defined on a Banach space X. If every ∈ L(X) has at least one best approximant from C(X), then C(X) is said to be proximinal in L(X). A typical result would be the following: for any 1 < p < ∞, C(lp) is proximinal in L(lp). However, C(X) is not proximinal in L(X) if X = C [a, b], the space of continuous functions defined on [a, b], or X = Lp[a, b] for all 1 < p < ∞ except p = 2.

Best (Uniform) Approximation of Signals (Functions) Best approximations of signals for circuits and systems are also important. For example, two (different) systems (e.g., circuits) are considered to be equivalent over a set Ω of admissible input signals iff the same input from Ω yields the same outputs through the two systems. Thus, the problem of using a system to best approximate another may be converted, in many cases, to the best approximation problem for their output signals.

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Nonlinear and Distributed Circuits

A signal is a function of time, usually real valued and one-dimensional. The most general formulation for best approximation of functions can be stated as follows. Let X be a normed linear space of realvalued functions and Ω be a subset of X. For a given f in X but not in Ω, find a g* ∈ Ω such that f − g * X = inf f − g g ∈Ω

(3.29)

X

In particular, if X = L∞, l∞, or H∞, the optimal solution is the best result for the worst case. If such a g* exists, then it is called a best approximant of f from the subset Ω. In particular, if Ω1 ⊂ — Ω2 ⊂ ··· is a sequence of subspaces in X, such that Ωn = X, an important practical problem is to find a sequence of best approximants g*n ∈Ωn satisfying the requirement (3.29) for each n = 1, 2, …, such that g n* – g*X → 0 as n → ∞. In this way, for each n, one may be able to construct a simple approximant g*n for a complicated (even unknown) function f, which is optimal in the sense of the min-max approximation (3.29). Existence of a solution is the first question about this best approximation. The fundamental result is the following [22, 36]. Theorem 3.10: For any f ∈ X, a best approximant g* of f in Ω always exists, if Ω is a compact subset of X; or Ω is a finite-dimensional subspace of X. Uniqueness of a solution is the second question in approximation theory, but it is not as important as the existence issue in engineering applications. Instead, characterization of a best approximant for a specific problem is significant in that it is often useful for constructing a best approximant. As a special case, the preceding best approximation reduces to the least-squares approximation if X is a Hilbert space. The basic result is the following (compare it with Theorem 3.4, and see Figure 3.5). Theorem 3:11: Let H be a Hilbert space of real-valued functions, and let Hn be its n-dimenstional subspace. Then, given an f ∈ H, the least-squares approximation problem f − hn*

H

= infhn ∈Hn f − hn

H

is always uniquely solvable, with the optimal solution given by hn* (t ) =

n

∑ f,h k =1

k H hk

(t )

n is an orthonormal basis of Hn. where {hk}k=1 Here, the orthonormal basis of Hn is a Chebyshev system, a system of functions which satisfy the Haar < nn in the condition that the determinant of the matrix [hi (tj)] is nonzero at n distinct points t1 < domain. Chebyshev systems include many commonly used functions, such as algebraic and trigonometric polynomials, splines, and radial functions. Best approximation by these functions is discussed in more detail below. We remark that the least-squares solution shown in Theorem 3.11 is very general, which includes the familiar truncations of the Fourier series [36] and the wavelet series [29] as best approximation.

Polynomial and Rational Approximations Let πn be the space of all algebraic polynomials pn(t) of degree not greater than n. For any continuous function f (t) defined on [a, b], one is typically looking for a best approximant p n* ∈πn for a fixed n, such that f − pn*

Copyright © 2006 Taylor & Francis Group, LLC

L∞ [ a ,b ]

= min pn ∈πn f − pn

L∞ [ a ,b ]

(3.30)

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Representation, Approximation, and Identification

This is a best (min-max and uniform) algebraic polynomial approximation problem. Replacing the algebraic polynomials by the nth-order trigonometric polynomials of the form Σnk=0(ak cos(kt) + bk sin(kt)) changes the problem to the best trigonometric polynomial approximation, in the same sense as the best algebraic polynomial approximation, for a given function f∈C[–π,π]. This can be much further extended to any Chebyshev system, such as the radial basis functions and polynomial spline functions, which are discussed later. According to the second part of Theorem 3.10, the best uniform polynomial approximation problem (3.30) always has a solution that, in this case, is unique. Moreover, this best approximant is characterized by the following important sign-alternation theorem. This theorem is also valid for the best uniform approximation from any other Chebyshev system [22,36]. Theorem 3.12: The algebraic polynomial pn* is a best uniform approximant of f ∈ C[a, b] from πn iff there < tn+1 ≤ b such that exist n + 2 points a ≤ t0 < f (t k ) = pn* (t k _ = c (−1) f − pn* k

k = 0, 1,…, n + 1

L∞ [ a ,b ]

where c = 1 or –1. An efficient Remes (exchange) algorithm is available for constructing such a best approximant [79]. Another type of function is related to algebraic polynomials: the algebraic rational functions of the form rn,m (t) = pn (t)/qm (t), which has finite values on [a, b] with coprime pn ∈πn and qm ∈πm. We denote by Rn,m the family of all such rational functions, or a subset of them, with fixed integers n ≥ 0 and m ≥ 1. Although Rn,m is not a compact set or a linear space, the following result can be established [22]. * (t)∈R Theorem 3.13: For any given function f∈C [a, b], there exists a unique rn,m n,m such that

f − rn*,m

L∞ [ a ,b ]

= infrn,mεRn,m f − rn,m

L ∞[ a , b ]

(3.31)

* (t) of (3.31) is called the best uniform rational approximant of f (t) on [a, b] The optimal solution r n,m from Rn,m. Note that the unique best rational approximant may have different expressions unless it is coprime, as assumed previously. The following theorem [22] characterizes such a best approximant, in which we use d(pn) to denote the actual degree of pn, 0 ≤ d (pn) ≤ n. * Theorem 3.14: A rational function r n,m = pn* /q*m is a best uniform approximant of f∈C [a, b] from Rn,m iff < ts ≤ b, with s = 2 + min{n +d(qm), m+d(pn)}, such that there exist s points a ≤ t1

n. If l ≤ n + m + 1, then the coefficients {ak}k=0 m and {bk}k=0 of pn(t) and qm(t) are determined by the following linear system of algebraic equations: i

∑ j=0

f j (0) b =a j! i − j i

i = 0, 1,…, l − 1

with an+j = bm+j = 0 for all j = 1, 2, …. Moreover, if pn/qm is the [n, m]th-order Padé approximant of f(t) = Σ∞{ak}nk=0 fkt k, then the approximation error is given by f (t ) −

∞ pn (t ) = qm (t ) k = n + 1

m

∑ ∑f j=0

tk b qm (t )

t ∈[−1, 1]

k− j j

Padé approximation can be extended from algebraic polynomials to any other Chebyshev systems [22]. Approximation via Splines and Radial Functions Roughly speaking, spline functions, or simply splines, are piecewise smooth functions that are structurally connected and satisfy some special properties. The most elementary and useful splines are polynomial splines, which are piecewise algebraic polynomials, usually continuous, with a certain degree of smoothness at the connections. More precisely, let a = t 0 < t1

0.726,…). Hence, it is important to impose an additional optimality requirement (e.g., a uniform approximation requirement) on the interpolant. In this concern, the following result is useful [36].

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Representation, Approximation, and Identification

n Theorem 3.18: Given a continuous function f∈C [–1, 1], let {tk}k=1 be the Chebyshev points on [–1, 1]; namely, tk = cos ((2k – 1) π/(2n)), k = 1,…, n. Let also P2n–1 (t) be the polynomial of degree 2n – 1 that satisfies the following special Hermite interpolation conditions: P2n–1 (tk) = f (tk) and P2n–1 (tk ) = f (tk ) and P′2n–1(tk ) = 0, k = 1, …, n. Then, the interpolant P2n(t) has the uniform approximation property

f − P2n−1

L∞ [ −1, 1]

→ 0 as n → ∞

Because polynomial splines are piecewise algebraic polynomials, similar uniform approximation results for polynomial spline interpolants may be established [41, 72, 88]. Finally, a simultaneous interpolation and uniform approximation for a polynomial of a finite (and fixed) degree may be very desirable in engineering applications. The problem is that given and f ∈ C [a, < tn ≤ b and a given ε > 0, find a polynomial p(t) of finite degree b] with n +1 points a ≤ t0 < t1 < (usually, larger than n) that satisfies both f −pL

∞

[ a ,b ]

0

)

(4.45)

Obviously, the set of all extensions generates Abel’s group of transformations on Z that is a (n + m)parameter Lie group. This group is denoted by Diag{ei, fk}. Any subgroup H ⊂ Diag{ei , fk } is called an extension group of Z. We now consider extension groups H r, with 0 < r ≤ n + m. Ovsiannikov demonstrated that extensions of H r can be represented, choosing a parametric group, in the form r

x˜ i = x i

∏ α =1

(aα )

λiα

r

y˜ k = y k

∏ (a ) α

µ kα

(4.46)

α =1

where i = 1, …, n and k = 1, …, m. The main property of transformation groups is that they induce equivalence relations decomposing the subjects into equivalence classes on which the group acts. If hp acts on elements x ∈ X, and p ∈ p is the vector of parameters, an orbit U of a point x ∈ X is defined by the set U := {ξ∈X = hp (x,p), for all p ∈ p. In this sense, the points of an orbit can be identified by a transformation group.—A transformation group acts transitive on X if there exists an orbit U that is an open subset of X, with U = X. To study so-called local Lie groups with actions that are defined near a null neighborhood of the parameter space (includes its vector 0), we can discuss the Lie algebra that characterizes the local behavior of the associated local Lie group. In finite dimensional parameter spaces, a Lie algebra is generated by certain partial differential operators. Using the representations (4.46) of H r, the operators are of the form

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4-11

Transformation and Equivalence

n

∑

λiα x i

i =1

∂ + ∂x i

m

∑µ y

k k α

k =1

∂ ∂y k

(4.47)

where i = 1, …, n and k = 1, …, m. These operators can be represented in a matrix form

{

}

(4.48)

µ1m µrm

(4.49)

M(z ) : = M1 o diag x1 ,…, x n ; y1 ,…, y m

where λ11 M1:= λ1r

λ1n , µ11 λ rn , µ1r

Obviously, H r is intransitive if r < n + m. In order to solve the main problem of dimension theory, we need to introduce invariants of a Lie group. Let F: X → Y be a function on X and let transformation hp of a transformation group act on X, then F is an invariant of the group if F [ha(x)] = F(x) holds for any x ∈ X and p. The invariant J: X →Y is called a universal invariant if there exists, for any invariant F: X → Y of the group, a function Φ such that F = Φ ° J. The following main theorem can be proved for the extension group. Theorem 6: For the extension group H′ on Z, there exists a universal invariant J : Z → n+m–r if the condition r < n + m is satisfied. The independent components of J have the monomial form J τ (z ) =

n

m

∏( ) ∏( y ) xi

i =1

θiτ

⋅

k

σkτ

(4.50)

k =1

where τ = 1,…, n + m – r. If dimensional analysis considers only scale transformations (4.43), this theorem contains the essential result of the so-called Pi-theorem. For this purpose we present a connection between the dimensionalities and the extension group H r (see [42]). The group H r of the space n, defined only by the dimensions of the physical quantities φk with respect to the set of symbols {Eα}, has a one-to-one correspondence with every finite set {φk } of n physical quantities, which can be measured in the system of symbols {Eα} consisting of r independent measurement units [see (4.41)]. The transformations belonging to the group H r give the rule of change, in the form r

φ˜ = φ

∏ (a ) α

λα

(4.51)

α =1

of the numerical values φκ as a result of the transition from the units {E α } to {E˜α } by means of (4.43). As a consequence of this relationship, a quantity φ is dimensionless if and only if its numerical value is an invariant of the group H r. Thus, the problem to determine the independent physical quantities of a given set of quantities is solved by the construction of a universal invariant of H r stated by the Pitheorem (see also [5]). Normalization, as well as the popular method of dimension comparison, are consequences of the invariance of physical equations with respect to the group of analogy transformations. In applications of dimensional theory, a normal form that has certain advantageous properties is desired. For example, it is useful to reduce the number of parameters in physical equations. Normal forms of this type are used very often in practice, but with no clarification of their mathematical foundation.

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Nonlinear and Distributed Circuits

Network equations, similar to other physical equations, contain numerous parameters. In applications, it is often desired to suppress some of these properties and they should be replaced by the numerical value 1. For this purpose Desloge [27], chooses a new system of units {Eα}. A theory of Desloge’s method, based on analogy transformations (4.42) instead of scale transformations (4.43), was presented by Mathis and Chua [38]. The main idea behind this method is that, beside the foundation units time [T], voltage [E], and charge [Q] that are useful in network theory, the units of other parameters are considered foundational units. We denote the units by [Aα] instead of Eα. For example, in the case of the tunneldiode circuit (see Figure 4.2), [T], [E], and [Q], as well as [R], [C], and [L] need to be discussed. As a consequence of Desloge’s method, three of the four parameters can be suppressed and the other variables will be normalized. The method works in the case of linear as well as nonlinear networks. The method is illustrated using the tunnel-diode circuit (see (4.32) and (4.43). At first, the dimensional matrix is determined by [T ]

[ E]

[R] 1

1

−1

1

−1

[L] 2 [C] 0

−1

[Q]

(4.52)

1

that characterizes the relation between the dimensions of t, v, q, R, C, L. Desloge now considers another set of power independent dimensional scalars A1, A2, A3 with

[ A ] = [T ] [E ] [Q] a1i

ai2

ai3

i

(i = 1,2,3)

(4.53)

These relations are interpreted as an analogy transformation (4.42). Applying the map L(·) that has the same properties as the logarithmic function (see [38]) to (4.53), the symbols L([A1]), L([A2]), L([A3]) are represented by linear combinations of L([T]), L([E]), L([Q]). The coefficient matrix in (4.53) is regular and contains the exponents. Solving these linear equations using “antilog,” the [T], [E], [Q] are products of powers of [A1], [A2], [A3]. In this manner, dimensionless versions of differential equations of the tunnel diode can be derived. By using the independent units A1 := L, A2 := C, A3 := V0 to replace V0 , L , C → 1 (with respect to the new units), the following equation is derived by the approach sketched previously: [T ]

[E ]

[V0 ] 0 [L] 2 [C] 0

1

[Q] 0 −1 1

1 −1

In([T ]) In([V0 ]) In([E ]) = In([L]) In([Q]) In([C])

(4.54)

Multiplying (4.54) with the inverse of the dimensional matrix [V0 ] [T ] 0 [E ] 1 [Q] 1 and applying “antilog” to the result, we obtain

Copyright © 2006 Taylor & Francis Group, LLC

[L]

[C]

12

1 2 0 1

0 0

(4.55)

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Transformation and Equivalence

[T ] = [L]1 2[C ]1 2 [E ] = [V0 ] [Q] = [V0 ][C ]

(4.56)

From these equations, the relations between the old and the new units can be derived (see [38]). T, E, and Q are expressed by the new units L, C, and V0 and the parameters and variables in (4.34) and (4.35) can be reformulated if the numerical values of V0, L, and C are added: T=L

−1 2

C

−1 2 1 2

L C1 2 ,

−1

−1

E = V0 V0 ,

−1

Q = V0 C V0C

(4.57)

These relations represent parameters and variables of the tunnel-diode network with respect to the new V0, L and C. R=

iL =

RC L

iL L

12

L1 2C −1 2 ,

12

V0 = 1 ⋅ V0 ,

12

V0 C

12

V0 L−1 2C1 2 ,

vC =

vC V0

L = 1 ⋅ L, C = 1 ⋅ C

V0 , t =

t L

12

C

12

(4.58)

L1 2C1 2

(4.59)

The dimensional exponents for these quantities can be found by finding the inverse dimensional matrix (4.55): 1. T, E, Q: their exponents correspond the associated rows of (4.55). 2. V0, L, C, R: premultiply (4.55) with the corresponding row (4.52). ∆

For example, taking [C] = (0 – 1 1) results in [V0 ]

[T ] [E ] [Q] [C ](0 − 1 1)

[T ] 0 [E ] 1 [Q] 1

[L]

[C]

[ ] [L] [C ]

0

V0 1 / 2 0 = [C ]( 0 1

[L]

[C]

1/ 2 0

)

(4.60)

1

[L]

[C] −1 2

)

(4.61)

12

0

∆

or with (4.52) [R] = (1 1 –1) [V0 ] [T ] [R](1

[E ] 1

[Q] − 1)

[T ] 0 [E ] 1 [Q] 1

12 0 0

[V0 ] 1 2 0 = [R]( 0 1

With these representations of the dimensional quantities, we can obtain a dimensionless representation of (4.34) and (4.35)

Copyright © 2006 Taylor & Francis Group, LLC

dvC = iL − f (vC ) dt

(4.62)

diL = 1 − ε iL − vC dt

(4.63)

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Nonlinear and Distributed Circuits

where

vc :=

vC V0

,

t :=

iL :=

t

ε :=

LC iL L

RC L

12

12

(4.64)

12

V0 C

12

(4.65)

Furthermore, the dimensionless tunnel-diode current f is defined by f (vC ) : = V0−1L1 2C −1 2 f (V0vC )

(4.66)

The associated dimensionless form of the (4.34) and (4.35) can be derived by another scaling of the current i L := ε iL. Obviously, the dimensionless normal form is not unique. The classical dimensional analysis shows that R2C/L is the only dimensionless constant of (4.32) and (4.33). Because the parallel RLC circuit includes the same constants and variables, the results of the previous dimensional analysis of the tunnel-diode circuit can be used to normalize (4.37). Further interesting applications of Desloge’s approach of suppressing superfluous parameters can be found in the theory of singular perturbations. The reader is referred to the monograph of Smith [43] for further details. Miranker [41] demonstrated that the differential equations of the tunnel-diode circuit can be studied on three time scales τ1 = L/R, τ2 = RC, and τ3 = LC with different phenomena arising. The corresponding dimensionless equations can be derived in a systematic manner by Desloge’s method. In this way, normalized differential equations describing Chua’s circuit (see [39]) can be obtained but other representations of these differential equations are possible using dimensional analysis.

4.4

Equivalence between Nonlinear Resistive Circuits

In this section, we consider equivalence of nonlinear resistive n-ports. (We do not discuss resistive networks without accessible ports.) Although the explanations that follow are restricted to resistive n-ports, this theory can be extended to capacitive and inductive n-ports (see [23]). In Section 4.5, we give a definition of those n-ports. At first, we consider linear resistive 1-ports that contain Ohmic resistors described by vk = Rk ik or/and ik = Gk ik , and independent current and voltages sources v k = V0k and ik = I 0k . We can use Thevenin’s or Norton’s theorem to compare any two of those 1-ports and reduce a complex 1-port to a simple “normal” form. Therefore, two of those 1-ports are called equivalent if they have the same Thévenin (or Norton) 1-port. Clearly, by this approach, an equivalence relation is defined in the set linear resistive 1-ports and it is decomposed into “rich” classes of 1-ports. To calculate these normal forms, ∆-Y and/or Y-∆ transformations are needed (see [20, 47]). It is known that this approach is not applicable to nonlinear resistive networks because ∆–Y and Y–∆ transformations generally do not exist for nonlinear networks. (This was observed by Millar [40] for the first time.) Certain networks where these transformations can be performed were presented by Chua [14]. More recently, Boyd and Chua [6, 7] clarified the reasons behind this difficulty from the point of view of a Volterra series. As a conclusion, the set of nonlinear resistive 1-ports can be decomposed into equivalence classes, but, no reasonably large class of equivalent 1-ports exists. More general studies of this subject are based on the well-known substitution theorem, which can be extended to a certain class of nonlinear networks (see [26], [29]). Some results applicable to 1-ports can be generalized to linear resistive n-ports (“extraction of independent sources”), but this point of view is not suitable for nonlinear resistive n-ports. Better understanding of nonlinear resistive n-ports and the problem of equivalence cannot be based on the “operational” approach mentioned earlier. Instead, a geometric approach that was developed by

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4-15

Transformation and Equivalence

Brayton and Moser [9] is more useful. These authors (see also [8]) characterize a resistive n-port in a generic manner by n independent relations between the 2n port variables, n-port currents i1, …, in and n-port voltages v1, …, vn . Geometrically, this means that in the 2n-dimensional space of port variables the external behavior of a resistive n-port can be represented generically by an n-dimensional surface. The classical approach formulates a system of equations y1 − f1 ( x1 , K, x n ) = 0 M

(4.67)

y n − fn ( x1 , K, x n ) = 0 where x’s and y’s are the port variables. The zero set of equations (4.67) corresponds to the n-dimensional surface. Therefore, two n-ports are called equivalent if they are different parameterizations of the same surface. As an application of this point of view, Brayton and Moser [9] demonstrated that a 2-port consisting of a Y-circuit and a circuit consisting of a ∆-circuit cannot be equivalent, in general. For example, they proved by means of Legendre transformations that a Y-circuit with two ohmic resistors and a third resistor can be equivalent to a ∆-circuit if and only if the third resistor is also linear. Therefore, the operational approach is not a very useful concept for nonlinear n-ports. The subject of synthesizing a prescribed input–output behavior of nonlinear resistive n-ports is closely related to the problem of the equivalence. Several results were published in this area using ideal diodes, concave and convex resistors, dc voltage and current sources, ideal op amps, and controlled sources. Therefore, we give a short review of some results. We do not consider here the synthesis of resistive n-ports. Although the synthesis of nonlinear resistive n-ports was of interest to many circuit designers since the beginning of this century, the first systematic studies of this subject were published by Chua [13], [14]. Chua’s synthesis approach is based on the introduction of new linear 2-ports (R-rotator, R-reflector, and scalors) as well as their electronic realizations. Now, curves in the i–v space of port current i and port voltage v that characterize a (nonlinear) resistive 1-port can be reflected and scaled in a certain manner. Chua suggested that a prescribed behavior of an active or passive nonlinear resistive 1-port can be reduced essentially to the realization of passive i–v curves. Piecewise-linear approximations of characteristics of different types of diodes, as well as the previously mentioned 2-ports, are used to realize a piecewise-linear approximation of any prescribed passive i-v curve. In a succeeding article, Chua [15] discussed a unified procedure to synthesize a nonlinear dc circuit mode that represents a prescribed family of input and output curves of any strongly passive 3-terminal device (e.g, transistor). It was assumed that the desired curves are piecewise-linear. Since then, this research area has grown very rapidly and piecewise-linear synthesis and modeling has become an essential tool in the simulation of nonlinear circuits. (see [19], [35], [37] for further references.)

4.5

Equivalence of Lumped n-Port Networks

In this section, we consider more general n-ports that can be used in for device modeling (see [16]). Although many different lumped multiterminal and multiport networks are used, a decomposition into two mutually exclusive classes is possible: algebraic and dynamic multiterminal and multiport networks. Adopting the definition of Chua [16], an (n + 1)-terminal or n-port network is called an algebraic element if and only if its constitutive relations can be expressed symbolically by algebraic relationships involving at most two dynamically independent variables for each port. In the case of a 1-port, a so-called memristor is described by flux and charge, a resistor by voltage and current, a inductor by flux and current, and a capacitor by voltage and charge. An element is called a dynamic element if and only if it is not an algebraic element. Despite the fact that the class of all dynamic elements is much larger than that of algebraic ones, the following theorem of Chua [16] suggests that resistive multiports are essential for dynamic elements, too.

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4-16

Nonlinear and Distributed Circuits

Theorem 7: Every lumped (n + 1)-terminal or n-port element can be synthesized using only a finite number m of linear 2-terminal capacitors (or inductors) and one (generally nonlinear) (n + m)-port resistor with n accessible ports and m ports for the capacitors. Theorem 7 demonstrates that any n-port made of lumped multiterminal and/or multiport elements is equivalent to a multiterminal network where all of its nonlinear elements are memoryless. This fact offers a possibility to classify (n+1)-terminal and n-port elements in an operational manner. The proof of this theorem provides the answer of a fundamental question: what constitutes a minimal set of network elements from which all lumped elements can be synthesized? Theorem 8: The following set of network elements constitutes the minimal basic building blocks in the sense that any lumped multiterminal or multiport element described by a continuous constitutive relation on any closed and bounded set can be synthesized using only a finite number of elements of , and that this statement is false if even one element is deleted from : 1. 2. 3. 4.

Linear 2-terminal capacitors (or inductors) Nonlinear 2-terminal resistors Linear 2-port current-controlled voltage sources (CCVS) defined by v1 = 0 and v2 = ki1 Linear 2-port current-controlled current sources (CCCS) defined by i1 = 0 and i2 = kv1

The proof of Theorem 8 (see [16]), is based on a remarkable theorem of Kolmogoroff, which asserts that a continuous function f: n → can always be decomposed over the unit cube of n into a certain sum of functions of a single variable. Although the proof of Theorem 8 is constructive, it is mainly of theoretical interest because the number of controlled sources needed in the realization is often excessive.

4.6

Equivalence between Nonlinear Dynamic Circuits

As already mentioned in Section 4.1, a set of networks can be decomposed into classes of equivalent networks by some type of equivalence relation. Such equivalence relations are introduced in a direct manner with respect to the descriptive equations, using a transformation group or classifying the behavior of the solution of the descriptive equations. In the last three sections, several useful ideas for defining equivalence relations were discussed that can be suitable for circuit theory. In this section, equivalent dynamic circuits are discussed in more detail. It should be emphasized again that equivalence has a different meaning depending of the applied equivalence relation. As the so-called state-space equations in network and system theory arose in the early 1960s, a first type of equivalence was defined because various networks can be described by the same state-space equations that induced an equivalence relation. (For further references, see [46].) Although this approach is interesting, in some cases different choices of variables for describing nonlinear networks exist that need not lead to equivalent state-space equations (see [17]). In other words, the transformations of coordinates are not well conditioned. This approach was applied also to nonlinear input–output systems. A study of equivalence of a subclass of nonlinear input–output networks was presented by Verma [45] and Varaiya and Verma [44]. These authors discussed nonlinear reciprocal networks that can be formulated by a so-called mixed potential function. This approach was developed by Brayton and Moser [9]. If x∈n is the state-space vector, u∈m the input vector, and e∈m is the output vector, then the statespace equations can be generated by a matrix-valued function A(x): n → n×n and a real-valued function P: n × m → A( x )

dx ∂P = − (x, u) dt ∂x

e=

∂P (x, u) ∂u

(4.68)

(4.69)

For two such networks N1 = {A1, P1} and N2 = {A2, P2}, Varaiya and Verma defined the following equivalence.

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4-17

Transformation and Equivalence

Definition 4. Networks N1 and N2 A1 ( x )

∂P dx = − 1 (x, u) dt ∂x

e1 =

∂P1 (x, u) ∂u

(4.70)

(4.71)

and A 2 ( y)

∂P dy = − 2 ( y, u) dt ∂y

(4.72)

∂P2 (y, u) ∂u

(4.73)

e2 =

are equivalent if there exists a diffeomorphism y = φ(x), such that for all x0 ∈n, all input functions u, and all t ≥ 0: 1. φ[ξ(t , ξ 0 , υ)] = ψ(t , j(ξ 0 ), υ) 2. e1(t , x0 , u) = e 2 (t , φ(x0 ), u) The diffeomorphism φ is called the equivalance map. Thus, two networks are equivalent if their external behavior is identical, i.e., if for the same input and corresponding states they yield the same output. It is clear that this definition yields an equivalence relation on the set of all dynamical networks under consideration. In their paper, Varaiya and Verma showed that, under an additional assumption of controllability, the diffeomorphism φ establishes an isometry between the manifold with the (local) pseudo-Riemannian metric (dx , dx): = dx , A1dx and the manifold with the (local) pseudo-Riemannian metric (dy , dy): = dy , A 2dy in many interesting cases of reciprocal nonlinear networks. This statement has an interesting interpretation in the network context. It can be proven that φ must relate the reactive parts of the networks N1 and N2 in such a way that, if N1 is in the state x and N2 is in the state y = φ(x), and if the input u is applied, then

()

di di dv dv d˜i ˜ ˜ d˜i dv˜ ˜ dv˜ , C( v˜ ) , L( i ) , C( v ) ,Li − = − dt dt dt dt dt dt dt dt

(4.74)

The concept of equivalence defined in a certain subset of nonlinear dynamic networks with input and output terminals given by Varaiya and Verma is based on diffeomorphic coordinate transformations (the transformation group of diffeomorphisms). Unfortunately, the authors presented no ideas about the kind of “coarse graining” produced in the set of networks by their equivalence relation. However, a comparison to C k conjugacy or C k equivalence of vector fields in Section 4.1 implies that input–output equivalence leads to a “fine” decomposition in the set of these networks. To classify the main features of the dynamics of networks, the concept of topological equivalence (the transformation group of homeomorphisms) is useful. On the other hand, in the case of networks with nonhyperbolic fixed points, the group of diffeomorphisms is needed to distinguish the interesting features. An interesting application of C 1 equivalence of vector fields is given by Chua [18]. To compare nonlinear networks that generate chaotic signals, Chua applied the concept of equivalence relation and concluded that the class of networks and systems that are C 1 equivalent to Chua’s circuit (Figure 4.5) is relatively small. The nonlinearity in this network is described by a piecewise linear i–v characteristic. (See [39] for further details.) The equations describing the circuit are dvC1 dt

Copyright © 2006 Taylor & Francis Group, LLC

=

[(

) ( )]

1 G vC2 − vC1 − f vC1 C1

(4.75)

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Nonlinear and Distributed Circuits

G=

1 R

iR

R0 VC2

VC1

C1 L

VR

C2

iL

FIGURE 4.5 Modified Chua’s circuit.

dvC2 dt

=

((

) )

(4.76)

)

(4.77)

1 G vC1 − vC2 + iL C2

(

diL I = v − R0iL dt L C2

where R0 = 0 and the piecewise linear function is defined by

( )

f vC1 : = GbvC1 +

(

1 (G − Gb ) vC1 + E − vC1 − E 2 a

)

(4.78)

Chua’s extended approach to study the set of the piecewise linear networks that include Chua’s circuit introduces the concept of global unfoldings. This concept can be considered as an analogy to the theory of “local unfoldings” of nonhyperbolic systems in a small neighborhood of singularities [3], [30]. Heuristically, a minimum number of parameters in a given nonhyperbolic system is introduced, and, as the parameters are varied “any other system” near the nonhyperbolic system is obtained. Chua demonstrated that Chua’s circuit with arbitrary (R0 ≠ 0) can be considered as an “unfolding” of the original circuit. Furthermore, he proved that a class of networks that can be described without loss of generality by x˙ = Ax + b,

x1 ≤ −1

(4.79)

= A 0 x,

− 1 ≤ x1 ≤ 1

(4.80)

x1 ≥ 1

(4.81)

= Ax + b,

is equivalent to the unfolded Chua’s circuit if certain conditions are satisfied. In the associated parameter space, these conditions define a set of measure zero. The proof of this theorem as well as some applications are included in [18]. The ideas of normal forms presented in Section 4.2 can be applied to nonlinear networks with hyperbolic and nonhyperbolic fixed points. A similar theory of normal forms of maps can be used to study limit cycles, but this subject is beyond our scope. (See [3] for further details.) In any case the vector field has to be reduced to lower dimensions and that can be achieved by the application of the so-called center manifold theorem. Altman [2] illustrated this approach by calculating the center manifold and a normal form of Chua’s circuit in a tutorial style. To perform the analytical computations the piecewise nonlinearity (4.78) is replaced by a cubic function f (x) = c0 x + c1 x 3. Based on this normal form, Altman studied bifurcations of Chua’s circuit. Another application of normal forms in nonlinear dynamical networks is discussed by Keidies and Mathis [36]. In this approach, nonlinear dynamical networks with constant sources are considered and are described by nonlinear differential equations in state-space form: x˙ = f ( x ),

Copyright © 2006 Taylor & Francis Group, LLC

f :n → n

(4.82)

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Transformation and Equivalence

linear dynamic network

Snl = fnl (X1,…,Xn)

Source Snl non-resonant

Xi

Source Snl resonant Normal Form Transformation

linear dynamic network

Yi

Snltrafo

Sres = fnl (X1 ,…, Xn)

Xi

linear dynamic network

Xi

FIGURE 4.6 Decomposition of nonlinear dynamic networks.

where all nonlinear reactances are replaced by linear reactances, nonlinear resistors, and linear controlled sources. The nonlinearities are interpreted as nonlinear controlled sources. The network is decomposed into a linear part that consists of linear reactances and resistive elements, and the nonlinear sources that are used as input sources (Figure 4.6). The network is described by the vector of state-space variables x. Now, normal form theorems are used to transform the nonlinear sources to the input. In other words, if the RHS f of (4.82) is decomposed into a linear and a nonlinear part, f (x) = Ax + ˜f (x), where ˜f corresponds the nonlinear sources, the system can be decomposed into two equations: y˙ = Ay

(4.83)

x = y + F( y )

(4.84)

We now have to define the nonresonant and resonant terms of vector fields that depend on the eigenvalues of the linear part A of f and the degrees of the polynomial nonlinearities. Under certain conditions, a finite recursive process exists, such that all nonlinear sources can be transformed to the input of the linear part of a network. In these cases, the networks are described by (4.82) and (4.83). In other cases, a number of new sources are generated during the recursive process that cannot transform sources to the input. This effect is shown in Figure 4.7(a) and (b). It should be mentioned that this idea is related

+ iNL = vC1vC2

G1

C1

vC1 −

+ G2

C2

vC2 −

(a)

FIGURE 4.7 Decomposition of a simple nonlinear network.

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4-20

Nonlinear and Distributed Circuits

+ 4 ~v 1 ~ C18 v C2

1 3 v C2 v~C14 ~

1 2 v C2 v~C12 ~

G1

C1

~ v C1 −

G2

C2

+ 1 2

~ v C1 ~ v C2 −+

vC1 −

+

+

~ v C2

vC2

−

−

(b)

FIGURE 4.7 (continued).

in certain sense to the so-called exact linearization that is studied in the theory of nonlinear control systems (see [34]). Therefore, this application of normal form theorems can be interpreted as a kind of extraction of nonlinear controlled sources from a nonlinear dynamic network.

References [1] V. I. Arnold, Geometrical Methods in the Theory of Ordinary Differential Equations, New York: Springer-Verlag, 1983. [2] E. J. Altman, “Bifurcation analysis of Chua’s circuit with application for low-level visual sensing,” in Chua’s Circuit: A Paradigm for Chaos, R. N. Madan, Ed., Singapore: World Scientific, 1993. [3] D. K. Arrowsmith and C. M. Place, An Introduction to Dynamical Systems, Cambridge: Cambridge Univ., 1993. [4] M. Ashkenazi and S.-N. Chow, “Normal forms near critical points for differential equations and maps,” IEEE Trans. Circuits Syst., vol. 35, pp. 850–862, 1988. [5] G. W. Bluman and S. Kumei, Symmetries and Differential Equations, New York: Springer-Verlag, 1989. [6] S. Boyd and L. O. Chua, “Uniqueness of a Basic Nonlinear Structure,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 648–651, 1983. [7] S. Boyd and L. O. Chua, “Uniqueness of circuits and systems containing one nonlinearity,” IEEE Trans. Automat. Control, vol. AC-30, pp. 674–681, 1985. [8] R. K. Brayton, “Nonlinear reciprocal networks,” in Mathematical Aspects of Electrical Network Analysis, Providence, RI: AMS, 1971. [9] R. K. Brayton and J. K. Moser, “Nonlinear networks, I, II,” Quart. Appl. Math., vol. 23, pp. 1–33, 81–104, 1964. [10] A. D. Bruno, Local Methods in Nonlinear Differential Equations, New York: Springer-Verlag, 1989. [11] J. Carr, Applications of Center Manifold Theorem, New York: Springer-Verlag, 1981. [12] L. O. Chua, “∆–Y and Y–∆ transformation for nonlinear networks,” Proc. IEEE, vol. 59, pp. 417–419, 1971. [13] L. O. Chua, “The rotator — a new network element,” Proc IEEE. vol. 55, pp. 1566–1577, 1967. [14] L. O. Chua, “Synthesis of new nonlinear network elements” Proc. IEEE, vol. 56 pp. 1325–1340, 1968. [15] L. O. Chua, “Modeling of three terminal devices: A black box approach,” IEEE Trans. Circuit Theory, vol. CT-19, pp. 555–562, 1972. [16] L. O. Chua, “Device modeling via basic nonlinear circuit elements,” IEEE Trans. Circuits Syst. vol. CAS-27, pp. 1014–1044, 1980

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Transformation and Equivalence

4-21

[17] L. O. Chua “Dynamical nonlinear networks: State of the Art,” IEEE Trans. Circuits Syst., vol. CAS-27, pp. 1059–1087, 1980. [18] L. O. Chua, “Global unfolding of Chua’s circuit” IEICE Trans. Fundam., vol. E76-A, pp. 704–734, 1993. [19] L. O. Chua and A. C. Deng, “Canonical piecewise linear representation,” IEEE Trans. Circuits Syst., vol. 33, pp. 101–111, 1988. [20] L. O. Chua, C. A. Desoer, and E. S. Kukh, Linear and Nonlinear Circuits, New York: McGraw-Hill, 1987. [21] L. O. Chua and H. Kokubo, “Normal forms for nonlinear vector fields — Part I: Applications,” IEEE Trans. Circuits Syst.,vol. 36, pp. 51–70, 1989. [22] L. O. Chua and H. Kokubo, “Normal forms for nonlinear vector fields — Part II: Theory and algorithm,” IEEE Trans. Circuits Syst., vol. 35, pp. 863–880, 1988. [23] L. O. Chua and Y.-F. Lam, “A theory of algebraic n-ports,” IEEE Trans. Circuit Theory, vol. CT-20, pp. 370–382, 1973. [24] L. O. Chua and H. Oka, “Normal forms of constrained nonlinear differential equations — Part I: Theory,” IEEE Trans. Circuits Syst., vol. 35, pp. 881–901, 1988. [25] L. O. Chua and H. Oka, “Normal forms of constrained nonlinear differential equations — Part II: Bifurcation, IEEE Circuits Syst., vol. 36, pp. 71–88, 1989. [26] C. A. Desoer and E. S. Kuh, Basic Circuit Theory, New York: McGraw-Hill, 1969. [27] E. A. Desloge, “Suppression and restoration of constants in physical equations,” Amer. J. Phys., vol. 52, pp. 312–316, 1984. [28] J. Guckenheimer and P. Holmes, Nonlinear Oscillations, Dynamical Systems, and Bifurcations of Vector Fields, New York: Springer-Verlag, 1990. [29] J. Haase, “On generalizations and applications of the substitution theorem,” in Proc. ECCTD ’85, Praha, Sep. 2–6, 1985, pp. 220–223. [30] S. Hale and H. Kocak, Dynamics and Bifurcations, New York: Springer-Verlag, 1991. [31] B. D. Hassard, N. D. Kazarinoff, and Y.-H. Wan, Theory and Applications of the Hopf Bifurcation, Cambridge: Cambridge Univ., 1980. [32] B. D. Hassard and Y.-H. Wan, “Bifurcation formulae derived from center manifold theorem,” J. Math. Anal. Applicat., vol. 63, pp. 297–312, 1978. [33] R. A. Horn and C. R. Johnson, Matrix Analysis, Cambridge: Cambridge Univ., 1992. [34] A. Isidori, Nonlinear Control Systems, Berlin: Springer-Verlag, 1989. [35] J. Jess, “Piecewise Linear Models for Nonlinear Dynamic Systems,” Frequenz, vol. 42, pp. 71–78, 1988. [36] C. Keidies and W. Mathis, “Applications of normal forms to the analysis of nonlinear circuits,” in Proc. 1993 Int. Symp. Nonlinear Theory, Applicat., Hawaii, Dec. 1993. [37] T. A. M. Kevenaar and D. M. W. Leenaerts, “A comparison of piecewise-linear model descriptions,” IEEE Trans. Circuits Syst. I, vol. 39, pp. 996–1004, 1992. [38] W. Mathis and L. O. Chua “Applications of dimensional analysis to network theory,” Proc. ECCTD ’91, Copenhagen, Sep. 4–6, 1991. [39] R. N. Madan, Ed., Chua’s Circuit: A Paradigm for Chaos, Singapore: World Scientific, 1993. [40] W. Millar, “The nonlinear resistive 3-pole: Some general concepts,” in Proc. Symp. Nonlinear Circuit Anal., Polytech. Instit., Brooklyn, NY: Interscience, 1957. [41] W. L. Miranker, Numerical Methods for Stiff Equations and Singular Perturbation Problems, Dordrecht: D. Reidel, 1981. [42] L. V. Ovsiannikov, Group Analysis of Differential Equations, New York: Academic Press, 1982. [43] D. R. Smith, Singular-Perturbation Theory, Cambridge: Cambridge University, 1985. [44] P. P. Varaiya and J. P. Verma, “Equivalent nonlinear reciprocal networks,” IEEE Trans. Circuit Theory, vol. CT-18, pp. 214–217, 1971. [45] J. P. Verma, “Equivalence of nonlinear networks,” Ph.D. dissertation, University of California, Berkeley, 1969. [46] A. N. Willson, Jr., Nonlinear Networks: Theory and Analysis, New York: IEEE, 1975. [47] W. Mathis and R. Pauli, “Networks Theorems,” in Wiley Encyclopedia of Electrical and Electronics Engineering, vol. 14, New York: John Wiley & Sons, 1999.

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5 Piecewise-Linear Circuits and PiecewiseLinear Analysis 5.1 5.2

J. Vandewalle Katholieke Universiteit

L. Vandenberghe University of California, Los Angeles

5.1

5.3 5.4 5.5 5.6 5.7

Introduction and Motivation ............................................ 5-1 Hierarchy of Piecewise-Linear Models and Their Representations .................................................................. 5-2 Piecewise-Linear Models for Electronic Components....... 5-8 Structural Properties of Piecewise-Linear Resistive Circuits.............................................................................. 5-13 Analysis of Piecewise-Linear Resistive Circuits.............. 5-15 Piecewise-Linear Dynamic Circuits ................................ 5-18 Efficient Computer-Aided Analysis of PWL Circuits ..... 5-20

Introduction and Motivation

In this chapter, we present a comprehensive description of the use of piecewise-linear methods in modeling, analysis, and structural properties of nonlinear circuits. The main advantages of piecewise linear circuits are fourfold. (1) Piecewise-linear circuits are the easiest in the class of nonlinear circuits to analyze exactly, because many methods for linear circuits can still be used. (2) The piecewise-linear approximation is an adequate approximation for most applications. Moreover, certain op amp, operational transconductance amplifier, diode and switch circuits are essentially piecewise linear. (3) Quite a number of methods exist to analyze piecewise-linear circuits. (4) Last, but not least, piecewise-linear circuits exhibit most of the phenomena of nonlinear circuits while still being manageable. Hence, PWL circuits provide unique insight in nonlinear circuits. The section consists of six parts. First, the piecewise-linear models will be presented and interrelated. A complete hierarchy of models and representations of models is presented. Rather than proving many relations, simple examples are given. Second, the piecewise-linear models for several important electronic components are presented. Third, since many PWL properties are preserved by interconnection, a short discussion on the structural properties of piecewise-linear circuits is given in Section 5.4. Fourth, analysis methods of PWL circuits are presented, ranging from the Katzenelson algorithm to the linear complementarity methods and the homotopy methods. Fifth, we discuss PWL dynamic circuits, such as the famous Chua circuit, which produces chaos. Finally, in Section 5.7, efficient computer-aided analysis of PWL circuits and the hierarchical mixed-mode PWL analysis are described. A comprehensive reference list is included. For the synthesis of PWL circuits, we refer to Chapter 1. In order to situate these subjects in the general framework of nonlinear circuits, it is instructive to interrelate the PWL circuit analysis methods (Figure 5.1). In the horizontal direction of the diagrams, one does the PWL approximation of the dc analysis from left to right. In the vertical direction, we show the conversion from a circuit to a set of equations by network equation formulation and the conversion

5-1 Copyright © 2006 Taylor & Francis Group, LLC

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5-2

Nonlinear and Distributed Circuits

general resistive nonlinear circuits

approximation PWL modeling

network equation formulation

general circuit with resistive PWL components

circuit with linear resistors and ideal diodes

network equation formulation

nonlinear algebraic equations

network equation formulation generalized linear complementary equation GLCP

linear equations in polyhedral regions

iterative equation solving

one or more solutions (a)

general dynamic piecewise linear circuits

general resistive piecewise linear circuits

dc analysis

network equation formulation

network equation formulation set of piecewise linear algebraic equations

set of piecewise linear differential equations solving

solving one or more equilibrium or dc value

waveforms (b)

FIGURE 5.1 Interrelation of PWL circuit analysis methods: (a) resistive and (b) dynamic nonlinear circuits.

from equations to solutions (waveforms or dc values) by solution methods. The specific methods and names used in the figure are described in detail in the different parts.

5.2

Hierarchy of Piecewise-Linear Models and Their Representations

In the past 25 years, much progress has been achieved in the representations of piecewise-linear resistive multiports and their relationships (see references). From a practical point of view, a clear trade-off exists

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5-3

Piecewise-Linear Circuits and Piecewise-Linear Analysis

i1 + v1 −

in

+

vn

−

FIGURE 5.2 Resistive n-port.

i2

i1 +

+ G

v1

v2 −

−

FIGURE 5.3 2-port configuration of a bipolar transistor.

between the efficiency of a representation in terms of the number of parameters and the ease of evaluation (explicit versus implicit models) on the one hand and the generality or accuracy on the other hand. Here, we go from the easiest and most efficient to the most general representations. We define here a resistive multiport (Figure 5.2) as an n-port whose port variables (the vector of port currents i = [i1…in]T and the vector of port voltages v = [v1…vn]T ) are related by m algebraic equations called constitutive equations ϕ(i, v ) = 0

(5.1)

where i, v ∈n and φ (.,.) maps 2n into m. For example, for a bipolar transistor (Figure 5.3), one obtains the explicit form i1 = f1(v1 , v 2 ) and i2 = f 2 (v1 , v 2 ) and i = [i1, i2]T and v = [v1, v2]T. These relations can be measured with a curve tracer as dc characteristic curves. Clearly, here φ (.,.) is a map from 4 → 2 in the form i1 − f1 (v1 , v 2 ) = 0

(5.2)

i2 − f 2 (v1 , v 2 ) = 0

(5.3)

It is easy to see that a complete table of these relationships would require an excessive amount of computer storage already for a transistor. Hence, it is quite natural to describe a resistive n-port with a piecewiselinear map f over polyhedral regions Pk by v = f (i ) = ak + Bki ,

i ∈ Pk ,

{

}

k ∈ 0, 1, ...., 2l − 1

(5.4)

where the Jacobian Bk ∈ n × n and the offset vector ak ∈n are defined over the polyhedral region Pk , separated by hyperplanes c iT x − di = 0, i = 1, ..., l and defined by

{

Pk = x ∈n c Tj x − d j ≥ 0, j ∈I k , c Tj x − d j ≤ 0, j ∉ I k where k = Σj ∈Ik 2j–1, Ik ⊆ {1, 2, …, l} and cj∈n, dj∈n.

Copyright © 2006 Taylor & Francis Group, LLC

}

(5.5)

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5-4

Nonlinear and Distributed Circuits

?6E − @ = E

8 = = + * E

2!

?6 E − @ =

2! 8 = =! + * ! E

2 8 = = + * E

2 8== + * E

E

FIGURE 5.4 A PWL function defined in four polyhedral regions in n defined by c T1 i – d1 0 and c T2 i d2 > 0.

In other words, the hyperplanes c iT x − di = 0, i = 1, ..., l separate the space n into 2l polyhedral regions Pk (see Figure 5.4) where the constitutive equations are linear. The computer storage requirements for this representation is still quite large, especially for large multiports. A more fundamental problem with this rather intuitive representation is that it is not necessarily continuous at the boundaries between two polyhedral regions. In fact, the continuity of the nonlinear map is usually desirable for physical reasons and also in order to avoid problems in the analysis. The canonical PWL representation [6] is a very simple, attractive, and explicit description for a resistive multiport that solves both problems: v = f (i ) = a + Bi +

l

∑e

j

c Tj i − d j

(5.6)

j =1

One can easily understand this equation by looking at the wedge form of the modulus map (see Figure 5.5). It has two linear regions: in the first x ≥ 0 and y = x , while in the second x ≤ 0 and y = –x. At the boundary the function is clearly continuous. Equation (5.6) is hence also continuous and is linear in each of the polyhedral regions Pk described by (5.5). If l modulus terms are in (5.6), there are 2l polyhedral regions where the map (5.6) is linear. Because the map is represented canonically with n + n2 + l(n + 1) real parameters, this is a very compact and explicit representation. Several examples of canonical PWL models for components are given in Section 5.3. y = |x|

x

FIGURE 5.5 The absolute value function y = x .

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Piecewise-Linear Circuits and Piecewise-Linear Analysis

5-5

i

+

v

v

0

− (a)

FIGURE 5.6 (a) The ideal diode and (b) the (i–v) relation of an ideal diode.

(b)

From Figure 5.5, it should be clear that the right and left derivative of y = x at 0 are different, their difference being 2. Hence, the Jacobian J+ and J– of (5.6) will be different on the boundary between the two neighboring polyhedral regions where (c ji − d j ) ≥ 0 and (c ji − d j ) ≤ 0 J + − J − = 2e jc Tj

(5.7)

Observe that this difference is a rank 1 matrix, which is also called a dyadic or outer vector product of ej and cj . Moreover, this difference is independent of the location of the independent variable i on the boundary. This important observation is made in [24], and is called the consistent variation property [10] and essentially says that the variation of the Jacobian of a canonical PWL representation is independent of the place where the hyperplane cj i – dj = 0 is crossed. Of course, this implies that the canonical PWL representation (5.6) is not the most general description for a continuous explicit PWL map. In [26] and [29] two more general representations, which include nested absolute values, are presented. These are too complicated for our discussion. Clearly, the canonical PWL representation (5.6) is valid only for single-valued functions. It can clearly not be used for an important component: the ideal diode (Figure 5.6) characterized by the multivalued (i, v) relation. It can be presented analytically by introducing a real scalar parameter ρ [31].

(

)

(5.8)

(

)

(5.9)

i=

1 ρ+ ρ 2

v=

1 ρ− ρ 2

This parametric description can easily be seen to correspond to Figure 5.6(b) because i = ρ and v = 0 for ρ ≥ 0, while i = 0 and v = ρ when ρ ≤ 0. Such a parametric description i = f (ρ) and v = g(ρ) with f and g PWL can be obtained for a whole class of unicursal curves (see[6]). When we allow implicit representations between v and i for a multiport, we obtain an LCP (linear complementarity problem) model (5.10)–(5.12) with an interesting state space like form [55]: v = Ai + Bu + f

(5.10)

s = Ci + Du + g

(5.11)

u ≥ 0, s ≥ 0, uT s = 0

(5.12)

where A∈ n ×n, B∈ n ×l, f∈ n ×n, c∈ l ×n, D∈ l ×l are the parameters that characterize the relationship between v and i. In the model, u and s are called the state vectors and we say that u ≥ 0 when all its components are nonnegative. Clearly, (5.12) dictates that all components of u and s should be nonnegative and that, whenever a component uj satisfies uj > 0, then sj = 0 and, vice versa, when sj > 0, then uj = 0.

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5-6

Nonlinear and Distributed Circuits

This is called the linear complementarity property, which we have seen already in the ideal diode (5.8) and (5.9) where i ≥ 0, v ≥ 0 and iv = 0. Hence, an implicit or LCP model for the ideal diode (5.8) and (5.9) is v =u

(5.13)

s=i

(5.14)

u ≥ 0 s ≥ 0 us = 0

(5.15)

In order to understand that the general equations (5.10)–(5.12) describe a PWL relation such as (5.4)–(5.5) between i and v over polyhedral regions, one should observe first that v = Ai + f is linear when u = 0 and s = Ci + g ≥ 0. Hence, the relation is linear in the polyhedral region determined by Ci + g ≥ 0. In general, one can consider 2l possibilities for u and s according to

(u ≥ 0 and s = 0) or (u j

j

j

)

= 0 and s j = 0 , for j = 1, 2, ..., l

Denote sets of indexes U and S for certain values of u and s satisfying (5.12)

{

}

(5.16)

{

}

(5.17)

U = j u j ≥ 0 and s j = 0 S = j u j = 0 and s j ≥ 0

then, clearly, U and S are complementary subsets of {1, 2, …, l} when for any j, uj , and sj cannot be both zero. Clearly, each of these 2l possibilities corresponds to a polyhedral region PU in n, which can be determined from u j ≥ 0, (Ci + Du + g ) j = 0 for j ∈U

(5.18)

u j = 0, (Ci + Du + g ) j ≥ 0 for j ∈S

(5.19)

The PWL map in region PU is determined by solving the uj for j ∈U from (5.18) and substituting these along with uj = 0 for j ∈S into (5.10). This generates, of course, a map that is linear in the region PU. When (5.11) is replaced by the implicit equation Es + Ci + Du + gα = 0 α ≥ 0 in (5.10)–(5.13), we call the problem a generalized linear complementarity problem (GLCP). A nontrivial example of an implicit PWL relation (LCP model) is the hysteresis one port resistor (see Figure 5.7). Its equations are:

P{2}

v 1

P{}

P{1}

0

1

Copyright © 2006 Taylor & Francis Group, LLC

i

FIGURE 5.7 The hysteresis nonlinear resistor.

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5-7

u1 v = −i + [−1 1] + 1 u2

(5.20)

s1 –1 –1 1 = i + s 2 1 1 –1 s1 ≥ 0, s 2 ≥ 0,

u1 1 + u2 0

u1 ≥ 0, u2 ≥ 0, u1s1 + u2s 2 = 0

(5.21)

(5.22)

In the first region P, we have s1 = −i + 1 ≥ 0, s 2 = i ≥ 0, and v = − i +1

(5.23)

The region P{1,2}, on the other hand, is empty because the following set of equations is contradictory: s1 = s 2 = 0,

− i – u1 + u2 + 1 = 0,

i +u1 − u2 = 0

(5.24)

The region P[1] is u1 ≥ 0,

s1 = −i − u1 + 1 = 0,

u2 = 0,

s 2 = i + u1 ≥ 0

(5.25)

Hence, u1 = –i + 1 and s2 = 1 and v = –i + i – 1 + 1 =0, while i ≤ 1. Finally, the region P[2] is u1 ≥ 0,

s1 = −i + u2 + 1 ≥ 0,

u2 ≥ 0,

s 2 = i − u2 = 0

Hence, u2 = i and s1 = 1 and v = −i + i + 1 = 1, while i ≥ 0

(5.26)

It is now easy to show in general that the canonical PWL representation is a special case of the LCP model. Just choose uj ≥ 0 and sj ≥ 0 for all j as follows:

(

)

(5.27)

(

)

(5.28)

c Tj i − d j =

1 u +s 2 j j

c Tj i − d j =

1 u −s 2 j j

then, u and s are complementary vectors, i.e., u≥0

s≥0

uT s = 0

Observe that the moduli in (5.6) can be eliminated with (5.27) to produce an equation of the form (5.10) and that (5.28) produces an equation of the form (5.11). More generally, it has been proven [36] that the implicit model includes all explicit models. Because it also includes the parametric models, one obtains the general hierarchy of models as depicted in Figure 5.8. A general remark should be made about all models that have been presented until now. Although the models have been given for resistive multiports where the voltages v at the ports are expressed in terms of the currents i, analogous equations can be given for the currents i in terms of the voltages, or hybrid

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Nonlinear and Distributed Circuits

explicit models with nested moduli [Güzelis, Göknar] [Kahlert, Chua]

implicit models LCP [van Bokhoven] GLCP [Vandenberghe e.a.]

canonical PWL model [Chua, Kang] satisfies constant variation property

parametric models [Chua, Kang]

FIGURE 5.8 The interrelation of the PWL models.

variables. It can even be adapted for piecewise linear capacitors, inductors, or memristors, where the variables are, respectively, q, v for capacitors, ϕ, i for inductors, and q, ϕ for memristors.

5.3

Piecewise-Linear Models for Electronic Components

In order to simulate nonlinear networks with a circuit or network simulator, the nonlinear behavior of the components must be modeled first. During this modeling phase, properties of the component that are not considered important for the behavior of the system may be neglected. The nonlinear behavior is often important, therefore, nonlinear models have to be used. In typical simulators such as SPICE, nonlinear models often involve polynomials and transcendental functions for bipolar and MOS transistors. These consume a large part of the simulation time, so table lookup methods have been worked out. However, the table lookup methods need much storage for an accurate description of multiports and complex components. The piecewise-linear models constitute an attractive alternative that is both efficient in memory use and in computation time. We discuss here the most important components. The derivation of a model usually requires two steps: first, the PWL approximation of constitutive equations, and second, the algebraic representation. Two PWL models for an ideal diode (Figure 5.6) have been derived, that is, a parametric model (5.8) and (5.9) and an implicit model (5.13)–(5.15), while a canonical PWL model does not exist. The piecewise-linear models for operational amplifiers (op amps) and operational transconductance amplifiers (OTA’s) are also simple and frequently used. The piecewise-line approximation of op amps and OTA’s of Figure 5.9 is quite accurate. It leads to the following representation for the op amp, which is in the linear region for – Esat ≤ v0 ≤ Esat with voltage amplification Av and positive and negative saturation Esat and –Esat v0 =

E Av E v + sat − v i − sat Av 2 i Av i− = i+ = 0

(5.29)

(5.30)

This is called the op amp finite-gain model. In each of the three regions, the op amp can be replaced by a linear circuit. For the OTA, we have similarly in the linear region for − I sat ≤ i0 ≤ I sat with transconductance gain gm and positive and negative saturation Isat and –Isat i0 =

Copyright © 2006 Taylor & Francis Group, LLC

I gm I v i + sat − v i − sat gm gm 2

(5.31)

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vo i

−

− vi +

−

Esat +

+ i

AV

vo

+

− Esat/AV

−

Esat/AV

vi

− Esat

(a)

io i

−

− vi +

−

gm

+

+ i

Isat

io

+

−Isat/gm

−

Isat/gm

vi

−Isat

(b)

FIGURE 5.9 (a) Op amp and PWL model and (b) OTA and PWL model.

i− = i+ = 0

(5.32)

Next, for a tunnel diode, one can perform a piecewise-linear approximation for the tunnel-diode characteristic as shown in Figure 5.10. It clearly has three regions with conductances g1, g2, and g3. This PWL characteristic can be realized by three components [(Figure 5.10(b)] with conductances, voltage sources, and diodes. The three parameters G0, G1, and G2 of Figure 5.10(b) must satisfy in Region 1:

G0 = g 1

(5.33)

in Region 2:

G0 + G1 = g 2

(5.34)

in Region 3:

G0 + G1 + G2 = g 3

(5.35)

Thus, G0 = g1, G1 = –g1 + g2, and G2 = –g2 + g3. We can derive the canonical PWL representation as follows: i=−

1 1 1 1 1 G1E1 + G2E 2 ) + G0 + G1 + G2 v + G1 v − E1 + G2 v − E 2 ( 2 2 2 2 2

(5.36)

Next, we present a canonical piecewise-linear bipolar transistor model [12]. Assume a npn bipolar transistor is connected in the common base configuration with v1 = vBE , v2 = vBC , i1 = iE , and i2 = iC , as shown in Figure 5.3. We consider data points in a square region defined by 0.4 ≤ v1 ≤ 0.7 and 0.4 ≤ v2 ≤ 0.7, and assume the terminal behavior of the transistor follows the Ebers–Moll equation; namely,

(

) (

)

(5.37)

(

) (

)

(5.38)

i1 =

I s v1 VT e − 1 − I s e v2 VT − 1 αf

i2 =

I s v2 VT e − 1 − I s e v1 VT − 1 αr

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Nonlinear and Distributed Circuits

i

g3 g2

(a) 0 E1

E2

v

g1

+ region 1

region 2

G1

region 3 v

G0

−

i

G2

E1

E2

G0 (c)

G2

(b)

E1 E2

v

G1

FIGURE 5.10 (a) Piecewise-linear approximation of the tunnel-diode characteristic. The three-segment approximation defines the three regions indicated. (b) Decomposition of the piecewise-linear characteristic (a) into three components, and (c) the corresponding circuit.

with Is = 10–14 A, VT = 26 mV, αf = 0.99, and αr = 0.5. In [12], the following canonical piecewise-linear model is obtained, which optimally fits the data points (Figure 5.11) i1 a1 b11 = + i 2 a 2 b12

b21 v1 c 11 + m1v1 − v 2 + t 1 b22 v 2 c 21

c 12 c 13 + m 2v1 − v 2 + t 2 + m3v1 − v 2 + t 3 c 22 c 23 where a1 5.8722 × 10 −3 b11 3.2392 × 10 −2 = = a2 −3.2652 × 10 −2 b21 −3.2067 × 10 −2 b12 −4.0897 × 10 −2 c11 3.1095 × 10 −6 = = b22 8.1793 × 10 −2 c 21 −3.0784 × 10 −6

Copyright © 2006 Taylor & Francis Group, LLC

(5.39)

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iE(mA)

iE(mA)

4.976 2.996 1.015 −0.965 −2.946 −4.926 0.70 0.64 0.58 0.52 0.46 vBE(Volt) 0.40

0.40 0.46 0.52 0.58 0.64 v (Volt) BC 0.70

4.032 2.428 0.824 −0.779 −2.383 −3.987 0.70 0.64 0.58 0.52 0.46 vBE(Volt)

0.70

0.4

(a)

0.40 0.46 0.52 0.58 0.64 vBC(Volt)

(b)

iC(mA)

iC(mA)

9.853 6.897 3.941 0.985 -1.971 -4.926 0.40 0.46 0.52 0.58 0.64 vBE(Volt) 0.70

0.70 0.64 0.58 0.52 0.46 v (Volt) BC 0.40

7.974 5.581 3.188 0.796 -1.597 -3.990 0.40 0.46 0.52 vBE(Volt) 0.58 0.64

0.70 0.64 0.58 0.52 vBC(Volt) 0.46 0.40

0.70

(c)

(d) IC (mA) I8 = 50µA

5

I8 = 40µA

4

I8 = 30µA

3

I8 = 20µA

2

I8 = 10µA

1 1 I8 = 10µA I8 = 10µA

−020 −015 −010 −005

I8 = 10µA I8 = 20µA I8 = 30µA I8 = 40µA I8 = 50µA

005 010 015 020

2

3

4

5

VCE (Volt)

VCE (Volt)

−20 −40 −60 −80 −100

IC (µA)

FIGURE 5.11 Three-dimensional plots for the emitter current in the Ebers-Moll model given by (5.37) and (5.38). (b) Three-dimensional plot for the emitter current in the canonical piecewise-linear model given by [10, (B.1)] (lowvoltage version). (c) Three-dimensional plot for the collector current in the Ebers-Moll model given by (5.37) and (5.38). (d) Three-dimensional plot for the collector current in the canonical piecewise-linear model given by [10, (B.1)] (low-voltage version). (e) Comparison between the family of collector currents in the Ebers-Moll model (dashed line) and the canonical piecewise-linear model (solid line). Source: L.O. Chua and A. Deng, “Canonical piecewise linear modeling,” IEEE Trans. Circuits Syst., vol. CAS-33, p. 519, 1986, IEEE.

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Nonlinear and Distributed Circuits

i2 + v1 −

i1

G

+ D v2 S −

FIGURE 5.12 2-port configuration of the MOSFET.

c12 −9.9342 × 10 −3 = −2 c 22 1.9868 × 10 m1 1.002 × 10 4 m2 = − 1.4 × 10 –4 m 1.574 × 10 –6 3

c13 −3.0471 × 10 −2 = −2 c 23 6.0943 × 10

t1 −6472 t 2 = 0.61714 t 0.66355 3

Next, a canonical piecewise-linear MOS transistor model is presented. Assume the MOS transistor is connected in the common source configuration with v1 = vGS , v2 = vDS , i1 = iG , and i2 = iD , as illustrated, in Figure 5.12, where both v1 , v 2 are in volts, and i1, i2 are in microamperes. The data points are uniformly spaced in a grid within a rectangular region defined by 0 ≤ v1 ≤ 5, and 0 ≤ v2 ≤ 5. We assume the data points follow the Shichman–Hodges model, namely, i1 = 0

[

]

i2 = k (v1 − Vt )v 2 − 0.5v 22 , if v1 − Vt ≥ v 2 or

[

]

i2 = 0.5k(v1 − Vt ) 1 + λ(v 2 − v1 + Vt ) , if v1 − Vt < v 2 2

(5.40)

with k = 50 µA/V 2, Vt = 1 V, λ = 0.02 V –1. Applying the optimization algorithm of [11], we obtain the following canonical piecewise-linear model (see Figure 5.13): i2 = a2 + b21v1 + b22v 2 + c 21 m1v1 − v 2 + t1 + c 22 m2v1 − v 2 + t 2 + c 23 m3v1 − v 2 + t 3

(5.41)

where a2 = −61.167,

b21 = 30.242,

b22 = 72.7925

c 21 = −49.718,

c 22 = −21.027,

c 23 = 2.0348

m1 = 0.8175,

m2 = 1.0171,

m3 = −23.406

t1 = −2.1052,

t 2 = −1.4652,

t 3 = 69

Finally, a canonical piecewise-linear model of GaAs FET is presented. The GaAs FET has become increasingly important in the development of microwave circuits and high-speed digital IC’s due to its fast switching speed.

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408.0 326.4 244.8 163.2 81.6 0

iD(µA)

MOSFET OUTPUT CHAR.

5 1

vGS(Volt)

500

4 2

3

vDS(Volt)

1

4

vGS = 5

375

0 iO(µA)

5 (a)

382.9 302.6 222.3 142.0 61.72 −18.57 0 1 vGS(Volt)

Eq. (4.39) Eq. (4.43)

3

2

iD(µA)

vGS = 4

250

vGS = 3

125

vGS = 2 0 0

1

5

2

3

2

4 5

0

1

4

5

vDS(Volts)

4 3

2

3

(c)

vDS(Volt)

(b)

FIGURE 5.13 (a) Three-dimensional plot of drain current from the Shichman–Hodges model. (b) Three-dimensional plot of the drain current from the canonical piecewise-linear model. (c) Family of drain currents modeled by (5.40) (dashed line) and (5.41) (solid line). Source: L. O. Chua and A. Deng, “Canonical piecewise-linear modeling,” IEEE Trans. Circuits Syst., vol. CAS-33, p. 520, 1986. 1986 IEEE.

i2 = a2 + b21v1 + b22v 2 + c 21 m1v1 − v 2 + t 2 + c 22 m2v1 − v 2 + t 2 + c 23 m3v1 − v 2 + t 3

(5.42)

where v1 = vGS (volt), v2 = vDS (volt), i2 – iD (mA), and a2 = 6.3645,

b21 = 2.4961,

b22 = 32.339

c 21 = 0.6008,

c 22 = 0.9819,

c 23 = −29.507

m1 = −19.594,

m2 = −6.0736,

m3 = 0.6473

t1 = −44.551,

t 2 = −8.9962,

t 3 = 1.3738

Observe that this model requires only three absolute-value functions and 12 numerical coefficients and compares rather well to the analytical model (Figure 5.14). More piecewise-linear models for timing analysis of logic circuits can be found in [21]. In the context of analog computer design, even PWL models of other nonlinear relationships have been derived in [51].

5.4

Structural Properties of Piecewise-Linear Resistive Circuits

When considering interconnections of PWL resistors (components), it follows from the linearity of KVL and KCL that the resulting multiport is also a piecewise-linear resistor. However, if the components have a canonical PWL representation, the resulting multiport may not have a canonical PWL representation. This can be illustrated by graphically deriving the equivalent one port of the series connection of two

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Nonlinear and Distributed Circuits

GaAs FET OUTPUT CHAR. 125 vGS = 0

100

iD(mA)

vGS = −0.5 75

vGS = −1.0 vGS = −1.5

50

vGS = −2.0

25

vGS = −2.5

0 0

1

2 3 vDS(Volt)

4

5

FIGURE 5.14 Comparison of the canonical piecewise-linear described by (5.42) (solid line) and the analytical model (dashed line) for the ion-implanted GaAs FET. Source: L. O. Chua and A. Deng, “Canonical piecewise-linear modeling,” IEEE Trans. Circuits Syst., vol. CAS-33, p. 522, 1986, 1986 IEEE.

(a)

(b) +

+

i

i1

v1 v

− +

−

−

i1 4 3

i2

2

2 1

0

(c)

i

i2

1

2

3

4

5

6 v1

(d)

4 3 2 1

0

1

2

3

4

v2

FIGURE 5.15 (a) The series connection of two tunnel diodes, (b) and (c), their i-v characteristics, and (d) the composite i–v plot, which consists of two unconnected parts.

tunnel diodes [3] (Figure 5.15). Both resistors have the same current, so we have to add the corresponding voltages v = v1 + v2 and obtain an i – v plot with two unconnected parts. Values of i correspond to 3 values of v1 for R1 and 3 values of v2 for R2, and hence to 9 values of the equivalent resistor [Figure 5.15(d)]. This illustrates once more that nonlinear circuits may have more solutions than expected at first sight.

Copyright © 2006 Taylor & Francis Group, LLC

v

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Although the two tunnel diodes R1 and R2 have a canonical PWL representation, the equivalent one port of their series connection has neither a canonical PWL voltage description, nor a current one. It, however, has a GLCP description because KVL, KCL, and the LCP of R1 and R2 constitute a GLCP. If the v-i PWL relation is monotonic, the inverse i-v function exists and then some uniqueness properties hold. These observations are, of course, also valid for the parallel connection of two PWL resistors and for more complicated interconnections. In Section 5.3 we illustrated with an example how a PWL one-port resistor can be realized with linear resistors and ideal diodes. This can be proven in general. One essentially needs a diode for each breakpoint in the PWL characteristic. Conversely, each one port with diodes and resistors is a PWL one port resistor. This brings us to an interesting class of circuits composed of linear resistors, independent sources, linear controlled sources, and ideal diodes. These circuits belong to the general class of circuits with PWL components [see Figure 5.1(a)] and can be described by GLCP equations. Such networks have not only shown their importance in analysis but also in the topologic study of the number of solutions and more general qualitative properties. When only short-circuit and open-circuit branches are present, one independent voltage source with internal resistance and ideal diodes, an interesting loop cut set exclusion property holds that is also called the colored branch theorem or the arc coloring theorem. It says that the voltage source either forms a conducting loop with forward-oriented diodes and some short circuits or there is a cut set of the voltage source, some open circuits, and blocking diodes. Such arguments have been used to obtain [23] topologic criteria for upper bounds of the number of solutions of PWL resistive circuits. In fact, diode resistor circuits have been used extensively in PWL function generators for analog computers [51]. These electrical analogs can also be used for mathematical programming problems (similar to linear programming) and have reappeared in the neural network literature.

5.5

Analysis of Piecewise-Linear Resistive Circuits

It is first demonstrated that all conventional network formulation methods (nodal, cut, set, hybrid, modified nodal, and tableau) can be used for PWL resistive circuits where the components are described with canonical or with LCP equations. These network equations may have one or more solutions. In order to find solutions, one can either search through all the polyhedral regions Pk by solving the linear equations for that region or by checking whether its solution is located inside that region Pk . Because many regions often exist, this is a time-consuming method, but several methods can be used to reduce the search [28], [61]. If one is interested in only one solution, one can use solution tracing methods, also called continuation methods or homotopy methods, of which the Katzenelson method is best known. If one is interested in all solutions, the problem is more complicated, but some algorithms exist.

Theorem Canonical PWL (Tableau Analysis) [8] Consider a connected resistive circuit N containing only linear two-terminal resistors, dc independent sources, current-controlled and voltage-controlled piecewise-linear two-terminal resistors, linear- and piecewise-linear-controlled sources (all four types) and any linear multiterminal resistive elements. A composite branch of this circuit is given in Figure 5.16. If each piecewise-linear function is represented in the canonical form (5.6), then the tableau formulation also has the canonical PWL form f ( x ) = a + Bx +

p

∑c α x − β i

T i

i

=0

(5.43)

i +1

where x = [i T, v T, v Tn ]T and i, respectively v, is the branch current voltage vector (Figure 5.16) and vn is the node-to-datum voltage vector.

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Nonlinear and Distributed Circuits

Îk +

ik + −

ˆ V k −

Vk

− Jk

+

Ek

FIGURE 5.16 A composite branch.

PROOF. Let A be the reduced incidence matrix of N relative to some datum node, then KCL, KVL, and element constitutive relations give Ai = AJ

(5.44)

v = AT v n + E

(5.45)

f I (i ) + f v (v ) = S

(5.46)

where we can express f1(·) and fv(·) in the canonical form (5.6)

(

f I (i ) = a1 + BI i + C I abs DlT e − e1

(

)

f v (v ) = av + Bvv + C vabs DvT v − e v

(5.47)

)

(5.48)

Substituting (5.47) and (5.48) into (5.46), we obtain A – AJ –E + 0 B a I + a v – S I abs

DI 0 0

0 DV 0

0 1 Bv 0 0 0

0 AT 0

i 0 v = 0 v n C I

i e I v − eV v n 0

= 0

0 0 Cv

0 0 0

(5.49)

Clearly, (5.49) is in the canonical form of (5.43). Of course, an analogous theorem can be given when the PWL resistors are given in LCP form. Then the tableau constitute a GLCP. Moreover, one can derive nodal, cut set, loop, hybrid, and modified nodal analysis from the tableau analysis by eliminating certain variables. Alternatively, one can also directly derive these equations. Whatever the description for the PWL components may be, one can always formulate the network equations as linear equations 0 = f ( x ) = ak + Bk x ,

Copyright © 2006 Taylor & Francis Group, LLC

x ∈ Pk

(5.50)

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in the polyhedral region Pk defined by (5.50). The map f is a continuous PWL map. A solution x of (5.50) can then be computed in a finite number of steps with the Katzenelson algorithm [4], [33], by tracing the map f from an initial point (x(1),y(1)) to a value (x*,0) (see Figure 5.18).

Algorithm STEP 1. Choose an initial point x(1) and determine its polyhedral region P (1), and compute

( )

y (1) = f x (1) = a(1) + B(1) x and set

j=1

STEP 2. Compute

( ) (0 − y ( ) )

xˆ = x ( j ) + B( j )

−1

j

(5.51)

ˆ = 0. Stop. STEP 3. If xˆ ∈P (j), we have obtained a solution xˆ of f (x) STEP 4. Otherwise, compute

(

x ( j +1) = x ( j ) + λ( j ) xˆ − x ( j )

)

(5.52)

where λ(j) is the largest number such that x ( j+1) ∈ P( j ) , i.e., x ( j+1) is on the boundary between P (j) and P (j+1) (see Figure 5.17). STEP 5. Identify P (j+1) and the linear map y = a (j+1) + B (j+1) x in the polyhedral region P (j+1) and compute

(

y ( j +1) = y ( j ) + λ( j ) y * − y ( j )

)

(5.53)

Set j = j + 1. Go step 2. f

x-space

y-space 0

x* y(3) x(3)

y(1)

x(2)

x(1)

y(2)

p(3)

p(2)

FIGURE 5.17 The iteration in the Katzenelson algorithm for solving y = f (x) = 0.

p(1)

x2

x1

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FIGURE 5.18 Simplicial subdivision.

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Nonlinear and Distributed Circuits

This algorithm converges to a solution in a finite number of steps if the determinants of all matrices B (j) have the same sign. This condition is satisfied when the i-v curves for the PWL one port resistors are monotonic. The Katzenelson algorithm was extended in [45] by taking the sign of the determinants into account in (5.52) and (5.53). This requires the PWL resistors to be globally coercive. If by accident in the iteration the point x (j+1) is not on a single boundary and instead is located on a corner, the region P (j+1) is not uniquely defined. However, with a small perturbation [1], one can avoid this corner and still be guaranteed to converge. This algorithm was adapted to the canonical PWL equation (5.49) in [8]. It can also be adapted to the GLCP. However, there exist circuits where this algorithm fails to converge. For the LCP problem, one can then use other algorithms [20], [40], [56]. One can also use other homotopy methods [43], [57], [60], which can be shown to converge based on eventual passivity arguments. In fact, this algorithm extends the rather natural method of source stepping, where the PWL circuit is solved by first making all sources zero and then tracing the solution for increasing (stepping up) the sources. It is instructive to observe here that these methods can be used successfully in another sequence of the steps in Figure 5.1(a). Until now, we always first performed the horizontal step of PWL approximation or modeling and then the vertical step of network equation formulation. With these methods, one can first perform the network equation formulation and then the PWL approximation. The advantage is that one can use a coarser grid in the simplicial subdivision far away from the solution, and hence dynamically adapt the accuracy of the PWL approximation. In any case, if all solutions are requested, all these homotopy-based methods are not adequate, because not all solutions can be found even if the homotopy method is started with many different x (1). Hence, special methods have been designed. It is beyond the scope of this text to give a complete algorithm [39], [59], but the solution of the GLCP basically involves two parts. First, calculate the solution set of all nonnegative solutions to (5.10) and (5.11). This is a polyhedral cone where extremal rays can be easily determined [44], [54]. Second, this solution set is intersected with a hyperplane and the complementarity condition uTs = 0 implies the elimination of vertices (respectively, convex combinations) where this complementarity (respectively, cross complementarity) is not satisfied. This allows for the complete solution set for the circuit of Figure 5.15 and for circuits with infinitely many solutions. A more recent method [46] covers the PWL i-v characteristic with a union of polyhedra and hierarchically solves the circuit with finer and finer polyhedra. An important improvement in efficiency for the methods is possible when the PWL function f(·) is separable, i.e., there exist f i : → n i = 1, 2, …, n such that f (x ) =

n

∑ f (x ) i

i

(5.54)

i =1

This happens when there are only two terminal PWL resistors, linear resistors, and independent sources, and if the bipolar transistors are modeled by the Ebers–Moll model [see (5.39)]. Then, the subdivision for x is rectangular and each rectangle is subdivided into simplices (see Figure 5.18). This property can be used to eliminate certain polyhedral regions without solutions [62] and also to speed up the Katzenelson-type algorithm [60], [62]. If there are MOS transistors, the map f is not separable but one can apply the extended concept of pairwise separable map [62].

5.6

Piecewise-Linear Dynamic Circuits

As mentioned at the end of Section 5.2, the piecewise linear descriptions of Section 5.2 can be used also for PWL capacitors, respectively, inductors and memristors, by replacing the port voltages v and currents i by q, v, respectively, ϕ, i and ϕ, q. Whenever we have a network obtained by interconnecting linear and/or PWL resistors, inductors, capacitors, and memristors, we have a dynamic piecewise-linear circuits.

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Of course, such networks are often encountered because they include the networks with linear R, L, C, and linear dependent sources, diodes, switches, op amps, and components such as bipolar and MOS transistors, and GaAs FET’s with PWL resistive models. This includes several important and famous nonlinear circuits such as Chua’s circuit [18], [19], and the cellular neural networks (CNN’s) [48], which are discussed in Chapter 7 and Chapter 8, Section 8.2. Of course, PWL dynamic circuits are much more interesting and much more complicated and can exhibit a much more complex behavior than resistive circuits and hence this subject is much less explored. It is clear from the definition of a PWL dynamic circuit that it can be described by linear differential equations over polyhedral regions. Hence, it can exhibit many different types of behavior. It may have many equilibria, which can essentially be determined by solving the resistive network (see Section 5.5 and Figure 5.1) obtained by opening the capacitive ports and short circuiting the inductive ports (dc analysis). When there is no input waveform, the circuit is said to be autonomous and has transients. Some transients may be periodic and are called limit cycles but they may also show chaotic behavior. Next, one may be interested in the behavior of the circuit for certain input waveforms (transient analysis). This can be performed by using integration rules in simulations. For the analysis of limit cycles, chaos, and transients, one can, of course, use the general methods for nonlinear circuits, but some improvements can be made based on the PWL nature of the nonlinearities. Here, we only describe the methods briefly. If one is interested in the periodic behavior of a PWL dynamic circuit (autonomous or with a periodic input), then one can, for each PWL nonlinearity, make some approximations. First, consider the case that one is only interested in the dc and fundamental sinusoidal contributions in all signals of the form i(t) = A0 + A1 cos ωt. The widely used describing function method [6] for PWL ˆ = D0 + D1 resistors v = f(i) consists of approximating this resistor by an approximate resistor where v(t) cos ωt has only the dc and fundamental contribution of v(t). This is often a good approximation since the remainder of the circuit often filters out all higher harmonics anyway. Using a Fourier series, one can then find D0 and D1 as D0 ( A0 , A1 ) =

1 2π

2π

∫ f ( A + A cos φ)dφ

1 D1 ( A0 , A1 ) = πA1

0

1

0

2π

∫ f ( A + A cos φ)dφ 0

1

0

By replacing all PWL components by their describing functions, one can use linear methods to set up the network equations in the Laplace–Fourier domain. When this approximation is not sufficient, one can include more harmonics. Then, one obtains the famous harmonic balance method, because one is balancing more harmonic components. Alternatively, one can calculate the periodic solution by simulating the circuit with a certain initial condition and considering the map F: x0 → x1 from the initial condition x0 to the state x1 one period later. Of course, a fixed point x* = F(x*) of the map corresponds to a periodic solution. It has been demonstrated [27] that the map F is differentiable for PWL circuits. This is very useful in setting up an efficient iterative search for a fixed point of F. This map is also useful in studying the eventual chaotic behavior and is then called the Poincaré return map. In transient analysis of PWL circuits, one is often interested in the sensitivity of the solution to certain parameters in order to optimize the behavior. As a natural extension of the adjoint network for linear circuits in [22], the adjoint PWL circuit is defined and used to determine simple sensitivity calculations for transient analysis. Another important issue is whether the PWL approximation of a nonlinear characteristic in a dynamic circuit has a serious impact on the transient behavior. In [63], error bounds were obtained on the differences of the waveforms.

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5.7

Nonlinear and Distributed Circuits

Efficient Computer-Aided Analysis of PWL Circuits

Transient analysis and timing verification are an essential part of the VLSI system design process. The most reliable way of analyzing the timing performance of a design is to use analog circuit analysis methods. Here as well, a set of algebraic-differential equations has to be solved. This can be done by using implicit integration formulas that convert these equations into a set of algebraic equations, which can be solved by iterative techniques like Newton–Raphson (see Chapter 6). The computation time then becomes excessive for large circuits. It mainly consists of linearizations of the nonlinear component models and the solution of the linear equations. In addition, the design process can be facilitated substantially if this simulation tool can be used at many different levels from the top level of specifications over the logic and switch level to the circuit level. Such a hierarchical simulator can support the design from top to bottom and allow for mixtures of these levels. In limited space, we describe here the main simulation methods for improving the efficiency and supporting the hierarchy of models with piecewise-linear methods. It is clear from our previous discussion that PWL models and circuit descriptions can be used at many different levels. An op amp, for example, can be described by the finite gain model [see Figure 5.9 and (5.29) and (5.30)], but when it is designed with a transistor circuit it can be described by PWL circuit equations as in Section 5.5. Hence, it is attractive to use a simulator that can support this top-down design process [35]. One can then even incorporate logic gates into the PWL models. One can organize the topological equations of the network hierarchically, so that it is easy to change the network topology. The separation between topological equations and model descriptions allows for an efficient updating of the model when moving from one polyhedral region into another. Several other efficiency issues can be built into a hierarchical PWL simulator. An important reduction in computation time needed for solving the network equations can be obtained by using the consistent variation property. In fact, only a rank one difference exists between the matrices of two neighboring polyhedral regions, and hence, one inverse can be easily derived from the other [8], [35]. In the same spirit, one can at the circuit level take advantage of the PWL transistor models (see [62] and separability discussion in Section 2.5). In [53], the circuit is partitioned dynamically into subcircuits during the solution process, depending on the transistor region of operation. Then, the subcircuits are dynamically ordered and solved with block Gauss–Seidel for minimal or no coupling among them. Interesting savings can be obtained [34] by solving the linear differential equations in a polyhedral region with Laplace transformations and by partitioning the equations. However, the computation of the intersection between trajectories in neighboring polyhedral regions can be a disadvantage of this method.

Acknowledgment This work was supported by the Research Council Kuleuven Project MEFISTO666GOA.

References [1] M. J. Chien, “Piecewise-linear homeomorphic resistive networks,” IEEE Trans. Circuits Syst., vol. CAS-24, pp. 118–127, Mar. 1977. [2] M. J. Chien and E. S. Kuh,”Solving nonlinear resistive network using piecewise-linear analysis and simplicial subdivision,” IEEE Trans. Circuits Syst., vol. CAS-24, pp. 305–317, 1977. [3] L. O. Chua, “Analysis and synthesis of multivalued memoryless nonlinear networks,” IEEE Trans. Circuit Theory, vol. CT-14, pp. 192–209, June 1967. [4] L. O. Chua and P. M. Lin, Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques, Englewood Cliffs, NJ: Prentice Hall, 1975.

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[5] L. O. Chua and P. M. Lin, “A switching-parameter algorithm for finding multiple solutions of nonlinear resistive circuits,” Int. J. Circuit Theory, Appl., vol. 4, pp. 215–239, 1976. [6] L. O. Chua and S. M. Kang, “Section-wise piecewise-linear functions: Canonical representation properties and applications,” Proc. IEEE, vol. 65, pp. 915–929, June 1977. [7] L. O. Chua and D. J. Curtin, “Reciprocal n-port resistor represented by continuous n-dimensional piecewise-linear function realized by circuit with 2-terminal piecewise-linear resistor and p+g port transformer,” IEEE Trans. Circuits Syst., vol. CAS-27, pp. 367–380, May 1980. [8] L. O. Chua and R. L. P. Ying, “Finding all solutions of piecewise-linear circuits,” Int. J. Circuit Theory, Appl., vol. 10, pp. 201–229, 1982. [9] L. O. Chua and R. L. P. Ying, “Canonical piecewise-linear analysis,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 125–140, 1983. [10] L. O. Chua and A C. Deng, “Canonical piecewise-linear analysis — Part II: Tracing driving-point and transfer characteristics,” IEEE Trans. Circuits Syst., vol. CAS-32, pp. 417–444, May 1985. [11] L. O. Chua and A. C. Deng, “Canonical piecewise-linear modeling, unified parameter optimization algorithm: Application to pn junctions, bipolar transistors, MOSFETs, and GaAs FETs, IEEE Trans. Circuits Syst.,vol. CAS-33, pp. 511–525, May 1986. [12] L. O. Chua and A. C. Deng, “Canonical piecewise linear modeling,” IEEE Trans. Circuits Syst., vol. CAS-33, pp. 511–525, May 1986. [13] L. O. Chua and A. C. Deng, “Canonical piecewise linear analysis: Generalized breakpoint hopping algorithm,” Int. J. Circuit Theory, Appl., vol. 14, pp. 35–52, 1986. [14] L. O. Chua and A. C. Deng, “Canonical piecewise linear representation,” IEEE Trans. Circuits Syst., vol. 35, pp. 101–111, Jan. 1988. [15] L. O. Chua and A. C. Deng, “Canonical piecewise-linear modeling,” ERL Memo. UCB/ERL M85/35, Univ. California, Berkeley, April 26, 1985. [16] L. O. Chua and G. Lin, “Canonical realization of Chua’s circuit family,” IEEE Trans. Circuits Syst., vol. 37, pp. 885–902, July 1990. [17] L. O. Chua and G. Lin, “Intermittency in piecewise-linear circuit,” IEEE Trans. Circuits Syst., vol. 38, pp. 510–520, May 1991. [18] L. O. Chua, “The genesis of Chua’s circuit,” Archiv Elektronik Übertragungstechnik, vol. 46, no. 4, pp. 250–257, 1992. [19] L. O. Chua, C.-W. Wu, A.-S. Huang, and G.-Q. Zhong, “A Universal circuit for studying and generating chaos,” IEEE Trans. Circuits Syst. I, vol. 40, no. 10, pp. 732–744, 745–761, Oct. 1993. [20] R. Cottle, J.-S. Pang, and R. Stone, The Linear Complementarity Problem, New York: Academic Press, 1992. [21] A. C. Deng, “Piecewise-linear timing model for digital CMOS circuits,” IEEE Trans. Circuits Syst., vol. 35, pp. 1330–1334, Oct. 1988. [22] Y. Elcherif and P. Lin, “Transient analysis and sensitivity computation in piecewise-linear circuits,” IEEE Trans. Circuits Syst., vol. 36, pp. 1525–1533, Dec. 1988. [23] M. Fossepréz, M. J. Hasler, and C. Schnetzler, “On the number of solutions of piecewise-linear resistive circuits,” IEEE Trans. Circuits Syst., vol. 36, pp. 393–402, March 1989. [24] T. Fujisawa, E. S. Kuh, “Piecewise-linear theory of nonlinear networks,” SIAM J. Appl. Math., vol. 22, no. 2, pp. 307–328, March 1972. [25] T. Fujisawa, E. S. Kuh, and T. Ohtsuki, “A sparse matrix method for analysis of piecewise-linear resistive circuits,” IEEE Trans. Circuit Theory, vol.19, pp. 571–584, Nov. 1972. [26] G. Güzelis and I. Göknar, “A canonical representation for piecewise affine maps and its applications to circuit analysis,” IEEE Trans. Circuits Syst., vol. 38, pp. 1342–1354, Nov. 1991. [27] I. N. Hajj and S. Skelboe, “Dynamic systems: Steady-state analysis,” IEEE Trans. Circuits Syst., vol. CAS-28, pp. 234–242, March 1981. [28] Q. Huang and R. W. Liu, “A simple algorithm for finding all solutions of piecewise-linear networks,” IEEE Trans. Circuits Syst., vol. 36, pp. 600–609, April 1989.

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[29] C. Kahlert and L. O. Chua, “A generalized canonical piecewise-linear representation,” IEEE Trans. Circuits Syst., vol. 37, pp. 373–383, March 1990. [30] C. Kahlert and L. O. Chua, “Completed canonical piecewise-linear representation: Geometry of domain space,” IEEE Trans. Circuits Syst., vol. 39, pp. 222–236, March 1992. [31] S. M. Kang and L. O. Chua, “A global representation of multidimensional piecewise-linear functions with linear partitions,” IEEE Trans. Circuits Syst., vol. CAS-25, pp. 938–940, Nov. 1978. [32] S. Karamardian, “The complementarity problem,” Mathemat. Program., vol. 2, pp. 107–129, 1972. [33] S. Karamardian and J. Katzenelson, “An algorithm for solving nonlinear resistive networks,” Bell Syst. Tech. J., vol. 44, pp. 1605–1620, 1965. [34] R. J. Kaye and A. Sangiovanni-Vincentelli, “Solution of piecewise-linear ordinary differential equations using waveform relaxation and Laplace transforms,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 353–357, June 1983. [35] T. A. M. Kevenaar and D. M. W. Leenaerts, “A flexible hierarchical piecewise-linear simulator,” Integrat., VLSI J., vol. 12, pp. 211–235, 1991. [36] T. A. M. Kevenaar and D. M. W. Leenaerts, “A comparison of piecewise-linear model descriptions,” IEEE Trans. Circuits Syst., vol. 39, pp. 996–1004, Dec. 1992. [37] M. Kojima and Y. Yamamoto, “Variable dimension algorithms: Basic theory, interpretations and extensions of some existing methods,” Mathemat. Program., vol. 24, pp. 177–215, 1982. [38] S. Lee and K. Chao, “Multiple solution of piecewise-linear resistive networks,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 84–89, Feb. 1983. [39] D. M. W. Leenaerts and J. A. Hegt, “Finding all solutions of piecewise-linear functions and the application to circuits design,” Int. J. Circuit Theory, Appl., vol. 19, pp. 107–123, 1991. [40] C. E. Lemke, “On complementary pivot theory,” in Nonlinear Programming, J. B. Rosen, O. L. Mangasarian, and K. Ritten, Eds., New York: Academic Press, 1968, pp. 349–384. [41] J. Lin and R. Unbehauen, “Canonical piecewise-linear approximations,” IEEE Trans. Circuits Syst., vol. 39, pp. 697–699, Aug. 1992. [42] R. Lum and L. O. Chua, “Generic properties of continuous piecewise-linear vector fields in 2-D space,” IEEE Trans. Circuits Syst., vol. 38, pp. 1043–1066, Sep. 1991. [43] R. Melville, L. Trajkovic, S.-C. Fang, and L. Watson, “Artificial homotopy methods for the DC operating point problem,” IEEE Trans Comput.-Aided Design Integrat. Circuits Syst., vol. 12, pp. 861–877, June 1993. [44] T. S. Motzkin, H. Raiffa, G. L. Thompson, and R. M. Thrall, “The double description method,” in Contributions to the Theory of Games, Ann. Mathemat. Studies, H.W. Kuhn and A.W. Tucker, Eds., Princeton: Princeton Univ. Press, 1953, pp. 51–73. [45] T. Ohtsuki, T. Fujisawa, and S. Kumagai, “Existence theorem and a solution algorithm for piecewiselinear resistor circuits,” SIAM J. Math. Anal., vol. 8, no. 1, pp. 69–99, 1977. [46] S. Pastore and A. Premoli, “Polyhedral elements: A new algorithm for capturing all the equilibrium points of piecewise-linear circuits,” IEEE Trans. Circuits Syst. I., vol. 40, pp. 124–132, Feb. 1993. [47] V. C. Prasad and V. P. Prakash, “Homeomorphic piecewise-linear resistive networks,” IEEE Trans. Circuits Syst., vol. 35, pp. 251–253, Feb. 1988. [48] T. Roska and J. Vandewalle, Cellular Neural Networks, New York: John Wiley & Sons, 1993. [49] I. W. Sandberg, “A note on the operating-point equations of semiconductor-device networks,” IEEE Trans. Circuits Syst., vol. 37, p. 966, July 1990. [50] A. S. Solodovnikov, System of Linear Inequalities, translated by L. M. Glasser and T. P. Branson, Chicago: Univ. Chicago, 1980. [51] T. E. Stern, Theory of Nonlinear Networks and Systems: An Introduction, Reading, MA: AddisonWesley, 1965. [52] S. Stevens and P.-M. Lin, “Analysis of piecewise-linear resistive networks using complementary pivot theory,” IEEE Trans Circuits Syst., Vol. CAS-28, pp. 429–441, May 1981. [53] O. Tejayadi and I. N. Hajj, “Dynamic partitioning method for piecewise-linear VLSI circuit simulation,” Int. J. Circuit Theory, Appl., vol. 16, pp. 457–472,1988.

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[54] S. N. Tschernikow, Lineare Ungleichungen. Berlin: VEB Deutscher Verlag der Wissenschaften, 1971; translation from H. Weinert and H. Hollatz, Lineinye Neravenstva, 1968, into German. [55] W. M. G. van Bokhoven, Piecewise-Linear Modelling and Analysis. Deventer: Kluwer Academic, 1980. [56] C. Van de Panne, “A complementary variant of Lemke’s method for the linear complementary problem,” Mathemat. Program., vol. 7, pp. 283–310, 1974. [57] L. Vandenberghe and J. Vandewalle, “Variable dimension algorithms for solving resistive circuits,” Int. J. Circuit Theory Appl., vol. 18, pp. 443–474, 1990. [58] L. Vandenberghe and J. Vandewalle, “A continuous deformation algorithm for DC-analysis of active nonlinear circuits,” J. Circuits, Syst., Comput., vol. 1, pp. 327–351, 1991. [59] L. Vandenberghe, B. L. De Moor, and J. Vandewalle, “The generalized linear complementarity problem applied to the complete analysis of resistive piecewise-linear circuits,” IEEE Trans. Circuits Syst., vol. 36, pp. 1382–1391, 1989. [60] K. Yamamura and K. Horiuchi, “A globally and quadratically convergent algorithm for solving resistive nonlinear resistive networks,” IEEE Trans. Computer-Aided Design Integrat. Circuits Syst., vol. 9, pp. 487–499, May 1990. [61] K. Yamamura and M. Ochiai, “Efficient algorithm for finding all solutions of piecewise-linear resistive circuits,” IEEE Trans. Circuits Syst., vol. 39, pp. 213–221, March 1992. [62] K. Yamamura, “Piecewise-linear approximation of nonlinear mappings containing Gummel-Poon models or Shichman-Hodges models,” IEEE Trans. Circuits Syst., vol. 39, pp. 694–697, Aug. 1992. [63] M. E. Zaghloul and P. R. Bryant, “Nonlinear network elements: Error bounds,” IEEE Trans. Circuits Syst., vol. CAS-27, pp. 20–29, Jan. 1980.

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6 Simulation 6.1 6.2

Erik Lindberg

6.3

Technical University of Denmark

Numerical Solution of Nonlinear Algebraic Equations....... 6-2 Numerical Integration of Nonlinear Differential Equations ............................................................................. 6-3 Use of Simulation Programs .............................................. 6-4 SPICE • APLAC • NAP2 • ESACAP • DYNAST

This chapter deals with the simulation or analysis of a nonlinear electrical circuit by means of a computer program. The program creates and solves the differential-algebraic equations of a model of the circuit. The basic tools in the solution process are linearization, difference approximation, and the solution of a set of linear equations. The output of the analysis may consist of (1) all node and branch voltages and all branch currents of a bias point (dc analysis); (2) a linear small-signal model of a bias point that may be used for analysis in the frequency domain (ac analysis); or (3) all voltages and currents as functions of time in a certain time range for a certain excitation (transient analysis). A model is satisfactory if there is good agreement between measurements and simulation results. In this case, simulation may be used instead of measurement for obtaining a better understanding of the nature and abilities of the circuit. The crucial point is to set up a model that is as simple as possible, in order to obtain a fast and inexpensive simulation, but sufficiently detailed to give the proper answer to the questions concerning the behavior of the circuit under study. Modeling is the bottleneck of simulation. The model is an equivalent scheme — “schematics-capture” — or a branch table — “net-list” — describing the basic components (n-terminal elements) of the circuit and their connection. It is always possible to model an n-terminal element by means of a number of 2-terminals (branches). These internal 2-terminals may be coupled. By pairing the terminals of an n-terminal element, a port description may be obtained. The branches are either admittance branches or impedance branches. All branches may be interpreted as controlled sources. An admittance branch is a current source primarily controlled by its own voltage or primarily controlled by the voltage or current of another branch (transadmittance). An impedance branch is a voltage source primarily controlled by its own current or primarily controlled by the current or voltage of another branch (transimpedance). Control by signal (voltage or current) and control by time-derivative of signal is allowed. Control by several variables is allowed. Examples of admittance branches are (1) the conductor is a current source controlled by its own voltage; (2) the capacitor is a current source sontrolled by the time-derivative of its own voltage; and (3) the open circuit is a zero-valued current source (a conductor with value zero). Examples of impedance branches are (1) the resistor is a voltage source controlled by its own current; (2) the inductor is a voltage source controlled by the time-derivative of its own current; and (3) the short circuit is a zero-valued voltage source (a resistor with value zero). A component may often be modeled in different ways. A diode, for example, is normally modeled as a current source controlled by its own voltage such that the model can be linearized into a dynamic conductor in parallel with a current source during the iterative process of finding the bias point of the diode. The diode may also be modeled as (1) a voltage source controlled by its own current (a dynamic resistor in series with a voltage source); (2) a static conductor being a function of the voltage across the

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Nonlinear and Distributed Circuits

diode; or (3) a static resistor being a function of the current through the diode. Note that in the case where a small signal model is wanted, for frequency analysis, only the dynamic model is appropriate. The primary variables of the model are the currents of the impedance branches and the node potentials. The current law of Kirchhoff (the sum of all the currents leaving a node is zero) and the current-voltage relations of the impedance branches are used for the creation of the equations describing the relations between the primary variables of the model. The contributions to the equations from the branches are taken one branch at a time based on the question: will this branch add new primary variables? If yes, then a new column (variables) and a new row (equations) must be created and updated, or else the columns and rows corresponding to the existing primary variables of the branch must be updated. This approach to equation formulation is called the extended nodal approach or the modified nodal approach (MNA). In the following, some algorithms for solving a set of nonlinear algebraic equations and nonlinear differential equations are briefly described. Because we are dealing with physical systems and because we are responsible for the models, we assume that at least one solution is possible. The zero solution is, of course, always a solution. It might happen that our models become invalid if we, for example, increase the amplitudes of the exciting signals, diminish the risetime of the exciting signals, or by mistake create unstable models. It is important to define the range of validity for our models. What are the consequences of our assumptions? Can we believe in our models?

6.1

Numerical Solution of Nonlinear Algebraic Equations

Let the equation system to be solved be f (x,u) = 0, where x is the vector of primary variables and u is the the excitation vector. Denote the solution by xs. Then, if we define a new function g(x) = α(f (x,u)) + x, where α may be some function of f (x,u), which is zero for f (x,u) = 0, then we can define an iterative scheme where g(x) converges to the solution xs by means of the iteration: xk+1 = g(xk) = α( f (xk ,u)) + xk where k is the iteration counter. If for all x in the interval [xa , xb ] the condition g(xa) – g(xb) ≤ L ∗ xa – xb for some L < 1 is satisfied, the iteration is called a contraction mapping. The condition is called a Lipschitz condition. Note that a function is a contraction if it has a derivative less than 1. For α = –1, the iterative formula becomes: xk+1 = g(xk) = –f (xk ,u) + xk . This scheme is called the Picard method, the functional method, or the contraction mapping algorithm. At each step, each nonlinear component is replaced by a linear static component corresponding to the solution xk . A nonlinear conductor, for example, is replaced by a linear conductor defined by the straight line through the origin and the solution point. Each iterative solution is calculated by solving a set of linear equations. All components are updated and the next iteration is made. When two consecutive solutions are within a prescribed tolerance, the solution point is accepted. For α = –1/(df /dx), the iterative formula becomes: xk+1 = g(xk) = –f (xk ,u)/(df (xk ,u)/dx) + xk . This scheme is called the Newton–Raphson method or the derivative method. At each step, each nonlinear component is replaced by a linear dynamic component plus an independent source corresponding to the solution xk. A nonlinear conductor, for example, is replaced by a linear conductor defined by the derivative of the branch current with respect to the branch voltage (the slope of the nonlinearity) in parallel with a current source corresponding to the branch voltage of the previous solution. A new solution is then caculated by solving a set of linear equations. The components are updated and the next iteration is made. When the solutions converge within a prescribed tolerance, the solution point is accepted. It may, of course, happen that the previously mentioned iterative schemes do not converge before the iteration limit kmax is reached. One reason may be that the nonlinearity f (x) changes very rapidly for a small change in x. Another reason could be that f (x) possess some kind of symmetry that causes cycles in the Newton–Raphson iteration scheme. If convergence problems are detected, the iteration scheme can be modified by introducing a limiting of the actual step size. Another approach may be to change the modeling of the nonlinear branches from voltage control to current control or vice versa. Often, the user of a circuit analysis program may be able to solve convergence problems by means of proper modeling and adjustment of the program options [1, 2, 3, 8, 11].

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Simulation

6.2

6-3

Numerical Integration of Nonlinear Differential Equations

The dynamics of a nonlinear electronic circuit may be described by a set of coupled first order differential equations–algebraic equations of the form: dx/dt = f (x, y, t) and g(x, y, t) = 0, where x is the vector of primary variables (node potentials and impedance branch currents), y is the vector of variables that cannot be explicitly eliminated, and f and g are nonlinear vector functions. It is always possible to express y as a function of x and t by inverting the function g and inserting it into the differential equations such that the general differential equation form dx/dt = f(x, t) is obtained. The task is then to obtain a solution x(t) when an initial value of x is given. The usual methods for solving differential equations reduce to the solution of difference equations, with either the derivatives or the integrals expressed approximately in terms of finite differences. Assume, at a given time t0, we have a known solution point x0 = x(t0). At this point, the function f can be expanded in Taylor series: dx/dt = f(x0, t) + A(x0)(x – x0) + … where A(x0) is the Jacobian of f evaluated at x0. Truncating the series, we obtain a linearization of the equations such that the small-signal behavior of the circuit in the neighborhood of x0 is described by dx/dt = A ∗ x + k, where A is a constant matrix equal to the Jacobian and k is a constant vector. The most simple scheme for the approximate solution of the differential equation dx/dt = f(x, t) = Ax + k is the forward Euler formula x(t) = x(t0) + hA(t0) where h = t – t0 is the integration time step. From the actual solution point at time t0, the next solution point at time t is found along the tangent of the solution curve. It is obvious that we will rapidly leave the vicinity of the exact solution curve if the integration step is too large. To guarantee stability of the computation, the time step h must be smaller than 2/λ where λ is the largest eigenvalue of the Jacobian A. Typically, h must not exceed 0.2/λ. The forward Euler formula is a linear explicit formula based on forward Taylor expansion from t0. If we make backward Taylor expansion from t we arrive at the backward Euler formula: x(t) = x(t0) + hA(t). Because the unknown appears on both sides of the equation, it must in general be found by iteration so the formula is a linear implicit formula. From a stability point of view, the backward Euler formula has a much larger stability region than the forward Euler formula. The truncation error for the Euler formulas is of order h2. The two Euler formulas can be thought of as polynomials of degree one that approximate x(t) in the interval [t0, t]. If we compute x(t) from a second-order polynomial p(t) that matches the conditions that p(t0) = x(t0), dp/dt(t0) = dx/dt(t0) and dp/dt(t) = dx/dt(t), we arrive at the trapezoidal rule: x(t) = x(t0) + 0.5hA(t0) + 0.5hA(t). In this case, the truncation error is of order h3. At each integration step, the size of the local truncation error can be estimated. If it is too large, the step size must be reduced. An explicit formula such as the forward Euler may be used as a predictor giving a starting point for an implicit formula like the trapezoidal, which in turn is used as a corrector. The use of a predictor-corrector pair provides the base for the estimate of the local truncation error. The trapezoidal formula with varying integration step size is the main formula used in the SPICE program. The two Euler formulas and the trapezoidal formula are special cases of a general linear multistep formula Σ(aixn–i + bi h(dx/dt)n–i), where i goes from –1 to m – 1 and m is the degree of the polynomial used for the approximation of the solution curve. The trapezoidal rule, for example, is obtained by setting a–1 = –1, a0 = +1 and b–1 = b0 = 0.5, all other coefficients being zero. The formula can be regarded as being derived from a polynomial of degree r which matches r + 1 of the solution points xn-i and their derivatives (dx/dt)n–i . Very fast transients often occur together with very slow transients in electronic circuits. We observe widely different time constants. The large spread in component values, for example, from large decoupling capacitors to small parasitic capacitors, implies a large spread in the modules of the eigenvalues. We say that the circuits are stiff. A family of implicit multistep methods suitable for stiff differential equations has been proposed by C.W. Gear. The methods are stable up to the polynomial of order 6. For example, the second-order Gear formula for fixed integration step size h may be stated as: xn+1 = –(1/3)xn–1 + (4/3)xn + (2/3)h(dx/dt)n+1. By changing both the order of the approximating polynomial and the integration step size, the methods adapt themselves dynamically to the performance of the solution curve. The family of Gear formulas is

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Nonlinear and Distributed Circuits

modified into a “stiff-stable variable-order variable-step predictor-corrector” method based on implicit approximation by means of backward difference formulas (BDFs). The resulting set of nonlinear equations is solved by modified Newton–Raphson iteration. Note that numerical integration, in a sense, is a kind of low-pass filtering defined by means of the minimum integration step [1, 2, 3, 8, 11].

6.3

Use of Simulation Programs

Since 1960, a large number of circuit-simulation programs have been developed by universities, industrial companies, and commercial software companies. In particular, the SPICE program has become a standard simulator both in the industry and in academia. Here, only a few programs, which together cover a very large number of simulation possibilities, are presented. Due to competition, there is a tendency to develop programs that are supposed to cover any kind of analysis so that only one program should be sufficient (“the Swiss Army Knife Approach”). Unfortunately this implies that the programs become very large and complex to use. Also, it may be difficult to judge the correctness and accuracy of the results of the simulation having only one program at your disposal. If you try to make the same analysis of the same model with different programs, you will frequently see that the results from the programs may not agree completely. By comparing the results, you may obtain a better feel for the correctness and accuracy of the simulation. The programs SPICE and APLAC supplemented with the programs NAP2, ESACAP, and DYNAST have proven to be a good choice in the case where a large number of different kinds of circuits and systems are to be modeled and simulated (“the Tool Box Approach”). The programs are available in inexpensive evaluation versions running on IBM compatible personal computers. The “net-list” input languages are very close, making it possible to transfer input data easily between the programs. In order to make the programs more “user-friendly” graphics interphase language “schematics-capture,” where you draw the circuit on the screen, has been introduced. Unfortunately, this approach makes it a little more difficult for the user to transfer data between the programs. In the following, short descriptions of the programs are given and a small circuit is simulated in order to give the reader an idea of the capabilities of the programs.

SPICE The first versions of SPICE (Simulation Program with Integrated Circuit Emphasis version 2), based on the modified nodal approach, were developed in 1975 at the Electronics Research Laboratory, College of Engineeering, University of California, Berkeley, CA. SPICE is a general-purpose circuit analysis program. Circuit models may contain resistors, capacitors, inductors, mutual inductors, independent sources, controlled sources, transmission lines, and the most common semiconductor devices: diodes, bipolar junction transistors, and field effect transistors. SPICE has very detailed built-in models for the semiconductor devices, which may be described by about 50 parameters. Besides the normal dc, ac, and transient analyses, the program can make sensitivity, noise, and distorsion analysis and analysis at different temperatures. In the various commercial versions of the program many other possibilities have been added; for example, analog behavior modeling (poles and zeros) and statistical analysis. In order to give an impression of the “net-list” input language, the syntax of the statements describing controlled sources is the following: Voltage Voltage Current Current

Controlled Controlled Controlled Controlled

Current Voltage Current Voltage

Source: Source: Source: Source:

Gxxx Exxx Fxxx Hxxx

N+ N+ N+ N+

NNNN-

NC+ NC- VALUE NC+ NC- VALUE VNAM VALUE VNAM VALUE

where the initial characters of the branch name G, E, F, and H indicate the type of the branch, N+ and N– are integers (“node numbers”) indicating the placement and orientation of the branch, respectively, NC+ NC– and VNAM indicate from where the control comes (VNAM is a dummy dc voltage source

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6-5

with value 0 inserted as an ammeter!), and VALUE specifies the numerical value of the control, which may be a constant or a polynomial expression in case of nonlinear dependent sources. Independent sources are specified with Ixxx for current and Vxxx for voltage sources. The following input file describes an analysis of the Chua oscillator circuit. It is a simple harmonic oscillator with losses (C2, L2, and RL2) loaded with a linear resistor (R61) in series with a capacitor (C1) in parallel with a nonlinear resistor. The circuit is influenced by a sinusoidal voltage source VRS through a coil L1. Comments may be specified either as lines starting with an asterisk “*” or by means of a semicolon “;” after the statement on a line. A statement may continue by means of a plus “+” as the first character on the following line. PSpice input file CRC-CHUA.CIR, first line, title line * *: The Chua Oscillator, sinusoidal excitation, F=150mV > * : RL2=1 ohm, RL1=0 ohm f=1286.336389 Hz * : ref. K. Murali and M. Lakshmanan, * : Effect of Sinusoidal Excitation on the Chua’s Circuit, * : IEEE Transactions on Circuits and Systems — 1: * : Fundamental Theory and Applications, * : vol.39, No.4, April 1992, pp. 264-270 * : input source; : - - - - - - - - - - - - - - - - - - - - - VRS 7 0 sin(0 150m 1.2863363889332e+3 0 0) * : choke L1 6 17 80e-3 ; mH VRL1 17 7 DC 0 ; ammeter for measure of IL1 * : harmonic oscillator; : - - - - - - - - - - - - - - - - - - L2 6 16 13m RL2 16 0 1 C2 6 0 1.250u * : load; : - - - - - - - - - - - - - - - - - - - - - - - - - r61 6 10 1310 vrrC1 10 11 DC 0 C1 11 0 0.017u * i(vrr10)=current of nonlinear resistor vrr10 10 1 DC 0 * : non-linear circuit; : - - - - - - - - - - - - - - - - - - .model n4148 d (is=0.1p rs=16 n=1); vt=n*k*T/q d13 1 3 n4148 d21 2 1 n4148 rm9 2 22 47k vrm9 22 0 DC -9 ; negative power supply rp9 3 33 47k vrp9 33 0 DC +9 r20 2 0 3.3k r30 3 0 3.3k * : ideal op. amp.; : - - - - - - - - - - - - - - - - - - - - evop 4 0 1 5 1e+20 r14 1 4 290 r54 5 4 290 r50 5 0 1.2k * : - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - .TRAN 0.05m 200m 0 0.018m UIC .plot tran v(11)

Copyright © 2006 Taylor & Francis Group, LLC

- - -

- - -

- - -

- - -

- - -

- - -

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6-6

+ +

Nonlinear and Distributed Circuits .probe .options acct nopage opts gmin=1e-15 reltol=1e-3 abstol=1e-12 vntol=1e-12 tnom=25 itl5=0 limpts=15000 .end

: : : : :

The analysis is controlled by means of the statements: .TRAN, where, for example, the maximum integration step is fixed to 18 µ sec, and .OPTIONS, where, for example, the relative truncation error is set to 1e-3. The result of the analysis is presented in Figure 6.1. It is seen that transition from chaotic behavior to a period 5 limit cycle takes place at about 100 m sec. A very important observation is that the result of the analysis may depend on: (1) the choice of the control parameters; and (2) the order of the branches in the “net-list,” for example, if the truncation error is set to 1e-6 instead of 1e-3 previously, the result becomes quite different. This observation is valid for all programs [4–7, 9–11].

APLAC The program APLAC (originally Analysis Program for Linear Active Circuits) [11] has been under constant development at the Helsinki University of Technology, Finland, since 1972. Over time it has developed into an object-oriented analog circuits and systems simulation and design tool. Inclusion of a new model into APLAC requires only the labor of introducing the parameters and equations defining the model under the control of “C-macros.” The code of APLAC itself remains untouched. The APLAC Interpreter immediately understands the syntax of the new model. APLAC accepts SPICE “net-lists” by means of the program Spi2a (SPICE to APLAC netlist converter). APLAC is capable of carrying out dc, ac, transient, noise, oscillator, and multitone harmonic steadystate analyses and measurements using IEEE-488 bus. Transient analysis correctly handles, through convolution, components defined by frequency-dependent characteristics. Monte Carlo analysis is available in all basic analysis modes and sensitivity analysis in dc and ac modes. N-port z, y, and s parameters, as well as two-port h parameters, are available in ac analysis. In addition, APLAC includes a versatile collection of system level blocks for the simulation and design of analog and digital communication systems. APLAC includes seven different optimization methods. Any parameter in the design problem can be used as a variable, and any user-defined function may act as an objective. Combined time and frequency domain optimization is possible. The file below is the APLAC “net-list” of the Chua oscillator circuit created by the Spi2a converter program with the PSpice file CRC-CHUA.CIR above as input. Comments are indicated by means of the dollar sign $ or the asterisk *. Unfortunately, it is necessary to manually change the file. Comments semicolon “;” and colon “:” must be replaced with “$;” and “$:”. Also, Spi2a indicates a few statements as “$ not implemented.” $$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$ $$ $$ $$ Spi2a — SPICE to APLAC netlist converter, version 1.26 $$ $$ $$ $$ This file is created at Tue Jul 17 14:48:02 2001 $$ $$ with command: spi2a C:\WINDOWS\DESKTOP\crc-chua.cir $$ $$ $$ $$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$ $PSpice input file CRC-CHUA.CIR, first line, title line

$:

Prepare gmin=1e-15 ERR=1e-3 ABS_ERR=1e-12 TNOM=(273.15+(25)) $ .options acct nopage opts gmin=1e-15 reltol=1e-3 $+ abstol=1e-12 vntol=1e-12 tnom=25 itl5=0

$: $:

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6-7

Simulation

200uA

0A

–200uA

0s

40ms

80ms

120ms

160ms

200ms

I (C1) Time

200uA

0A

–200uA

–1.99V

–1.00V

0V

1.00V

2.00V

I (C1) v(11)

FIGURE 6.1 (top) PSPICE analysis. The current of C1: I(C1) as function of time in the interval 0 200 ms. (bottom) The current of C1: I(C1) as function of the voltage of C1: V(11). (next page, top) The current of C1: I(C1) as function of the voltage of C1: V(11) in the time interval 100 to 200 ms. (next page, bottom) The voltage of C2: V(6) as function of the voltage of C1: V(11) in the time interval 100 to 200 ms.

$+ limpts=15000 $ .MODEL and .PARAM definitions Model “n4148” is=0.1p rs=16 n=1 + $;=vt n*k*T/q $ Circuit definition $ Not implemented $ VRS 7 0 sin(0 150m 1.2863363889332e+3 0 0)

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$: $: $: $: $: $:

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Nonlinear and Distributed Circuits

200uA

0A

–200uA

–1.99V

–1.00V

0V

1.00V

2.00V

1.00V

2.00V

I (C1) v(11) 400mV

0V

–400mV –1.99V

–1.00V

0V

V (6) v(11)

FIGURE 6.1 (continued).

Volt VRS 7 0 sin=[0, 150m, 1.2863363889332e+3, 0, 0] * $: choke $: Ind L1 6 17 80e-3 $; mH $: Volt VRL1 17 7 DC={VRL1=0} $ $; ammeter for measure of IL1 $: * $: harmonic oscillator$; $: - - - - - - - - - - - - - - - - - - - - $: + I=I_VRL1 Ind L2 6 16 13m $: Res RL2 16 0 1 $: Cap C2 6 0 1.250u $: Res r61 6 10 1310 $:

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6-9

$ Not implemented $: $ vrrC1 10 11 DC 0 $: Volt vrrC1 10 11 DC={vrrC1=0} + I=IC1 Cap C1 11 0 0.017u $: $ Not implemented $: $ vrr10 10 1 DC 0 $: Volt vrr10 10 1 DC={vrr10=0} + I=IRNL * $: non-linear circuit$; $: - - - - - - - - - - - - - - - - - - - - - $: Diode d13 1 3 MODEL=“n4148” $: Diode d21 2 1 MODEL=“n4148” $: Res rm9 2 22 47k $: Volt vrm9 22 0 DC={vrm9=-9} $ $; negative power supply $: + I=I_vrm9 Res rp9 3 33 47k $: $ Not implemented $: $ vrp9 33 0 DC +9 $: Volt vrp9 33 0 DC={vrp9=9} $ +9 must be 9 Res r20 2 0 3.3k $: Res r30 3 0 3.3k $: VCVS evop 4 0 1 1 5 [1e+20] LINEAR $: Res r14 1 4 290 $: Res r54 5 4 290 $: Res r50 5 0 1.2k $: $$ Analysis commands $$ .TRAN 0.05m 200m 0 0.018m UIC $ Sweep “TRAN Analysis 1” $+ LOOP (1+(200m-(0))/(0.05m)) TIME LIN 0 200m TMAX=0.018m $+ NW=1 $ UIC $$ .plot tran v(11) $ Show Y Vtran(11) $ $ EndSweep $ the following lines are added and the sweep above is commented Sweep “TRAN Analysis 2” + LOOP (4001) TIME LIN 0 200m TMAX=0.018m $+ NW=1 $ UIC $ .plot tran v(11) Show Y Itran(IC1) X Vtran(11) $ EndSweep $.probe

$: $:

$: $: $:

$: $: $: $:

The result of the analysis is presented in Figure 6.2. It is observed that limit cycle behavior is not obtained in the APLAC analysis in the time interval from 0 to 200 ms.

NAP2 The first versions of NAP2 (Nonlinear Analysis Program version 2) [9], based on the extended nodal equation formulation were developed in 1973 at the Institute of Circuit Theory and Telecommunication, Technical University of Denmark, Lyngby, Denmark.

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Nonlinear and Distributed Circuits

TRAN Analysis 1 Aplac 7.60 Student version FOR NON-COMMERICAL USE ONLY 2.00

1.00

0.00

–1.00

–2.00 0.000

0.050

0.100 t/s

0.150

0.200

Vtran (11)

TRAN Analysis 2 Aplac 7.60 Student version FOR NON-COMMERICAL USE ONLY 250.00u

125.00u

0.00

–125.00u

–250.00u –2.000

–1.000

0.000

1.000

2.000

t/s Itran (IC1)

FIGURE 6.2 (top) The voltage of C1: V(11) as function of time in the interval 0 to 200 ms. (bottom) The current of C1: IC1 as function of the voltage of C1: V(11).

NAP2 is a general-purpose circuit analysis program. Circuit models may contain resistors, conductors, capacitors, inductors, mutual inductors, ideal operational amplifiers, independent sources, controlled sources, and the most common semiconductor devices: diodes, bipolar junction transistors, and field

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Simulation

effect transistors. NAP2 has only simple built-in models for the semiconductor devices, which require about 15 parameters. Besides the normal dc, ac, and transient analyses, the program can make parameter variation analysis. Any parameter (e.g., component value or temperature) may be varied over a range in an arbitrary way and dc, ac, or transient analysis may be performed for each value of the parameter. Optimization of dc bias point (“given: voltages, find: resistors”) is possible. Event detection is included so that it is possible to interrupt the analysis when a certain signal, for example, goes from a positive to a negative value. The results may be combined into one output plot. It is also possible to calculate the poles and zeros of driving point and transfer functions for the linearized model in a certain bias point. Eigenvalue technique (based on the QR algorithm by J. G. F. Francis) is the method behind the calculation of poles and zeros. Group delay (i.e., the derivative of the phase with respect to the angular frequency) is calculated from the poles and zeros. This part of the program is available as an independent program named ANP3 (Analytical Network Program version 3). In order to give an impression of the “net-list” input language, the syntax of the statements describing controlled sources is as follows: Voltage Voltage Current Current

Controlled Controlled Controlled Controlled

Current Voltage Current Voltage

Source: Source: Source: Source:

Ixxx Vxxx Ixxx Vxxx

N+ N+ N+ N+

NNNN-

VALUE VALUE VALUE VALUE

VByyy VByyy IByyy Ibyyy

where the initial characters of the branch name I and V indicate the type of the branch, N+ and N- are integers (“node numbers”) indicating the placement and orientation of the branch, respectively, and VALUE specifies the numerical value of the control, which may be a constant or an arbitrary functional expression in case of nonlinear control. IB and VB refer to the current or voltage of the branch, respectively, from where the control comes. If the control is the time derivative of the branch signal, SI or SV may be specified. Independent sources must be connected to a resistor R or a conductor G as follows: Rxxx N+ N- VALUE E = VALUE and Gxxx N+ N- VALUE J = VALUE, where VALUE may be any function of time, temperature, and components. The input file “net-list” below describes the same analysis of the Chua oscillator circuit as performed by means of SPICE and APLAC. The circuit is a simple harmonic oscillator with losses (C2, L2 and RL2) loaded with a linear resistor (R61) in series with a capacitor (C1) in parallel with a nonlinear resistor. The circuit is excitated by a sinusoidal voltage source through a coil L1. The frequency is specified as angular frequency in rps. It is possible to specify more than one statement on one line. Colon “:” indicate start of a comment statement and semicolon “;” indicates end of a statement. The greater than character “>” indicates continuation of a statement on the following line. It is observed that most of the lines are comment lines with the PSPICE input statements. *circuit; *list 2, 9; : file CRC-CHUA.NAP *: PSpice input file CRC-CHUA.CIR, first line, title line > : : translated into NAP2 input file : The Chua Oscillator, sinusoidal excitation, F=150mV > : : RL2=1 ohm, RL1=0 ohm f=1286.336389 Hz : : ref. K. Murali and M. Lakshmanan, : : Effect of Sinusoidal Excitation on the Chua’s Circuit, : : IEEE Transactions on Circuits and Systems — 1: : : Fundamental Theory and Applications, : : vol.39, No.4, April 1992, pp. 264-270 : : input source; : - - - - - - - - - - - - - - - - - - - - - - - - - - : : VRS 7 0 sin(0 150m 1.2863363889332e+3 0 0) : sin/sin/; Rs 7 0 0 e=150m*sin(8.0822898994674e+3*time) : : choke ; L1 6 17 80mH; RL1 17 7 0 :

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Nonlinear and Distributed Circuits

: L1 6 17 80e-3 ;:mH : VRL1 17 7 DC 0 ;:ammeter for measure of IL1 : :- - - - - - - - - - - - - - - - - - - - : harmonic oscillator; L2 6 16 13mH; RL2 16 0 1 C2 6 0 1.250uF : L2 6 16 13m : RL2 16 0 1 : C2 6 0 1.250u : :- - - - - - - - - - - - - - - - - - - - - - - - - - - - : load; r61 6 10 1310; rrc1 10 11 0; c1 11 0 0.017uF rr10 10 1 0: irr10=current of nonlinear resistor : r61 6 10 1310 : vrrC1 10 11 DC 0 : C1 11 0 0.017u : i(vrr10)=current of nonlinear resistor : vrr10 10 1 DC 0 : non-linear circuit; :- - - - - - - - - - - - - - - - - - - - : .model n4148 d (is=0.1p rs=16 n=1); vt=n*k*T/q n4148 /diode/ is=0.1p gs=62.5m vt=25mV; td13 1 3 n4148; td21 2 1 n4148; : d13 1 3 n4148 : d21 2 1 n4148 rm9 2 0 47k e=-9; rp9 3 0 47k E=+9; : rm9 2 22 47k : vrm9 22 0 DC -9; negative power supply : rp9 3 33 47k : vrp9 33 0 DC +9 r20 2 0 3.3k; r30 3 0 3.3k; : r20 2 0 3.3k : r30 3 0 3.3k : ideal op. amp.; : - - - - - - - - - - - - - - - - - - - - - - - - gop 1 5 0; vop 4 0 vgop: no value means infinite value; : evop 4 0 1 5 1e+20 r14 1 4 290; r54 5 4 290; r50 5 0 1.2k; : r14 1 4 290 : r54 5 4 290 : r50 5 0 1.2k : - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - *time time 0 200m : variable order, variable step : .TRAN 0.05m 200m 0 0.018m UIC *tr vnall *plot(50 v6) v1 *probe : .plot tran v(11) : .probe *run cycle=15000 minstep=1e-20 > trunc=1e-3 step=50n : .options acct nopage opts gmin=1e-15 reltol=1e-3 :+ abstol=1e-12 vntol=1e-12 tnom=25 itl5=0 :+ limpts=15000 : .end *end

Copyright © 2006 Taylor & Francis Group, LLC

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Simulation

250.0uA 200.0uA

0.0uA

–200.0uA –250.0uA 0ms

20ms

40ms

80ms

60ms

100ms

I (C1) TIME

250.0uA 200.0uA

0.0uA

–200.0uA –250.0uA –2.0V

–1.0V

0.0V

1.0V

2.0V

I (C1) v(11)

FIGURE 6.3 (top) NAP2 analysis. The current of C1: I(C1) as function of time in the interval 0 to 100 ms. (bottom) The current of C1: I(C1) as function of the voltage of C1: V(11) in the time interval 0 to 100 ms. (next page, top) The current of C1: I(C1) as function of time in the interval 180 to 200 ms. (next page, bottom) The current of C1: I(C1) as function of the voltage of C1: V(11) in the time interval 100 to 200 ms.

The program options are set by means of the statement *RUN, where, for example, the minimum integration step is set to 1e-20 s and the relative truncation error is set to 1e-6. The result of the analysis is presented in Figure 6.3. It can be observed that transition from chaotic behavior to a period 5 limit cycle takes place at about 50 ms. If we compare to the results obtained above by means of SPICE and APLAC, we see that although the three programs are “modeled and set” the same way, for example, with the same relative tolerance 1e-3, the results are different due to the chaotic nature of the circuit and possibly also due to the different strategies of equation formulation and solution used in the three programs. For example, SPICE uses the trapezoidal integration method with variable step; APLAC and NAP2 use the Gear integration methods with variable order and variable step.

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Nonlinear and Distributed Circuits

200uA

100uA

0.0uA

–100uA

–200uA 180ms

185ms

190ms

195ms

200ms

i (c1) time 200uA

100uA

0.0uA

–100uA

–200uA –2.0V

–1.5V

–1.0V

–0.5V

0.0V

0.5V

1.0V

1.5V

2.0V

i (c1) v (11)

FIGURE 6.3 (continued).

ESACAP The first versions of ESACAP (Engineering System and Circuit Analysis Program) based on the extended nodal equation formulation were developed in 1979 at Elektronik Centralen, Hoersholm, Denmark, for ESA (the European Space Agency) as a result of a strong need for a simulation language capable of handling interdisciplinary problems (e.g., coupled electrical and thermal phenomena). ESACAP was therefore born with facilities that have only recently been implemented in other simulation programs (e.g., facilities referred to as behavioral or functional modeling). ESACAP carries out analyses on nonlinear systems in dc and in the time domain. The nonlinear equations are solved by a hybrid method combining the robustness of the gradient method with the good convergence properties of the Newton–Raphson method. The derivatives required by the Jacobian matrix are symbolically evaluated from arbitrarily complex arithmetic expressions and are therefore exact. The symbolic evaluation of derivatives was available in the very first version of ESACAP. It has now become a general numerical discipline known as automatic differentiation. The time-domain solution is found by numerial integration implemented as backward difference formulas, BDFs, of

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variable step and orders 1 through 6 (modified Gear method). An efficient extrapolation method (the epsilon algorithm) accelerates the asymptotic solution in the periodic steady-state case. Frequency-domain analyses may be carried out on linear or linearized systems (e.g., after a dc analysis). Besides complex transfer functions, special outputs such as group delay and poles/zeros are available. The group delay is computed as the sum of the frequency sensitivities of all the reactive components in the system. Poles and zeros are found by a numerical interpolation of transfer functions evaluated on a circle in the complex frequency plane. ESACAP also includes a complex number postprocessor by means of which any function of the basic outputs can be generated (e.g., stability factor, s-parameters, complex ratios). Sensitivities of all outputs with respect to all parameters are available in all analysis modes. The automatic differentiation combined with the adjoint network provides exact partial derivatives in the frequency domain. In the time domain, integration of a sensitivity network (using the already LU-factorized Jacobian) provides the partial derivatives as functions of time. The ESACAP language combines procedural facilities, such as if-then-else, assignment statements, and do-loops, with the usual description by structure (nodes/branches). Arbitrary expressions containing system variables and their derivatives are allowed for specifying branch values thereby establishing any type of nonlinearity. System variables of non-potential and non-current type may be defined and used everywhere in the description (e.g., for defining power, charge). The language also accepts the specification of nonlinear differential equations. Besides all the standard functions known from high-level computer languages, ESACAP provides a number of useful functions. One of the most important of these functions is the delay function. The delay function returns one of its arguments delayed by a specified value, which in turn may depend on system variables. Another important function is the threshold switch — the ZEROREF function — used in if-then-else constructs for triggering discontinuities. The ZEROREF function interacts with the integration algorithm that may be reinitialized at the exact threshold crossing. The ZEROREF function is an efficient means for separating cause and action in physical models thereby eliminating many types of causality problems. Causality problems are typical examples of bad modeling techniques and the most frequent reason for divergence in the simulation of dynamic systems. Typical ESACAP applications include electronics as well as thermal and hydraulic systems. The frequency domain facilities have been a powerful tool for designing stable control systems including nonelectronics engineering disciplines. In order to give an idea of the input language, the syntax of the statements describing sources is as follows: Current Source: Voltage Source:

Jxxx(N+, N-)=VALUE; Exxx(N+, N-)=VALUE;

where the initial characters of the branch name: J and E indicate the type of the branch, N+ and N- are node identifiers (character strings), which, as a special case, may be integer numbers (“node numbers”). The node identifiers indicate the placement and orientation of the branch. The VALUE specifies the numerical value of the source, which may be an arbitrary function of time, temperature, and parameters as well as system variables (including their time derivatives). Adding an apostrophe references the time derivative of a system variable. V(N1,N2)’, for example, is the time derivative of the voltage drop from node N1 to node N2. The next input file — actually, a small program written in the ESACAP language — describes an analysis of a tapered transmission line. The example shows some of the powerful tools available in the ESACAP language such as: (1) the delay function; (2) the do-loop; and (3) the sensitivity calculation. The description language of ESACAP is a genuine simulation and modeling language. However, for describing simple systems, the input language is just slightly more complicated than the languages of SPICE, APLAC, and NAP2. Data is specified in a number of blocks (“chapters” and “sections”) starting with $$ and $. Note how the line model is specified in a do-loop where ESACAP creates nodes and branches of a ladder network [10].

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Example.155 Tapered line in the time domain. # Calculation of sensitivities. # This example shows the use of a do-loop for the discretization of a # tapered transmission line into a chain of short line segments. The # example also demonstrates how to specify partial derivatives of any # parameter for sensitivity calculations. $$DESCRIPTION # chapter — - — - — - — - — - — - — - — - — - $CON: n_sections=60; END; # section — - — - — - — - — - — - # n_sections is defined as a globally available constant. # Only this constant needs to be modified in order to change # the resolution of discretization # Transmission line specified by characteristic impedance and length. # Modelled by the ESACAP delay function (DEL). $MODEL: LineCell(in,out): Z0,length; delay=length/3e8; J_reverse(0,in)=DEL(2*V(out)/Z0-I(J_forward), delay); J_forward(0,out)=DEL(2*V(in)/Z0-I(J_reverse), delay); G1(in,0)=1/Z0; G2(out,0)=1/Z0; END; # end of section — - — - — - — - — - # Tapered line specified by input and output impedance and length # This model calls LineCell n_sections times in a do-loop. $MODEL: TaperedLine(in,out): Z1,Z2,length; ALIAS_NODE(in,1); # Let node in and 1 be the same. ALIAS_NODE(out,[n_sections+1]); # Let node out and n_sections+1 be # the same. # Notice that values in square brackets become part of an identifier FOR (i=1, n_sections) DO X[i]([i],[i+1])=LineCell(Z1+i*(Z2-Z1)/n_sections, length/n_sections); ENDDO; END; # end of section — - — - — - — - — - # Main network calls the model of the tapered line and terminates # it by a 50 ohm source and 100 ohm load. $NETWORK: # section — - — - — - — - — - IF(TIME.LT.1n) THEN Esource(source,0)=0; ELSE Esource(source,0)=1; ENDIF; # Esource(source,0)=TABLE(TIME,(0,0),(1n,0),(1.001n,1),(10n,1)); Rsource(source,in)=50; Rload(out,0)=100; Z1=50; Z2=100; length=1; X1(in,out)=TaperedLine(Z1,Z2,length); END; # end of section — - — - — - — - — - # Time-domain analysis $$TRANSIENT # chapter — - — - — - — - — - — - — - — - # Analysis parameters $PARAMETERS: # section — - — - — - — - — - — - — - — - TIME=0,20n; # Total time sweep HMAX=2p; # Max integration step END; # end of section — - — - — - — - — - — - — -

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1.0000

V(out) V(in)

V(out)

V(in)

0.0000 0.0000

20.00n

TIME

d(V(out))/d(Z1) d(V(in))/d(Z1)

5.000m

d(V(in))/d(Z1)

d(V(out))/d(Z1) 0.0000 0.0000

20.00n

TIME

FIGURE 6.4 (top) ESACAP analysis. The input voltage of the tapered line: V(in) and the output voltage of the tapered line: V(out) as functions of time in the interval from 0 to 20 ns. (bottom) The sensitivities of V(in) and V(out) with respect to Z1.

# Specification of desired results. Adding an exclamation mark (!) to an # output will show the value on the ESACAP real-time graphics display. $DUMP: # section — - — - — - — - — - — - — - — - FILE=; TIME=0,20n,20p; TIME; V(in)!; V(out)!; (V(in),DER(Z1))!; # Partial derivatives with respect (V(out),DER(Z1))!; # to Z1 END; # end of section — - — - — - — - — $$STOP # chapter — - — - — - — - — - — - — - — -

The result of the analysis is presented in Figure 6.4.

DYNAST DYNAST (DYNAmic Simulation Tool) [5] was developed in 1992 in a joint venture between The Czech Technical University, Prague, the Czech Republic and Katholieke Universiteit Leuven, Heverlee, Belgium. The program was developed as an interdisciplinary simulation and design tool in the field of “mechatronics” (mixed mechanical/electrical systems). The main purpose of DYNAST is to simulate dynamic systems decomposed into subsystems defined independently of the system structure. The structure can be hierarchical. DYNAST is a versatile software tool for modeling, simulation, and analysis of general linear as well as nonlinear dynamic systems, both in time and frequency domain. Semisymbolic analysis is possible (poles and zeros of network functions, inverse Laplace transformation using closed-form formulas).

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Three types of subsystem models are available in DYNAST. The program admits systems descriptions in the form of (1) a multipole diagram respecting physical laws; (2) a causal or an acausal block diagram; (3) a set of equations; or (4) in a form combining the above approaches. 1) In DYNAST the physical-level modeling of dynamic systems is based on subsystem multipole models or multiterminal models. These models respect the continuity and compatibility postulates that apply to all physical energy-domains. (The former postulate corresponds to the laws of conservation of energy, mass, electrical charge, etc.; the latter is a consequence of the system connectedness). The multipole poles correspond directly to those subsystem locations in which the actual energetic interactions between the subsystems take place (such as shafts, electrical terminals, pipe inlets, etc.). The interactions are expressed in terms of products of complementary physical quantity pairs: the through variables flowing into the multipoles via the individual terminals, and the across variables identified between the terminals. 2) The causal blocks, specified by explicit functional expressions or transfer functions, are typical for any simulation program. But the variety of basic blocks is very poor in DYNAST, as its language permits definition of the block behavior in a very flexible way. Besides the built-in basic blocks, user specified multi-input multi-output macroblocks are available as well. The causal block interconnections are restricted by the rule that only one block output may be connected to one or several block inputs. In the DYNAST block variety, however, causal blocks are also available with no restrictions imposed on their inteconnections, as they are defined by implicit-form expressions. 3) DYNAST can also be used as an equation solver for systems of nonlinear first-order algebrodifferential and algebraic equations in the implicit form. The equations can be submitted in a natural way (without converting them into block diagrams) using a rich variety of functions including the Boolean, event-dependent, and tabular ones. The equations, as well as any other input data, are directly interpreted by the program without any compilation. The equation formulation approach used for both multipoles and block diagrams evolved from the extended method of nodal voltages (MNA) developed for electrical systems. Because all the equations of the diagrams are formulated simultaneously, no problems occur with the algebraic loops. As the formulated equations are in the implicit form, it does not create any problems with the causality of the physical models. The integration method used to solve the nonlinear algebro-differential and algebraic equations is based on a stiff-stable implicit backward-differentiation formula (a modified Gear method). During the integration, the step length as well as the order of the method is varied continuously to minimize the computational time while respecting the admissible computational error. Jacobians necessary for the integration are computed by symbolic differentiation. Their evaluation as well as their LU decomposition, however, is not performed at each iteration step if the convergence is fast enough. Considerable savings of computational time and memory are achieved by a consistent matrix sparsity exploitation. To accelerate the computation of periodic responses of weakly damped dynamic systems, the iterative epsilon-algorithm is utilized. Also, fast-Fourier transformation is available for spectral analysis of the periodic steady-state responses. DYNAST runs under DOS- or WINDOWS-control on IBM-compatible PCs. Because it is coded in FORTRAN 77 and C-languages, it is easily implemented on other platforms. It is accompanied by a menu-driven graphical environment. The block and multiport diagrams can be submitted in a graphical form by a schematic capture editor. DYNAST can be easily augmented by various pre- and postprocessors because all its input and output data are available in the ASCII code. Free “net-list” access to DYNAST is possible by means of e-mail or online over the Internet [5].

References [1] Calahan, D. A., Computer-Aided Network Design, New York: McGraw-Hill, 1972. [2] Chua, L. O. and P.-M. Lin, Computer-Aided Analysis of Electronic Circuits, Englewood Cliffs, NJ: Prentice Hall, 1975. [3] Dertouzos, M. L. et al., Systems, Networks, and Computation: Basic Concepts, New York: McGrawHill, 1972.

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6-19

[4] Intusoft, IsSpice3 — ICAPS System Packages, San Pedro, CA: Intusoft, 1994, http://www.intusoft.com/. [5] Mann, H., DYNAST — A Multipurpose Engineering Simulation Tool, Prague, Czech Republic: The Czech Technical University, 1994, http://www.it.dtu.dk/ecs/teacher.htm, http://icosym.cvut.cz/cacsd/ msa/onlinetools.html, http://icosym.cvut.cz/dyn/download/public/. [6] Meta-Software, HSPICE User’s Manual H9001, Campbell, CA: Meta-Software, 1990. [7] MicroSim, PSpice — The Design Center, Irvine, CA: MicroSim, 1994, http://www.cadencepcb.com and http://www.pspice.com/. [8] Ostrowski, A.M., Solution of Equations and Systems of Equations, New York: Academic Press, 1966. [9] Rübner-Petersen, T., NAP2 — A Nonlinear Analysis Program for Electronic Circuits, version 2, Users Manual 16/5-73, Report IT-63, ISSN-0105-8541, Lyngby, Denmark: Institute of Circuit Theory and Telecommunication, Technical University of Denmark, 1973, http://www.it.dtu.dk/ecs/programs.htm#nnn, http://www.it.dtu.dk/ecs/napanp.htm. [10] Stangerup, P., ESACAP User’s Manual, Nivaa, Denmark: StanSim Research Aps., 1990, http://www.it.dtu.dk/ecs/esacap.htm. [11] Valtonen, M. et.al., APLAC — An Object-Oriented Analog Circuit Simulator and Design Tool, Espoo, Finland: Circuit Theory Lab., Helsinki University of Technology and Nokia Corporation Research Center, 1992, http://www.aplac.hut.fi/aplac/general.html, http://www.aplac.com/. [12] Vlach, J. and K. Singhal, Computer Methods for Circuit Analysis and Design, New York: Van Nostrand Reinhold, 1983. [13] Funk, D. G. and Christiansen, D. Eds., Electronic Engineers’ Handbook, 3rd ed., New York: McGrawHill, 1989.

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7 Cellular Neural Networks Tamás Roska Computer and Automation Research Institute of the Hungarian Academy of Sciences and the Pázmány P. Catholic University, Budapest

7.1 7.2 7.3

Ákos Zarándy

7.4

Image Processing — Form, Motion, Color, and Depth • Partial Differential Equations • Relation to Biology

Hungarian Academy of Science

Csaba Rekeczky Hungarian Academy of Sciences

7.1

Introduction: Deﬁnition and Classiﬁcation ..................... 7-1 The Simple CNN Circuit Structure .................................. 7-3 The Stored Program CNN Universal Machine and the Analogic Supercomputer Chip ................................... 7-6 Applications ........................................................................ 7-8

7.5 7.6

Template Library: Analogical CNN Algorithms ............ 7-11 Recent Advances ............................................................... 7-16

Introduction: Definition and Classification

Current VLSI technologies provide for the fabrication of chips with several million transistors. With these technologies a single chip may contain one powerful digital processor, a huge memory containing millions of very simple units placed in a regular structure, and other complex functions. A powerful combination of a simple logic processor placed in a regular structure is the cellular automaton invented by John von Neumann. The cellular automaton is a highly parallel computer architecture. Although many living neural circuits resemble this architecture, the neurons do not function in a simple logical mode: they are analog “devices.” The cellular neural network architecture, invented by Leon O. Chua and his graduate student Lin Yang [1] has both properties: the cell units are nonlinear continuous time dynamic elements placed in a cellular array. Of course, the resulting nonlinear dynamics in space could be extremely complex. The inventors, however, showed that these networks can be designed and used for a variety of engineering purposes, while maintaining stability and keeping the dynamic range within well-designed limits. Subsequent developments have uncovered the many inherent capabilities of this architecture (IEEE conferences: CNNA-90, CNNA-92, CNNA-94, 96, 98, 00, 02; Special issues: Int. J. Circuit Theory and Applications, 1993, 1996, 1998, 2002 and IEEE Transactions on Circuits and Systems, I and II, 1993, 1999, etc.). In the circuit implementation, unlike analog computers or general neural networks, the CNN cells are not the ubiquitous high-gain operational ampliﬁers. In most practical cases, they are either simple unity gain ampliﬁers or simple second- or third-order simple dynamic circuits with one to two simple nonlinear components. Tractability in the design and the possibility for exploiting the complex nonlinear dynamic phenomena in space, as well as the trillion operations per second computing speed in a single chip are but some of the many attractive properties of cellular neural networks. The trade-off is in the accuracy; however, in many cases, the accuracy achieved with current technologies is enough to solve a lot of real-life problems. The cellular neural/nonlinear network (henceforth called CNN) is a new paradigm for multidimensional, nonlinear, dynamic processor arrays [1], [23]. The mainly uniform processing elements, called cells or artiﬁcial neurons, are placed on a regular geometric grid (with a square, hexagonal, or other pattern). 7-1 Copyright © 2006 Taylor & Francis Group, LLC

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Nonlinear and Distributed Circuits

FIGURE 7.1 A CNN grid structure with the processing elements (cells) located at the vertices.

CNN ARRAY

i−1 j−1

i−1j

i−1 j+1

ij−1 i+1 j−1 Row i

Column j

ij+1 i+1j

i+1 j+1

Each cell has 3 time variables: 1. State xij( ) 2. Input uij( ) 3. Output yij( ) and a constant (threshold) βij

FIGURE 7.2 A single, two-dimensional CNN layer and a magniﬁed cell with its neighbor cells with the normal neighborhood radius r = 1.

This grid may consist of several two-dimensional layers packed upon each other (Figure 7.1). Each processing element or cell is an analog dynamical system, the state (x), the input (u), and the output (y) signals are analog (real-valued) functions of time (both continuous-time and discrete-time signals are allowed). The interconnection and interaction pattern assumed at each cell is mainly local within a neighborhood Nr, where Nr denotes the ﬁrst “r” circular layers of surrounding cells. Figure 7.2 shows a two-dimensional layer with a square grid of interconnection radius of 1 (nearest neighborhood). Each vertex contains a cell and the edges represent the interconnections between the cells. The pattern of interaction strengths between each cell and its neighbors is the “program” of the CNN array. It is called a cloning template (or just template). Depending on the types of grids, processors (cells), interactions, and modes of operation, several classes of CNN architectures and models have been introduced. Although the summary below is not complete, it gives an impression of vast diversities. Typical CNN Models • Grid type: square hexagonal

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Cellular Neural Networks

planar circular equidistant logarithmic • Processor type: linear sigmoid ﬁrst order second order third order • Interaction type: linear memoryless nonlinear dynamic delay-type • Mode of operation: continuous-time discrete-time equilibrium oscillating chaotic

7.2

The Simple CNN Circuit Structure

The simplest ﬁrst-order dynamic CNN cell used in the seminal paper [1] is illustrated in Figure 7.3. It is placed on the grid in the position ij (row i and column j). It consists of a single state capacitor with a parallel resistor and an ampliﬁer [f (xij)]. This ampliﬁer is a voltage-controlled current source (VCCS), where the controlling voltage is the state capacitor voltage. To make the ampliﬁer model self-contained, a parallel resistor of unit value is assumed to be connected across the output port. Hence, the voltage transfer characteristic of this ampliﬁer is also equal to f (·). In its simplest form this ampliﬁer has a unity gain saturation characteristic (see Figure 7.7 for more details). The aggregate feed-forward and feedback interactions are represented by the current sources iinput and ioutput, respectively. Figure 7.4 shows these interactions in more detail. In fact, the feedforward interaction term iinput is a weighted sum of the input voltages (ukl ) of all cells in the neighborhood (Nr ). Hence, the feedforward template, the so-called B template, is a small matrix of size (2r + 1) × (2r + 1) containing the template elements bkl , which can be implemented by an array of linear voltage-controlled current sources. The controlling voltages of these controlled sources are the input voltages of the cells within the neighborhood of radius r. This means, for example, that b12 is the VCCS controlled by the input voltage of the cell lying north from the cell ij. In most practical cases the B template is translation invariant, i.e., the interaction pattern (the B template) is the same for all cells. Hence, the chip layout will be very regular (as in memories or PLAs). The feedback interaction term ioutput is a weighted sum of the output voltages

+

−

FIGURE 7.3 The simple ﬁrst-order CNN cell.

Copyright © 2006 Taylor & Francis Group, LLC

+

−

+ −

+ =

−

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Nonlinear and Distributed Circuits

= Σ

= Σ

!

FIGURE 7.4 The 19 numbers (a program) that govern the CNN array (the 19th number is the constant bias term I, but it is not shown in the ﬁgure) deﬁne the cloning template (A, B, and I).

(ykl) of all cells in the neighborhood (Nr ). The weights are the elements of a small matrix A called the A template (or feedback template). Similar arguments apply for the A template as for the B template discussed previously. If the constant threshold term is translation invariant as denoted by the constant current source I, then in the case of r = 1, the complete cloning template contains only 19 numbers (A and B and I, i.e., 9 + 9 + 1 terms), irrespective of the size of the CNN array. These 19 numbers deﬁne the task which the CNN array can solve. What kind of tasks are we talking about? The simplest, and perhaps the most important, are imageprocessing tasks. In the CNN array computer, the input and output images are coded as follows. For each picture element (called pixel) in the image, a single cell is assigned in the CNN. This means that a one-to-one correspondence exists between the pixels and the CNN cells. Voltages in the CNN cells code the gray-scale values of the pixels. Black is coded by +1 V, white is –1 V, and the gray-scale values are in between. Two independent input images can be deﬁned pixel by pixel: the input voltages uij and the initial voltage values of the capacitors xij (0) (cell by cell). Placing these input images onto the cell array and starting the transient, the steady state outputs yij will encode the output image. The computing time is equal to the settling time of the CNN array. This time is below one microsecond using a CNN chip made with a 1.0–1.5 µm technology containing thousands of CNN processing elements, i.e., pixels, in an area of about 2 cm2. This translates to a computing power of several hundred billion operations per second (GXPS). The ﬁrst tested CNN chip [4] was followed by several others implementing a discrete-time CNN model [6] and chips with on-chip photosensors in each cell [5]. For example, if we place the array of voltage values deﬁned by the image shown in Figure 7.5(b) as the input voltage and the initial state capacitor voltage values in the CNN array with the cloning template shown in Figure 7.5(a), then after the transients have settled down, the output voltages will encode the output image of Figure 7.5(c). Observe that the vertical line has been deleted. Since the image contains 40 × 40 pixels, the CNN array contains 40 × 40 cells. It is quite interesting that if we had more than one vertical line, the computing time would be the same. Moreover, if we had an array of 100 × 100 cells on the chip, the computing time would remain the same as well. This remarkable result is due to the fully parallel nonlinear dynamics of the CNN computer. Some propagating-type templates induce wave-like phenomena. Their settling times increase with the size of the array.

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Cellular Neural Networks

0 −0.25 0

000

B= 0

A= 020

0

I = − 1.5

0

0 −0.25 0

000

(a)

(b)

(c)

FIGURE 7.5 An input and output image where the vertical line was deleted.

For other image-processing tasks, processing form, motion, color, and depth, more than 100 cloning templates have been developed to date and the library of new templates is growing rapidly. Using the Cellular Neural Network Workstation Tool Kit [10], they can be called in from a CNN Template Library (CTL). New templates are being developed and published continually. The dynamics of the CNN array is described by the following set of differential equations: dx ij dt = − x ij + I + ioutput + iinput

( )

y ij = f x ij

i = 1, 2,…, N and

j = 1, 2, …, M (the array has N × M cells)

where the last two terms in the state equation are given by the sums shown in Figure 7.4. We can generalize the domain covered by the original CNN deﬁned via linear and time-invariant templates by introducing the “nonlinear” templates (denoted by ^) and the “delay” templates (indicated by τ in the superscript) as well, to obtain the generalized state equation shown below. The unity-gain nonlinear sigmoid characteristics f are depicted in Figure 7.6. f(V)

1 −1 1 −1

FIGURE 7.6 The simple unity-gain sigmoid characteristics.

Copyright © 2006 Taylor & Francis Group, LLC

V

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Nonlinear and Distributed Circuits

dvxij dt

= −vx ij + I ij +

∑( ) Aˆ (vy (t ), vy (t )) + ∑( ) Bˆ (vu (t ), vu (t )) ij ; kl

kl

+

∑( ) A

τ ij ; kl

vy kl (t − τ) +

kl ∈Nr ij

ij ; kl

ij

kl ∈Nr ij

kl

ij

kl ∈Nr ij

∑( ) B

τ ij ; kl

vukl (t − τ)

kl ∈Nr ij

Several strong results have been proved that assure stable and reliable operations. If the A template is symmetric, then the CNN is stable. Several other results have extended this condition [6,7]. The sum of the absolute values of all the 19 template elements plus one deﬁnes the dynamic range within which the state voltage remains bounded during the entire transient, if the input and initial state signals are less than 1 V in absolute value [1]. In a broader sense, the CNN is deﬁned [2] as shown in Figure 7.7.

1-, 2-, 3-, or n-dimensional of mainly identical , called cells or processor units, which satisfies two properties: • most within a finite radius , and • all signals •

FIGURE 7.7 The CNN deﬁnition.

7.3

The Stored Program CNN Universal Machine and the Analogic Supercomputer Chip

For different tasks, say image-processing, we need different cloning templates. If we want to implement them in hardware, we would need different chips. This is inefﬁcient except for dedicated, mass-production applications. The invention of the CNN universal machine [8] has overcome the problem above. It is the ﬁrst stored program array computer with analog nonlinear array dynamics. One CNN operation, for example, solving thousands of nonlinear differential equations in a microsecond, is just one single instruction. In addition, a single instruction is represented by just a few analog (real) values (numbers). In the case when the nearest neighborhood is used, only 19 numbers are generated. When combining several CNN templates, for example extracting ﬁrst contours in a gray-scale image, then detecting those areas where the contour has holes, etc., we have to design a ﬂowchart-logic that satisﬁes the correct sequence of the different templates. The simple ﬂowchart for the previous example is shown in Figure 7.8. One key point input: gray scale image

contour detection template

image with contour lines

hole detection template

output image

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FIGURE 7.8 A ﬂowchart representing the logic sequence of two templates.

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Cellular Neural Networks

FIGURE 7.9 The global architecture of the CNN Universal Machine. Source: T. Roska and L. O. Chua, “The CNN Universal Machine: An analogic array computer,” IEEE Trans. Circuits Syst. I, vol. 40, pp. 163–173, 1993. 1993 IEEE.

is that, in order to exploit the high speed of the CNN chips, we have to store the intermediate results cell by cell (pixel by pixel). Therefore, we need a local analog memory. By combining several template actions we can write more complex ﬂowcharts for implementing almost any analogic algorithms. The name analogic is an acronym for “analog and logic.” It is important to realize that analogic computation is completely different from hybrid computing. To cite just one point, among others, no A/D or D/A conversions occur during the computation of an analogic program. As with digital microprocessors, to control the execution of an analogic algorithm, we need a global programming unit. The global architecture of the CNN universal machine is shown in Figure 7.9. As we can see from this ﬁgure, the CNN nucleus described in the previous section has been generalized to include several crucial functions depicted in the periphery. We have already discussed the role of the local analog memory (LAM) that provides the local (on-chip) storage of intermediate analog results. Because the results of many detection tasks in applications involve only black-and-white logic values, adding a local logic memory (LLM) in each cell is crucial. After applying several templates in a sequence, it is often necessary to combine their results. For example, to analyze motion, consecutive snapshots processed by CNN templates are compared. The local analog output unit (LAOU) and the local logic unit (LLU) perform these tasks, both on the local analog (gray scale) and the logical (black-and-white) values. The local communication and control unit (LCCU) of each cell decodes the various instructions coming from the global analogic program unit (GAPU). The global control of each cell is provided by the GAPU. It consists of four parts: 1. The analog program (instruction) register (APR) stores the CNN template values (19 values for each CNN template instruction in the case of nearest interconnection). The templates stored here will be used during the run of the prescribed analogical algorithm. 2. The global logic program register (LPR) stores the code for the local logic units.

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3. The ﬂexibility of the extended CNN cells is provided by embedding controllable switches in each cell. By changing the switch conﬁgurations of each cell simultaneously, we can execute many tasks using the same cell. For example, the CNN program starts by loading a given template, storing the results of this template action in the local analog memory, placing this intermediate result back on the input to prepare the cell, starting the action with another template, etc. The switch conﬁgurations of the cells are coded in the switch conﬁguration register (SCR). 4. Finally, the heart of the GAPU is the global analogic control unit (GACU), which contains the physical machine code of the logic sequence of analogical algorithm. It is important to emphasize that here the control code is digital; hence, although its internal operation is analog and logical, a CNN universal chip can be programmed with the same ﬂexibility and ease as a digital microprocessor — except the language is much simpler. Indeed, a high-level language, a compiler, an operating system, and an algorithm development system are available for CNN universal chip architectures. Moreover, by fabricating optical sensors cell-by-cell on the chip [5], the image input is directly interfaced. The CNN universal chip is called supercomputer chip because the execution speed of an analogic algorithm falls in the same range as the computing power of today’s average digital supercomputers (a trillion operations per second). Another reason for this enormous computing power is that the reprogramming time of a new analog instruction (template) is of the same order, or less, than the analog array execution time (less than a microsecond). This is about one million times faster than some fully interconnected analog chips. Based on the previously mentioned novel characteristics, the CNN universal chip can be considered to be an analogic microprocessor.

7.4

Applications

In view of its ﬂexibility and its very high speed in image-processing tasks, the CNN Universal Machine is ideal for many applications. In the following, we brieﬂy describe three areas. For more applications, the reader should consult the references at the end of this chapter.

Image Processing — Form, Motion, Color, and Depth Image processing is currently the most popular application of CNN. Of the more than 100 different templates currently available, the vast majority are for image-processing tasks. Eventually, we will have templates for almost all conceivable local image-processing operations. Form (shape), motion, color, and depth can all be ideally processed via CNN. The interested reader can ﬁnd many examples and applications in the references. CNN handles analog pixel values, so gray-scale images are processed directly. Many templates detect simple features like different types of edges, convex or concave corners, lines with a prescribed orientation, etc. Other templates detect semiglobal features like holes, groups of objects within a given size of area, or delete objects smaller than a given size. There are also many CNN global operations like calculating the shadow, histogram, etc. Halftoning is commonly used in fax machines, laser printers, and newspapers. In this case, the local gray level is represented by black dots of identical size, whose density varies in accordance with the gray level. CNN templates can do this job as well. A simple example is shown in Fig. 7 .10. The original gray-scale image is shown on the left-hand side, the halftoned image is shown on the right-hand side. The “smoothing” function of our eye completes the image processing task. More complex templates detect patterns deﬁned within the neighborhood of interaction. In this case, the patterns of the A and B templates somehow reﬂect the pattern of the object to be detected. Because the simplest templates are translation invariant, the detection or pattern recognition is translation invariant as well. By clever design, however, some rotationally invariant detection procedures have been developed.

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FIGURE 7.10 Halftoning: an original gray-scale image (LHS) and its halftoned version (RHS). A low resolution is deliberately chosen in (b) in order to reveal the differing dot densities at various regions of the image.

Combining several templates according to some prescribed logic sequence, more complex pattern detection tasks can be performed, e.g., halftoning. Color-processing CNN arrays represent the three basis colors by single layers via a multilayer CNN. For example, using the red-green-blue (RGB) representation in a three-layer CNN, simple color-processing operations can be performed. Combining them with logic, conversions between various color representations are possible. One of the most complex tasks that has been undertaken by an analogic CNN algorithm is the recognition of bank notes. Recognition of bank notes in a few milliseconds is becoming more and more important. Recent advances in the copy machine industry have made currency counterfeiting easier. Therefore, automatic bank note detection is a pressing need. Figure 7.11 shows a part of this process (which involves color processing as well). The dollar bill shown in the foreground is analyzed and the circles of a given size are detected (colors are not shown). The “color cube” means that each color intensity is within prescribed lower and upper limit values. Motion detection can be achieved by CNN in many ways. One approach to process motion is to apply two consecutive snapshots to the input and the initial state of the CNN cell. The CNN array calculates the various combinations between the two snapshots. The simplest case is just taking the difference to detect motion. Detecting direction, shape, etc. of moving objects are only the simplest problems that can be solved via CNN. In fact, even depth detection can be included as well.

Partial Differential Equations As noted in the original paper [1], even the simple-cell CNN with the linear template 0 A = 1 0

1 −3 1

0 1 0

B = 0

I = 0

can approximate the solution of a diffusion-type partial differential equation on a discrete spatial grid. This solution maintains continuity in time, a nice property not possible in digital computers. By adding just a simple capacitor to the output, i.e., by placing a parallel RC circuit across the output port of the cell of Figure 7.3, the following wave equation will be represented in a discrete space grid: d 2p ( t ) dt 2 = ∆p where p(t) = P(x, y, t) is the state (intensity) variable on a two-dimensional plane (x, y), and ∆ is the Laplacian operator (the sum of the second derivatives related to x and y).

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FIGURE 7.11 Some intermediate steps in the dollar bill recognition process. An input image (a) shown here in single color, results in the “color cube” (b), the convex objects (c), and the size classiﬁcation (d). Source: A. Zarándy, F. Werblin, T. Roska, L. O. Chua, and “Novel type of analogical CNN algorithms for recognizing bank notes,” Memorandum UCB/ERL, M94/29 1994, Electron. Res. Lab., Univ. California, Berkeley, 1994.

In some cases, it is useful to use a cell circuit that is chaotic. Using the canonical Chua’s circuit, other types of partial differential equations can be modeled, generating effects like auto-waves, spiral waves, Turing patterns, and so on, e.g., Perez-Munuzuri et al. in [7].

Relation to Biology Many topographical sensory organs have processing neural-cell structures very similar to the CNN model. Local connectivity in a few sheets of regularly situated neurons is very typical. Vision, especially the retina, reﬂects these properties strikingly. It is not surprising that, based on standard neurobiological models, CNN models have been applied to the modeling of the subcortical visual pathway [9]. Moreover, a new method has been devised to use the CNN universal machine for combining retina models of different species in a programmed way. Modalities from other sensory organs can be modeled similarly and combined with the retina models [12]. This has been called Bionic Eye. Many of these models are neuromorphic. This means that there is a one-to-one correspondence between the neuroanatomy and the CNN structure. Moreover, the CNN template reﬂects the interconnection

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FIGURE 7.12 The length tuning effect. The input image on the LHS contains bars of different lengths. The out image on the RHS contains only those that are smaller than a given length. Source: T. Roska, J. Hámori, E. Lábos, K. Lotz. J. Takács, p. Venetianer, Z. Vidnyánszki and A. Zarándy, “The use of CNN models in the subcortical visual pathway,” IEEE Trans. Circuits Syst. I, vol. pp. 182–195, 1993. © 1993 IEEE.

pattern of the neurons (called receptive ﬁeld organizations). Length tuning is such an example. A corresponding input and output picture of the neuromorphic length tuning model is shown in Figure 7.12. Those bars are detected that have lengths smaller than or equal to 3 pixels.

7.5

Template Library: Analogical CNN Algorithms

During the last few years, after the invention of the cellular neural network paradigm and the CNN universal machine, many new cloning templates have been discovered. In addition, the number of innovative analogical CNN algorithms, combining both analog cloning templates and local as well as global logic, is presently steadily increasing at a rapid rate. As an illustration, let us choose a couple of cloning templates from the CNN library [1], [11]. In each case, a name, a short description of the function, the cloning templates, and a representative input–output image pair are shown. With regard to the inputs, the default case means that the input and initial state are the same. If B = 0, then the input picture is chosen as the initial state. Name: AVERAGE Function. Spatial averaging of pixel intensities over the r = 1 convolutional window. 0 A = 1 0

1 2 1

Example. Input and output picture.

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0 1 0

0 B = 0 0

0 0 0

0 0 0

I =0

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Name: AND Function. Logical “AND” function of the input and the initial state pictures. 0 A = 0 0

0 1.5 0

0 0 0

0 B = 0 0

0 1.5 0

0 0 0

I = −1

Example. Input, initial state, and output picture. INPUT 1

INPUT 2

OUTPUT 2

Name: CONTOUR Function. Gray-scale contour detector. 0 A = 0 0

0 2 0

0 0 0

a B = a a

a a a

a a a

a 0.5 –0.18

0.18 v

–1

Example. Input and output picture.

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x1 j - v xk1

I = 0.7

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Name: CORNER Function. Convex corner detector. 0 A = 0 0

−0.25 B = −0.25 −0.25

0 0 0

0 2 0

−0.25 2 −0.25

−0.25 −0.25 −0.25

I = −3

Example. Input and output picture.

INPUT 1

OUTPUT 1

Name: DELDIAG1 Function. Deletes one pixel wide diagonal lines (5). 0 A = 0 0

0 2 0

0 0 0

−0.25 B= 0 −0.25

0 0 0

−0.25 0 −0.25

I = −2

Example. Input and output picture.

INPUT 1

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OUTPUT 2

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Name: DIAG Function. Detects approximately diagonal lines situated in the SW-NE direction. 0 0 A = 0 0 0

0

0

0

0

0

0

0

2

0

0

0

0

0

0

0

0 0 0 0 0

−1 −1 B = −0.5 0.5 1

−1

−0.5

0.5

−0.5

1

1

1

5

1

1

1

−0.5

0.5

−0.5

−1

1 0.5 −0.5 −1 −1

I = −9 Example. Input and output picture.

Name: EDGE Function. Black and white edge detector. 0 A = 0 0

0 2 0

0 0 0

−0.25 B = −0.25 −0.25

−0.25 2 −0.25

−0.25 −0.25 −0.25

I = −1.5

Example. Input and output picture. INPUT 1

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OUTPUT 1

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Name: MATCH Function. Detects 3 × 3 patterns matching exactly the one prescribed by the template B, namely, having a black/white pixel where the template value is +1/–1, respectively. 0 A = 0 0

0 0 0

0 1 0

v B = v v

v v v

v v v

I = − N + 0.5

where v = +1, if corresponding pixel is required to be black; v = 0, if corresponding pixel is don’t care; v = –1, if corresponding pixel is required to be white; N = number of pixels required to be either black or white, i.e., the number of nonzero values in the B template. Example. Input and output picture, using the following values: 0 A = 0 0

0 0 0

0 1 0

1 B = 0 1

−1 1 −1

1 0 1

INPUT 1

I = −6.5

OUTPUT 1

Name: OR Function. Logical “OR” function of the input and the initial state. 0 A = 0 0

0 3 0

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0 0 0

0 B = 0 0

0 3 0

0 0 0

I =2

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Example. Input, initial state, and output picture. INPUT 1

INPUT 2

OUTPUT 2

Name: PEELIPIX Function. Peels one pixel from all directions. 0 A = 0.4 0

0.4 1.4 0.4

0 0.4 0

4.6 B = −2.8 4.6

−2.8 1 −2.8

4.6 −2.8 4.6

I = −7.2

Example. Input and output picture. INPUT 1

7.6

OUTPUT 1

Recent Advances

After the ﬁrst few integrated circuit implementations of the basic CNN circuits, stored programmable analogic CNN Universal Machine chips have been fabricated. Indeed, a full-ﬂedged version of them [13] is the ﬁrst visual microprocessor. All the 4096 cell processors of it contain an optical sensor right on the surface of the chip (a focal plane). This implementation represents, at the same time, the most complex operational, stored programmable analog CMOS integrated circuit ever reported, in terms of the number of transistors operating in analog mode (about 1 million). The equivalent digital computing power of this visual microprocessor is about a few TeraOPS (trillion operations per second). It processes grayscale input images and has a gray-scale output. A 128 × 128 processor version has recently been fabricated. A binary input/output CNN Universal Machine Chip with 48 × 48 cell processors has a higher cell density [14], and another circuit design strategy [18] is aiming to implement 5 × 5 or even higher neighborhood templates.

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7-17

These chips are the ﬁrst examples of a new, analogic, topographic (spatial-temporal) computing technology. Its computational infrastructure (high level language, called Alpha, compiler, operating system, etc.) has also been developed [15], and the industrial applications have been started in a couple of companies worldwide. Moreover, a key application area of this technology is sensor-computing [17]. Integrating 2-D topographic sensor arrays with the CNN universal machine on a single chip, providing a direct, dynamic interaction with tuning of the sensors is a capability no other technology offers with comparable computational power. Recently, it has been shown that partial differential equation (PDE)-based techniques, the most advanced methods for complex image processing problems, could solve tasks intractable with other methods. Their only drawback is the excessive digital computing power they need. In our cellular computing technology, however, the elementary instruction could be a solution of a PDE. It has been shown that, in addition to the simple diffusion PDE implementation described previously, almost all PDEs can be implemented by CNN [16]. Indeed, active waves [23] have been successfully applied using operational analogic CNN Universal Machine Chips with 4096 cell processors, manifesting at least 3 orders of magnitude speed advantage compared to fully digital chips of comparable IC technology feature size. Following the ﬁrst steps in modeling living sensory modalities, especially vision, motivated especially by a breakthrough in understanding the neurobiological constructs of the mammalian retina [19], new models and a modeling framework [20] have been developed based on CNNs. Their implementation in Complex Cell CNN Universal Machines [24] are under construction. Studies in complexity related to CNN models and implementations have been emerging recently. Following the groundbreaking theoretical studies of Turing on the morphogenesis of CNN-like coupled nonlinear units [21] and a few experimental case studies of the well-publicized “complex systems”, as well as many exotic waves generated by coupled A template CNNs, the root of complexity in pattern formation at the edge of chaos has been discovered [22]. As far as the computational complexity is concerned, the study of a new quality of computational complexity has been explored [25], showing qualitatively different properties compared to the classical digital complexity theory as well as the complexity on reals [30]. To further explore the vast amount of literature on CNN technology and analogic cellular computing, the interested reader could consult the bibliography at the Website of the Technical Committee on Cellular Neural Networks and Array Computing of the IEEE Circuits and Systems Society (http://www.ieeecas.org/~cnnactc), some recent monographs [26, 27, 28], and an undergraduate textbook [29].

References [1] L. O. Chua and L. Yang, “Cellular neural networks: Theory,” IEEE Trans. Circuits Syst., vol. 35, pp. 1257–1272, 1988;. [2] L. O. Chua and L. Yang, “Cellular neural networks: Applications,” IEEE Trans. Circuits Syst., vol. 35, pp. 1273–1290, 1988. [3] L. O. Chua and T. Roska, “The CNN paradigm,” IEEE Trans. Circuits Syst., I vol. 40, pp. 147–156, 1993. [4] J. Cruz and L. O. Chua, “A CNN chip for connected component detection,” IEEE Trans. Circuits Syst., vol. 38, pp. 812–817, 1991. [5] R. Dominguez-Castro, S. Espejo, A. Rodriguez-Vazquez, and R. Carmona, “A CNN Universal Chip in CMOS Technology,” Proc. IEEE 3rd Int. Workshop on CNN and Applications, (CNNA-94), Rome, pp. 91–96, 1994. [6] H. Harrer, J.A. Nossek, and R. Stelzl, “An analog implementation of discrete-time cellular neural networks,” IEEE Trans. Neural Networks, vol. 3, pp. 466–476, 1992. [7] J. A. Nossek and T. Roska, Eds. Special Issues on Cellular Neural Networks, IEEE Trans. Circuits Syst. I, vol. 40, Mar. 1993; Special Issue on Cellular Neural Networks, IEEE Trans. Circuits Syst. II, vol. 40, Mar. 1993.

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[8] T. Roska, and L. O. Chua, “The CNN universal machine: An analogic array computer,” IEEE Trans. Circuits Syst. II, vol. 40, pp. 163–173, 1993. [9] T. Roska, J. Hamori, E. Labos, K. Lotz, K. Takacs, P. Venetianer, Z. Vidnyanszki, and A. Zarandy. “The use of CNN models in the subcortical visual pathway,” IEEE Trans. Circuits Syst., I, vol. 40, pp. 182–195, 1993. [10] T. Roska and J. Vandewalle, Eds., Cellular Neural Networks. Chischester: Wiley, 1993. [11] CANDY (CNN Analogic Nonlinear Dynamics) Simulator, guide and program (student Version) http://lab.analogic.sztaki.hu. [12] F. Werblin, T. Roska, L.O. Chua, “The analogic cellular neural network as a bionic eye”, Int. J. CircuitTheory and Applications, (CTA), Vol.23. N.6. pp. 541-569, 1995. [13] G. Linán, S. Espejo, R. Dominguez-Castro, E. Roca, and A.Rodriguez-Vázquez, “CNNUC3: A mixed signal 64x64 CNN Universal Chip”, Proceedings of MicroNeuro, pp. 61-68, 1999. [14] A. Paasio, A. Davidzuk, K. Halonen, and V. Porra, “Minimum-size 0.5 micron CMOS Programmable 48 by 48 Test Chip”, Proceedings of ECCTD 97, pp.154-156, 1997. [15] T. Roska, Á. Zarándy, S. Zöld, P. Földesy and P. Szolgay, “The Computational Infrastructure of Analogic CNN Computing — Part I: The CNN-UM Chip Prototyping System”, IEEE Trans. on Circuits and Systems I: Special Issue on Bio-Inspired Processors and Cellular Neural Networks for Vision, (CAS-I Special Issue), vol. 46, No.2, pp. 261-268, 1999. [16] T. Roska, L. O. Chua, D. Wolf, T. Kozek, R. Tetzlaff, and F. Puffer, “ Simulating Nonlinear Waves and Partial Differential Equations via CNN”, IEEE Trans. on Circuits and Systems I,vol.42, pp. 807815, 1995. [17] T. Roska, “Computer-Sensors: spatial-temporal computers for analog array signals, dynamically integrated with sensors”, J. VLSI Signal Processing Systems, vol. 23, pp. 221-238, 1999. [18] W. C. Yen, C. Y. Wu, “The Design of Neuron-Bipolar Junction Transistor (vBJT) Cellular Neural Network (CNN) Structure with Multi-Neighborhood-Layer Templates”, Proceedings of IEEE Int. Workshop on Cellular Neural Networks and Their Applications, (CNNA’2000), pp. 195-200, 2000. [19] B. Roska and F. S. Werblin, “Vertical interactions across ten parallel, stacked representations in the mammalian retina”, Nature, vol. 410, pp.583-587, March 29, 2001. [20] F. Werblin, B. Roska, D. Bálya, Cs. Rekeczky, T. Roska, “Implementing a Retinal Visual Language in CNN: a Neuromorphic Case Study”, Proceedings of IEEE ISCAS 2001, Vol. III, pp.333-336, 2001. [21] A. M. Turing, “The chemical basis of morphogenesis”, Philos.Trans. R. Soc., London, vol. B237, pp. 37-72, 1952. [22] L. O. Chua, CNN: A Paradigm for Complexity, World Scientiﬁc, Singapore, 1998. [23] Cs. Rekeczky and L. O. Chua, “Computing with Front Propagation- Active Contours and Skeleton Models in Continuous-time CNN”, J. VLSI Signal Processing Systems, vol. 23, pp. 373-402, 1999. [24] Cs. Rekeczky, T. Serrano, T. Roska, and Á. Rodríguez-Vázquez, “A stored program 2nd order/3layer Complex Cell CNN-UM”, Proceedings of IEEE Int.Workshop on Cellular Neural Networks and Their Applications (CNNA-2000), pp.15-20, 2000. [25] T. Roska, “AnaLogic Wave Computers – Wave-type Algorithms: Canonical Description, Computer Classes, and Computational Complexity”, Proceedings of IEEE ISCAS 2001, vol. III, pp.41-44, 2001. [26] G. Manganaro, P. Arena, and L. Fortuna, Cellular Neural Networks – Chaos, Complexity and VLSI Processing, Springer, Berlin, 1999. [27] M. Hänggi and G. Moschitz, Cellular Neural Networks – Analysis, Design and Optimization, Kluwer Academic Publishers, Boston, 2000. [28] T. Roska and Á. Rodríguez-Vázquez (eds), Towards the Visual Microprocessor – VLSI Design and the Use of Cellular Neural Network Universal Machine, J. Wiley, New York, 2001. [29] L. O. Chua and T. Roska, Cellular Neural Network and Visual Computing — Foundations and Applications, Cambridge University Press, New York, 2002. [30] L. Blum, F. Cucker, M. Shub, and S. Smale, Complexity and Real Computation, Springer, New York, 1998.

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8 Bifurcation and Chaos 8.1

Introduction to Chaos ....................................................... 8-1 Electrical and Electronic Circuits as Dynamical Systems • Classification and Uniqueness of Steady-State Behaviors • Stability of Steady-State Trajectories • Horseshoes and Chaos • Structural Stability and Bifurcations

8.2

Chua’s Circuit: A Paradigm for Chaos ........................... 8-26 Dynamics of Chua’s Circuit • Chaos in Chua’s Circuit • SteadyStates and Bifurcations in Chua’s Circuit • Manifestations of Chaos • Practical Realization of Chua’s Circuit • Experimental Steady-State Solutions • Simulation of Chua’s Circuit • Dimensionless Coordinate and the α–β Parameter-Space Diagram

8.3

Chua’s Oscillator............................................................... 8-39 State Equations • Topological Conjugacy • Eigenvalues-toParameters Mapping Algorithm for Chua’s Oscillator • Example: Torus

8.4

Van der Pol Neon Bulb Oscillator .................................. 8-45 Winding Numbers • The Circle Map • Experimental Observations of Mode-Locking and Chaos in van der Pol’s Neon Bulb Circuit • Circuit Model

8.5

Synchronization of Chaotic Circuits .............................. 8-54 Linear Mutual Coupling • Pecora–Carroll Drive-Response Concept

8.6

Michael Peter Kennedy University College, Dublin Ireland

8.1

Applications of Chaos...................................................... 8-62 Pseudorandom Sequence Generation • Spread-Spectrum and Secure Communications • Vector Field Modulation • Example: Communication via Vector Field Modulation Using Chua’s Circuits • Miscellaneous

Introduction to Chaos

Electrical and Electronic Circuits as Dynamical Systems A system is something having parts that may be perceived as a single entity. A dynamical system is one that changes with time; what changes is the state of the system. Mathematically, a dynamical system consists of a space of states (called the state space or phase space) and a rule, called the dynamic, for determining which state corresponds at a given future time to a given present state [8]. A deterministic dynamical system is one where the state, at any time, is completely determined by its initial state and dynamic. In this section, we consider only deterministic dynamical systems. A deterministic dynamical system may have a continuous or discrete state space and a continuoustime or discrete-time dynamic.

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Nonlinear and Distributed Circuits

A lumped1 circuit containing resistive elements (resistors, voltage and current sources) and energystorage elements (capacitors and/or inductors) may be modeled as a continuous-time deterministic dynamical system in n. The evolution of the state of the circuit is described by a system of ordinary differential equations called state equations. Discrete-time deterministic dynamical systems occur in electrical engineering as models of switchedcapacitor and digital filters, sampled phase-locked loops, and sigma–delta modulators. Discrete-time dynamical systems also arise when analyzing the stability of steady-state solutions of continuous-time systems. The evolution of a discrete-time dynamical system is described by a system of difference equations. Continuous-Time Dynamical Systems Theorem 1: (Existence and Uniqueness of Solution for a Differential Equation) Consider a continuoustime deterministic dynamical system defined by a system of ordinary differential equations of the form

(

X˙ (t ) = F X(t ), t

)

(8.1)

where X(t) ∈n is called the state, X˙ (t ) denotes the derivative of X(t) with respect to time, X(t 0 ) = X 0 is called the initial condition, and the map F(·,·):n × + → n is (i) continuous almost everywhere 2 on n × + and (ii) globally Lipschitz3 in X. Then, for each (X0, t0) ∈ n × +, there exists a continuous function φ(·; X0, t0): + → n such that φ(t 0 ; X 0 , t 0 ) = X 0 and

(

φ˙ (t ; X 0 , t 0 ) = F φ (t ; X 0 , t 0 ), t

)

(8.2)

Furthermore, this function is unique. The function φ(·; X0, t0) is called the solution or trajectory (X0, t0) of the differential equation (8.1). The image {φ(t; X0, t0) ∈nt ∈+}of the trajectory through (X0, t0) is a continuous curve in n called the orbit through (X0, t0). F(·, ·) is called the vector field of (8.1) because its image F(X, t) is a vector that defines the direction and speed of the trajectory through X at time t. The vector field F generates the flow φ, where φ(·;·,·):+ × n × + → n is a collection of continuous maps {φ(t ;·,·):n × + → nt ∈+}. In particular, a point X0 ∈n at t0 is mapped by the flow into X(t ) = φt (t ; X 0 , t 0 ) at time t. Autonomous Continuous-Time Dynamical Systems If the vector field of a continuous-time deterministic dynamical system depends only on the state and is independent of time t, then the system is said to be autonomous and may be written as

[

]

X˙ (t ) = F X(t ) 1

A lumped circuit is one with physical dimensions that are small compared with the wavelengths of its voltage and current waveforms [2]. 2By continuous almost everywhere, we mean the following: let D be a set in that contains a countable number + of discontinuities and for each X ∈n, assume that the function t∈+\D → F(X, t)∈n is continuous and for any τ ∈D the left-hand and right-hand limits F(X, τ–) and F(X, τ+), respectively, are finite in n [1]. This condition includes circuits that contain switches and/or squarewave voltage and current sources. 3There is a piecewise continuous function k(·): → such that F(X, t) – F(X′, t) ≤ k(t) X – X′, ∀t∈ , + + + ∀X, X′ ∈n.

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Bifurcation and Chaos

φt

φt (Br(X0))

Br(X0) X0

φt (X0)

Bε(X0)

φt (Bε(X0))

FIGURE 8.1 The vector field F of an autonomous continuous-time dynamical system generates a flow φ that maps a point X 0 in the state space to its image φt (X0) t seconds later. A volume of state space Br (X0) evolves under the flow into a region φt [Br (X0)]. Sufficiently close to the trajectory φt (X0), the linearized flow maps a sphere of radius ε into an ellipsoid.

or simply X˙ = F( X )

(8.3)

If, in addition, the vector field F(·): n → n is Lipschitz 4, then there is a unique continuous function φ(·, X0): + → n (called the trajectory through X0), which satisfies,

[

]

φ˙ (t , X 0 ) = F φ (t , X 0 ) ,

φ(t 0 , X 0 ) = X 0

(8.4)

Because the vector field is independent of time, we choose t0 ≡ 0. For shorthand, we denote the flow by φ and the map φ(t,·): n → n by φt . The t-advance map φt takes a state X0 ∈n to state X(t) = φt (X0) t seconds later. In particular, φ0 is the identity mapping. Furthermore, φt+s = φt φs, because the state Y = φs(X) to which X evolves after time s evolves after an additional time t into the same state Z as that to which X evolves after time t + s:

[

]

Z = φt (Y ) = φt φs ( X ) = φt +s ( X ) A bundle of trajectories emanating from a ball Br (X 0 ) of radius r centered at X 0 is mapped by the flow into some region φt [Br (X 0 )] after t seconds (see Figure 8.1). Consider a short segment of the trajectory φt (X 0 ) along which the flow is differentiable with respect to X: in a sufficiently small neighborhood of this trajectory, the flow is almost linear, so the ball Bε(X0) of radius ε about X0 evolves into an ellipsoid φt[Bε(X0)], as shown. An important consequence of Lipschitz continuity in an autonomous vector field and the resulting uniqueness of solution of (8.3) is that a trajectory of the dynamical system cannot go through the same point twice in two different directions. In particular, no two trajectories may cross each other; this is called the noncrossing property [18]. Nonautonomous Dynamical Systems A nonautonomous, n-dimensional, continuous-time dynamical system may be transformed to an (n + 1)dimensional autonomous system by appending time as an additional state variable and writing

[

]

X˙ (t ) = F X(t ), X n+1 (t ) X˙ n+1 (t ) = 1 4

There exists a finite k∈n such that F(X) – F(X′) ≤ k X – X′, ∀X, X′ ∈n.

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(8.5)

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Nonlinear and Distributed Circuits

In the special case where the vector field is periodic with period T, as for example in the case of an oscillator with sinusoidal forcing, the periodically forced system (8.5) is equivalent to the (n + 1)st order autonomous system

(

X˙ (t ) = F X(t ), θ(t )T

) (8.6)

1 θ˙ (t ) = T

where θ(t) = Xn+1 /T. By identifying the n-dimensional hyperplanes corresponding to θ = 0 and θ = 1, the state space may be transformed from n × + into an equivalent cylindrical state space n × S1, where S1 denotes the circle. In the new coordinate system, the solution through (X0, t0) of (8.6) is X(t ) φ ( X , t ) t 0 0 = θ 1 (t ) t T mod 1 S where θ(t) ∈+ is identified with a point on S 1 (which has normalized angular coordinate θS1 (t)∈[0, 1)) via the transformation θS1(t) = θ(t) mod 1. Using this technique, periodically forced nonautonomous systems can be treated like autonomous systems. Discrete-Time Dynamical Systems Consider a discrete-time deterministic dynamical system defined by a system of difference equations of the form

(

X(k + 1) = G X(k ), k

)

(8.7)

where X(k)∈n is called the state, X(k0 ) = X 0 is the initial condition, and G(·,·): n × + → n maps the current state X(k) into the next state X(k + 1), where k0 ∈+. By analogy with the continuous-time case, there exists a function φ(·,X0,k0):+ → n such that φ(k0 ; X 0 , k0 ) = X 0 and

(

φ(k + 1; X 0 , k0 ) = G φ(k; X 0 , k0 ), k

)

The function φ(·; X0, k0): + → n is called the solution or trajectory through (X 0 , k0 ) of the difference equation (8.7). The image {φ(k; X0, k0) ∈n k ∈+} in n of the trajectory through (X 0 , k0 ) is called an orbit through (X 0 , k0 ). If the map G(⋅ , ⋅) of a discrete-time dynamical system depends only on the state X(k) and is independent of k then the system is said to be autonomous and may be written more simply as X k +1 = G ( X k )

(8.8)

where Xk is shorthand for X(k) and the initial iterate k0 is chosen, without loss of generality, to be zero. Using this notation, Xk is the image X0 after k iterations of the map G(·): n → n. Example: Nonlinear Parallel RLC Circuit. Consider the parallel RLC circuit in Figure 8.2. This circuit contains a linear inductor L, a linear capacitor C2, and a nonlinear resistor NR′, where the continuous piecewise-linear driving-point (DP) characteristic (see Figure 8.3) has slope Ga′ for VR′ ≤ E and slope G ′b for VR′ > E . The DP characteristic of N R′ may be written explicitly

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Bifurcation and Chaos

C2

L I3

I′R

+

+

V2

V′R

−

−

N′R

FIGURE 8.2 Parallel RLC circuit where the nonlinear resistor N R′ has a DP characteristic as illustrated in Figure 8.3. By Kirchhoff ’s voltage law, VR′ = V2.

I′R

I′R G′b

G′a

G′b

−E

0′

−E ′ VR

E

G′b

(a)

G′b

G′a 0′

E

′ VR

(b)

FIGURE 8.3 DP characteristic of NR′ in Figure 8.2 when (a) Ga′ and (b) G a′ > 0.

I R′ (VR′ ) = Gb′VR′ +

1 2

(Ga′ − Gb′ ) ( VR′ + E − VR′ − E )

This circuit may be described by a pair of ordinary differential equations and is therefore a secondorder, continuous-time dynamical system. Choosing I 3 and V2 as state variables, we write dI 3 1 = − V2 dt L dV2 1 1 = I − I ′ (V ) dt C2 3 C2 R 2 with I3(0) = I30 and V2(0) = V20. We illustrate the vector field by drawing vectors at uniformly-spaced points in the two-dimensional state space defined by (I3, V2). Starting from a given initial condition (I30, V20), a solution curve in state space is the locus of points plotted out by the state as it moves through the vector field, following the direction of the arrow at every point. Figure 8.4 illustrates typical vector fields and trajectories of the circuit. If L, C2, and Gb′ are positive, the steady-state behavior of the circuit depends on the sign of Ga′ . When Ga′ > 0, the circuit is dissipative everywhere and all trajectories collapse toward the origin. The unique steady-state solution of the circuit is the stable dc equilibrium condition I3 = V2 = 0. If Ga′ > 0, NR′ looks like a negative resistor close to the origin and injects energy into the circuit, pushing trajectories away. Further out, where the characteristic has positive slope, trajectories are pulled in by the dissipative vector field. The resulting balance of forces produces a steady-state orbit called a limit cycle, which is approached asymptotically by all initial conditions of this circuit. This limit cycle is said to be attracting because nearby trajectories move toward it and is structurally stable in the sense that, for almost all values of Ga′, a small change in the parameters of the circuit has little effect on it. In the special case when Ga′ ≡ 0, a perturbation of Ga′ causes the steady-state behavior to change from an equilibrium point to a limit cycle; this is called a bifurcation. In the following subsections, we consider in detail steady-state behaviors, stability, structural stability, and bifurcations.

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Nonlinear and Distributed Circuits

(a)

(b)

FIGURE 8.4 Vector fields for the nonlinear RLC circuit in Figure 8.2. L = 18 mH, C2 = 100 nF, E = 0.47 V. (a) G ′a = 242.424 µS, Gb′ = 1045.455 µS: all trajectories converge to the origin (b) G a′ = –257.576 µS, G b′ = 545.455 µS: the unique steady-state solution is a limit cycle. Horizontal axis: I3, 400 µA/div; vertical axis: V2, 200 mV/div. Source: M. P. Kennedy, “Three steps to chaos — Part I: Evolution,” IEEE Trans. Circuits Syst. I, vol. 40, p. 647, Oct. 1993. © 1993 IEEE.

Classification and Uniqueness of Steady-State Behaviors A trajectory of a dynamical system from an initial state X0 settles, possibly after some transient, onto a set of points called a limit set. The -limit set corresponds to the asymptotic behavior of the system as t → +∞ and is called the steady-state response. We use the idea of recurrent states to determine when the system has reached steady-state. A state X of a dynamical system is called recurrent under the flow φ if, for every neighborhood Bε(X) of X and for every T > 0, there is a time t > T such that φt(X) ∩ Bε(X) ≠ ∅. Thus, a state X is recurrent if, by waiting long enough, the trajectory through X repeatedly returns arbitrarily close to X [7]. Wandering points correspond to transient behavior, while steady-state or asymptotic behavior corresponds to orbits of recurrent states. A point Xω is an ω-limit point of X 0 if and only if lim k→+∞ φtk (X 0 ) = X ω for some sequence {tkk∈+ such that tk → +∞. The set L(X0) of ω-limit points of X0 is called ω-limit set of X0.5 A limit set L is called attracting if there exists a neighborhood U of L such that L(X)0 = L for all X 0 ∈U. Thus, nearby trajectories converge toward an attracting limit set as t → ∞. An attracting set that contains at least one orbit that comes arbitrarily close to every point in is called an attractor [7]. In an asymptotically stable linear system the limit set is independent of the initial condition and unique so it makes sense to talk of the steady-state behavior. By contrast, a nonlinear system may possess several different limit sets and therefore may exhibit a variety of steady-state behaviors, depending on the initial condition. The set of all points in the state space that converge to a particular limit set L is called the basin of attraction of L. Because nonattracting limit sets cannot be observed in physical systems, the asymptotic or steady-state behavior of a real electronic circuit corresponds to motion on an attracting limit set.

5The set of points to which trajectories converge from X as t → –∞ is called the α-limit set of X . We consider 0 0 only positive time, therefore, by limit set, we mean the ω-limit set.

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Equilibrium Point The simplest steady-state behavior of a dynamical system is an equilibrium point. An equilibrium point or stationary point of (8.3) is a state XQ at which the vector field is zero. Thus, F(XQ) = 0 and φt (XQ) = XQ; a trajectory starting from an equilibrium point remains indefinitely at that point. In state space, the limit set consists of a single nonwandering point XQ. A point is a zero-dimensional object. Thus, an equilibrium point is said to have dimension zero. In the time domain, an equilibrium point of an equilibrium circuit is simply a dc solution or operating point. An equilibrium point or fixed point of a discrete-time dynamical system is a point XQ that satisfies

( )

G XQ = XQ Example: Nonlinear Parallel RLC Circuit. The nonlinear RLC circuit shown in Figure 8.2 has just one equilibrium point (I3Q, V2Q ) = (0,0). When Ga′ is positive, a trajectory originating at any point in the state converges to this attracting dc steady-state [as shown in Figure 8.4(a)]. The basin of attraction of the origin is the entire state space. All trajectories, and not just those that start close to it, converge to the origin, so this equilibrium point is said to be a global attractor. When Ga′ < 0, the circuit possesses two steady-state solutions: the equilibrium point at the origin, and the limit cycle Γ. The equilibrium point is unstable in this case. All trajectories, except that which starts at the origin, are attracted to Γ. Periodic Steady-State A state X is called periodic if there exists T > 0 such that φT (X) = X. A periodic orbit which is not a stationary point is called a cycle. A limit cycle Γ is an isolated periodic orbit of a dynamical system [see Figure 8.5(b)]. The limit cycle trajectory visits every point on the simple closed curve Γ with period T. Indeed, φt (X) = φt+T (X)∀ X ∈Γ. Thus, every point on the limit cycle Γ is a nonwandering point. A limit cycle is said to have dimension one because a small piece of it looks like a one-dimensional object: a line. Then, n components X i (t ) of a limit cycle trajectory X(t) = [X1(t), X2(t), …, Xn(t)]T in n are periodic time waveforms with period T. Every periodic signal X(t) may be decomposed into a Fourier series — a weighted sum of sinusoids at integer multiples of a fundamental frequency. Thus, a periodic signal appears in the frequency domain as a set of spikes at integer multiples (harmonics) of the fundamental frequency. The amplitudes of these spikes correspond to the coefficient in the Fourier series expansion of X(t). The Fourier transform is an extension of these ideas to aperiodic signals; one considers the distribution of the signal’s power over a continuum of frequencies rather than on a discrete set of harmonics. The distribution of power in a signal X(t) is most commonly quantified by means of the power density spectrum, often simply called the power spectrum. The simplest estimator of the power spectrum is the periodogram [17], which given N uniformly spaced samples X(k/fs), k = 0, 1, …, N – 1 of X (t), yields N/2 + 1 numbers P(nfs/N), n = 0, 1, …, N/2, where fs is the sampling frequency. If one considers the signal X(t) as being composed of sinusoidal components at discrete frequencies, then P(nfs /N) is an estimate of the power in the component at frequency nfs /N. By Parseval’s theorem, the sum of the power in each of these components equals the mean squared amplitude of the N samples of X(t) [17]. If X(t) is periodic with period T, then its power will be concentrated in a dc component, a fundamental frequency component 1/T, and harmonics. In practice, the discrete nature of the sampling process causes power to “leak” between adjacent frequency components; this leakage may be reduced by “windowing” the measured data before calculating the periodogram [17].

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Nonlinear and Distributed Circuits

6 4 2 0 −2 −4 −6

V1

0

5

10

15

20

25

30

35

40

45

50

0 −20 −40

V2

I3

−60 −80 −100

0

0.5

1

1.5

2

2.5

(a) 6 4 2 0 −2 −4 −6

V1

0

5

10

15

20

25

30

35

40

45

50

0 −20 −40

V2

I3

−60 −80 −100

0

0.5

1

1.5

2

2.5

(b) 6 4 2 0 −2 −4 −6

V1

0

5

10

15

20

25

30

35

40

45

50

0 −20 −40

V2

I3

−60 −80 −100

0

0.5

1

1.5

2

2.5

(c)

FIGURE 8.5 Quasiperiodicity (torus breakdown) route to chaos in Chua’s oscillator. Simulated state space trajectories, time waveforms V1(t), and power spectra of V2(t). (a) Quasiperiodic steady-state — the signal is characterized by a discrete power spectrum with incommensurate frequency components; (b) periodic window — all spikes in the power spectrum are harmonically related to the fundamental frequency; (c) chaotic steady-state following breakdown of the torus — the waveform has a broadband power spectrum. Time plots; horizontal axis — t (ms); vertical axis — V1(V). Power spectra: horizontal axis — frequency (kHz); vertical axis — power (mean squared amplitude) of V2(t) (dB).

Example: Periodic Steady-State Solution. Figure 8.5(b) depicts a state-space orbit, time waveform, and power spectrum of a periodic steady-state solution of a third-order, autonomous, continuous-time dynamical system. The orbit in state space is an asymmetric closed curve consisting of four loops. In the time domain, the waveform has four crests per period and a dc offset. In the power spectrum, the dc offset manifests itself as a spike at zero frequency. The period of approximately 270 Hz produces a fundamental component at that frequency. Notice that the fourth harmonic (arising from “four crests per period”) has the largest magnitude. This power spectrum is reminiscent of subharmonic mode locking in a forced oscillator.

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Bifurcation and Chaos

Subharmonic Periodic Steady-State A subharmonic periodic solution or period-K orbit of a discrete-time dynamical system is a set of K points {X1, X2, …, Xk} that satisfy X 2 = G ( X1 )

X 3 = G ( X 2 )… X K = G ( X K −1 )

X1 = G ( X K )

More succinctly, we may write Xi = G(K)(Xi), where G(K) = G[G( [G(·)] )] denotes G applied K times to the argument of the map; this is called Kth iterate of G. Subharmonic periodic solutions occur in systems that contain two or more competing frequencies, such as forced oscillators or sampled-data circuits. Subharmonic solutions also arise following perioddoubling bifurcations (see the section on structural stability and bifurcations). Quasiperiodic Steady-State The next most complicated form of steady-state behavior is called quasiperiodicity. In state space, this corresponds to a torus [see Figure 8.5(a)]. Although a small piece of a limit cycle in 3 looks like a line, a small section of two-torus looks like a plane; a two-torus has dimension two. A quasiperiodic function is one that may be expressed as a countable sum of periodic functions with incommensurate frequencies, i.e., frequencies that are not rationally related. For example, X (t ) = sin(t) + sin(2πt) is a quasiperiodic signal. In the time domain, a quasiperiodic signal may look like an amplitudeor phase-modulated waveform. Although the Fourier spectrum of a periodic signal consists of a discrete set of spikes at integer multiples of a fundamental frequency, that of a quasiperiodic solution comprises a discrete set of spikes at incommensurate frequencies, as presented in Figure 8.5(a). In principle, a quasiperiodic signal may be distinguished from a periodic one by determining whether the frequency spikes in the Fourier spectrum are harmonically related. In practice, it is impossible to determine whether a measured number is rational or irrational; therefore, any spectrum that appears to be quasiperiodic may simply be periodic with an extremely long period. A two-torus in a three-dimensional state space looks like a doughnut. Quasiperiodic behavior on a higher dimensional torus is more difficult to visualize in state space but appears in the power spectrum as a set of discrete components at incommensurate frequencies. A K-torus has dimension K. Quasiperiodic behavior occurs in discrete-time systems where two incommensurate frequencies are present. A periodically-forced or discrete-time dynamical system has a frequency associated with the period of the forcing or sampling interval of the system; if a second frequency is introduced that is not rationally related to the period of the forcing or the sampling interval, then quasiperiodicity may occur. Example: Discrete Torus. Consider a map from the circle S1 onto itself. In polar coordinates, a point on the circle is parameterized by an angle θ. Assume that θ has been normalized so that one complete revolution of the circle corresponds to a change in θ of 1. The state of this system is determined by the normalized angle θ and the dynamics by θk +1 = (θk + Ω) mod 1 If Ω is a rational number (of the form J/K where J, K ∈ +), then the steady-state solution is a period-K (subharmonic) orbit. If Ω is irrational, we obtain quasiperiodic behavior. Chaotic Steady-State DC equilibrium periodic as well as quasiperiodic steady-state behaviors have been correctly identified and classified since the pioneering days of electronics in the 1920s. By contrast, the existence of more exotic steady-state behaviors in electronic circuits has been acknowledged only in the past 30 years. Although the notion of chaotic behavior in dynamical systems has existed in the mathematics literature since the turn of the century, unusual behaviors in the physical sciences as recently as the 1960s were

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Nonlinear and Distributed Circuits

described as “strange.” Today, we classify as chaos the recurrent6 motion in a deterministic dynamical system, which is characterized by a positive Lyapunov exponent. From an experimentalist’s point of view, chaos may be defined as bounded steady-state behavior in a deterministic dynamical system that is not an equilibrium point, nor periodic, and not quasiperiodic [15]. Chaos is characterized by repeated stretching and folding of bundles of trajectories in state space. Two trajectories started from almost identical initial conditions diverge and soon become uncorrelated; this is called sensitive dependence on initial conditions and gives rise to long-term unpredictability. In the time domain, a chaotic trajectory is neither periodic nor quasiperiodic, but looks “random.” This “randomness” manifests itself in the frequency domain as a broad “noise-like” Fourier spectrum, as presented in Figure 8.5(c). Although an equilibrium point, a limit cycle, and a K-torus each have integer dimension, the repeated stretching and folding of trajectories in a chaotic steady state gives the limit set a more complicated structure that, for three-dimensional continuous-time circuits, is something more than a surface but not quite a volume. Dimension The structure of a limit set L ⊂ n of a dynamical system may be quantified using a generalized notion of dimension that considers not just the geometrical structure of the set, but also the time evolution of trajectories on L. Capacity (D0 Dimension). The simplest notion of dimension, called capacity (or D0 dimension) considers a limit set simply as set of points, without reference to the dynamical system that produced it. To estimate the capacity of L, cover the set with n-dimensional cubes having side length ε. If L is a D0-dimensional object, then the minimum number N(ε) of cubes required to cover L is proportional to ε –D0. Thus, N(ε) α ε –D0. The D0 dimension is given by D0 = lim − ε →0

ln N (ε) ln ε

When this definition is applied to a point, a limit cycle (or line), or a two-torus (or surface) 3, the calculated dimensions are 0, 1, and 2, respectively, as expected. When applied to the set of nonwandering points that comprise a chaotic steady state, the D0 dimension is typically noninteger. An object that has noninteger dimension is called a fractal. Example: The Middle-Third Cantor Set. Consider the set of points that is obtained by repeatedly deleting the middle third of an interval, as indicated in Figure 8.6(a). At the first iteration, the unit interval is divided into 21 pieces of length 1/3 each; after k iterations, the set is covered by 2k pieces of length 1/3k. By contrast, the set that is obtained by dividing the intervals into thirds but not throwing away the middle third each time [Figure 8.6(b)] is covered at the kth step by 3k pieces of length 1/3k. Applying the definition of capacity, the dimension of the unit interval is lim

k→∞

k ln 3 = 1.00 k ln 3

By contrast, the middle-third Cantor set has dimension lim

k→∞

k ln 2 ≈ 0.63 k ln 3

6Because a chaotic steady-state does not settle down onto a single well-defined trajectory, the definition of recurrent states must be used to identify posttransient behavior.

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Bifurcation and Chaos

N(ε)

ε

N(ε)

20

30

30

21

3−1

31

22

3−2

32

23

3−3

33

24

3−4

34

(a)

(b)

FIGURE 8.6 (a) The middle-third Cantor set is obtained by recursively removing the central portion of an interval. At the kth step, the set consists of N(ε) = 2k pieces of length ε = 3–k. The limit set has capacity 0.63. (b) By contrast, the unit interval is covered by 3k pieces of length 3–k. The unit interval has dimension 1.00.

(a)

(b)

FIGURE 8.7 Coverings of two limit sets La (a) and Lb (b) with squares of sidelength ε0 and ε0/2, respectively.

The set is something more than a zero-dimensional object (a point) but not quite one-dimensional (like a line segment); it is a fractal. Correlation (D2 ) Dimension. The D2 dimension considers not just the geometry of a limit set, but also the time evolution of trajectories on the set. Consider the two limit sets La and Lb in 2 shown in Figure 8.7(a) and (b), respectively. The D0 dimension of these sets may be determined by iteratively covering them with squares (two-dimensional “cubes”) of sidelength ε = ε0 /2k, k = 0, 1, 2, …, counting the required number of squares N(ε) for each ε, and evaluating the limit D0 =

ln N (ε) lim − ln(ε) k→∞

For the smooth curve La, the number of squares required to cover the set grows linearly with 1/ε; hence D0 = 1.0. By contrast, if the kinks and folds in set Lb are present at all scales, then the growth of N(ε) versus 1/ε is superlinear and the object has a noninteger D0 dimension between 1.0 and 2.0. Copyright © 2006 Taylor & Francis Group, LLC

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Imagine now that La and Lb are not simply static geometrical objects but are orbits of discrete-time dynamical systems. In this case, a steady-state trajectory corresponds to a sequence of points moving around the limit set. Cover the limit set with the minimum number N(ε) of “cubes” with sidelength ε, and label the boxes 1, 2…, i, …, N(ε). Count the number of times ni (N, ε) that a typical steady-state trajectory of length N visits box i and define n i (N , ε ) N

pi = lim

N →∞

where pi is the relative frequency with which a trajectory visits the ith cube. The D2 dimension is defined as N (ε)

ln D2 = lim

∑p

2 i

i=1

ln ε

ε →0

In general, D2 ≤ D0 with equality when a typical trajectory visits all N(ε) cubes with the same relative frequency p = 1/N(ε). In this special case, N (ε)

ln

ln ε

ε →0

ε →0

2

i =1

D2 = lim = lim −

∑ N (1ε)

ln N (ε) ln ε

= D0 An efficient algorithm (developed by Grassberger and Procaccia) for estimating D2 is based on the 2 1 (the number of pairs of points (X , X ) such ---approximation Σ N(ε) i=1 p i ≈ C(ε) [15], where C(ε) = lim i j N→0 N 2 that Xi – Xj < ε) is called the correlation. The D2 or correlation dimension is given by D2 = lim ε →0

ln C (ε) ln ε

Example: Correlation (D2) Dimension. The correlation dimension of the chaotic attractor in Figure 8.5(c), estimated using INSITE, is 2.1, 2 while D2 for the uniformly covered torus in Figure 8.5(a) is 2.0.

Stability of Steady-State Trajectories Consider once more the nonlinear RLC circuit in Figure 8.2. IF Ga′ is negative, this circuit settles to a periodic steady state from almost every initial condition. However, a trajectory started from the origin will, in principle, remain indefinitely at the origin since this is an equilibrium point. The circuit has two possible steady-state solutions. Experimentally, only the limit cycle will be observed. Why? If trajectories starting from states close to a limit set converge to that steady-state, the limit set is called an attracting limit set. If, in addition, the attracting limit set contains at least one trajectory that comes arbitrarily close to every point in the set, then it is an attractor. If nearby points diverge from the limit set, it is called a repellor. In the nonlinear RLC circuit with Ga′ < 0, the equilibrium point is a repellor and the limit cycle is an attractor.

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Bifurcation and Chaos

Stability of Equilibrium Points Qualitatively, an equilibrium point is said to be stable if trajectories starting close to it remain nearby for all future time and unstable otherwise. Stability is a local concept, dealing with trajectories in a small neighborhood of the equilibrium point. To analyze the behavior of the vector field in the vicinity of an equilibrium point XQ, we write X = X Q + x and substitute into (8.3) to obtain

( ) F( X ) + x˙ ≈ F( X ) + D F( X )x X˙ Q + x˙ = F X Q + x Q

Q

x

Q

where we have kept just the first two terms of the Taylor series expansion of F(X) about XQ. The Jacobian matrix D XF(X) is the matrix of partial derivatives of F(X) with respect to X: ∂Fi ( X ) ∂X1 ∂F2 ( X ) D X F( X ) = ∂X1 ∂Fn ( X ) ∂X1

∂F1 ( X ) ∂X 2 ∂F2 ( X ) ∂X 2 ∂Fn ( X ) ∂X 2

∂F1 ( X ) ∂X n ∂F2 ( X ) ∂X n ∂Fn ( X ) ∂X n

Subtracting F(X Q ) from both sides of (8.9) we obtain the linear system

( )

x˙ = D xF X Q x

(8.9)

where the Jacobian matrix is evaluated at XQ. This linearization describes the behavior of the circuit in the vicinity of XQ; we call this the local behavior. Note that the linearization is simply the small-signal equivalent circuit at the operating point XQ. In general, the local behavior of a circuit depends explicitly on the operating point XQ. For example, a pnjunction diode exhibits a small incremental resistance under forward bias, but a large small-signal resistance under reverse bias. Eigenvalues If XQ is an equilibrium point of (8.3), a complete description of its stability is contained in the eigenvalues of the linearization of (8.3) about XQ. These are defined as the roots λ of the characteristic equation

[

( )]

det λI − D XF X Q = 0

(8.10)

where I is the identity matrix. If the real parts of all of the eigenvalues DxF(XQ) are strictly negative, then the equilibrium point XQ is asymptotically stable and is called a sink because all nearby trajectories converge toward it. If any of the eigenvalues has a positive real part, the equilibrium point is unstable; if all of the eigenvalues have positive real parts, the equilibrium point is called a source. An equilibrium point that has eigenvalues with both negative and positive real parts is called a saddle. A saddle is unstable. An equilibrium point is said to be hyperbolic if all the eigenvalues of DxF(XQ) have nonzero real parts. All hyperbolic equilibrium points are either unstable or asymptotically stable.

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WS(XQ) ES(XQ)

XQ

EU(XQ)

WU(XQ)

FIGURE 8.8 Stable and unstable manifolds W s (XQ) and W u (XQ) of an equilibrium point XQ. The stable and unstable eigenspaces E s (XQ) and E u (XQ) derived from the linearization of the vector field at XQ are tangent to the corresponding manifolds W s and W u at XQ. A trajectory approaching the equilibrium point along the stable manifold is tangential to E s (XQ) at XQ; a trajectory leaving XQ along the unstable manifold is tangential to E u (XQ) at XQ.

Discrete-Time Systems The stability of a fixed point XQ of a discrete-time dynamical system X k +1 = G ( X k ) is determined by the eigenvalues of the linearization DXG(XQ) of the vector field G, evaluated at XQ. The equilibrium point is classified as stable if all of the eigenvalues of DXG(XQ) are strictly less than unity in modulus, and unstable if any has modulus greater than unity. Eigenvectors, Eigenspaces, Stable and Unstable Manifolds →

Associated with each distinct eigenvalue λ of the Jacobian matrix DXF(XQ) is an eigenvector v defined by

( )

D XF X Q ν = λν →

A real eigenvalue γ has a real eigenvector η. Complex eigenvalues of a real matrix occur in pairs of → → the form σ ± jω. The real and imaginary parts of the associated eigenvectors ηr ± j ηc span a plane called a complex eigenplane. The ns-dimensional subspace of n associated with the stable eigenvalues of the Jacobian matrix is called the stable eigenspace, denoted E s (XQ). The nu-dimensional subspace corresponding to the unstable eigenvalues is called the unstable eigenspace, denoted E u (XQ). The analogs of the stable and unstable eigenspaces for a general nonlinear system are called the local stable and unstable manifolds7 W s(XQ) and Wu(XQ). The stable manifold W s(XQ) is defined as the set of all states from which trajectories remain in the manifold and converge under the flow to XQ. The unstable manifold W u(XQ) is defined as the set of all states from which trajectories remain in the manifold and diverge under the flow from XQ. By definition, the stable and unstable manifolds are invariant under the flow (if X ∈ W s, then φt(X)∈W s). Furthermore, the ns- and nu-dimensional tangent spaces to W s and W u at XQ are E s and E u (as shown in Figure 8.8). In the special case of a linear or affine vector field F, the stable and unstable manifolds are simply the eigenspaces E s and E u.

An m-dimensional manifold is a geometrical object every small section of which looks like m. More precisely, M is an m-dimensional manifold if, for every x ∈ M, there exists an open neighborhood U of x and a smooth invertible map which takes U to some open neighborhood of m. For example, a limit cycle of a continuous-time dynamical system is a one-dimensional manifold. 7

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WS(XQ2)

XQ2

WU(XQ)

∑

XQ1

XQ

WU(XQ1) WS(XQ)

FIGURE 8.9 (a) A homoclinic orbit joins an isolated equilibrium point XQ to itself along its stable and unstable manifolds. (b) A heteroclinic orbit joins two distinct equilibrium points, XQ1 and XQ2, along the unstable manifolds of one and the stable manifold of the other.

Chaos is associated with two characteristic connections of the stable and unstable manifolds. A homoclinic orbit [see Figure 8.9(a)] joins an isolated equilibrium point XQ to itself along its stable and unstable manifolds. A heteroclinic orbit [Figure 8.9(b)] joins two distinct equilibrium points, XQ1 and XQ2, along the unstable manifold of one and the stable manifold of the other. Stability of Limit Cycles Although the stability of an equilibrium point may be determined by considering the eigenvalues of the linearization of the vector field near the point, how does one study the stability of a limit cycle, torus, or chaotic steady-state trajectory? The idea introduced by Poincaré is to convert a continuous-time dynamical system into an equivalent discrete-time dynamical system by taking a transverse slice through the flow. Intersections of trajectories with this so-called Poincaré section define a Poincaré map from the section to themselves. Since the limit cycle is a fixed point XQ of the associated discrete-time dynamical system, its stability may be determined by examining the eigenvalues of the linearization of the Pioncaré map at XQ. Poincaré Sections A Pioncaré section of an n-dimensional autonomus continuous-time dynamical system is an (n – 1)dimensional hyperplane ∑ in the state space that is intersected transversally8 by the flow. Let Γ be a closed orbit of the flow of a smooth vector field F, and let XQ be a point of intersection of Γ with ∑. If T is the period of Γ and X ∈ ∑ is sufficiently close to XQ, then the trajectory φt (X) through X will return to ∑ after a time τ(X) ≈ T and intersect the hyperplane at a point φτ(X)(X), as illustrated in Figure 8.10. This construction implicitly defines a function (called a Poincaré map or first return map) G:U → ∑ G(X) = φτ(X)(X) where U is a small region of ∑ close to XQ. The corresponding discrete-time dynamical system Xk+1 = G(Xk) has a fixed point at XQ. The stability of the limit cycle is determined by the eigenvalues of the linearization DXG(XQ) of G at XQ. If all of the eigenvalues of DXG(XQ) have modulus less than unity, the limit cycle is asymptotically stable; if any has modulus greater than unity, the limit cycle is unstable. 8A transverse intersection of manifolds in n is an intersection of manifolds such that, from any point in the intersection, all directions in n can be generated by linear combinations of vectors tangent to the manifolds.

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U X φτ(x)(X)

∑

XQ Γ

FIGURE 8.10 A transverse Poincaré section ∑ through the flow of a dynamical system induces a discrete Poincaré map from a neighborhood U of the point of intersection XQ to ∑.

FIGURE 8.11 Experimental Poincaré sections corresponding to a torus breakdown sequence in Chua’s oscillator. (a) Torus, (b) period-four orbit, (c) chaotic attractor resulting from torus breakdown. Source: L. O. Chua, C. W. Wu, A. Hung, and G.-Q. Zhong, “A universal circuit for studying and generating chaos — Part I: Routes to chaos,” IEEE Trans. Circuits Syst., vol. 40, pp. 738, 739, Oct. 1993. 1993 IEEE.

Note that the stability of the limit cycle is independent of the position and orientation of the Poincaré plane, provided that the intersection is chosen transverse to the flow. For a nonautonomous system with periodic forcing, a natural choice for the hyperplane is at a fixed phase θo of the forcing. In the Poincaré section, a limit cycle looks like a fixed point. A period-K subharmonic of a nonautonomous system with periodic forcing appears as a period-K orbit of the corresponding map [see Figure 8.11(b)]. The Poincaré section of a quasiperiodic attractor consisting of two incommensurate frequencies looks like a closed curve — a transverse cut through a two-torus [Figure 8.11(a)]. The Poincaré section of chaotic attractor has fractal structure, as depicted in Figure 8.11(c).

Horseshoes and Chaos Chaotic behavior is characterized by sensitive dependence on initial conditions. This phrase emphasizes the fact that small differences in initial conditions are persistently magnified by the dynamics of the system so that trajectories starting from nearby initial conditions reach totally different states in a finite time. Trajectories of the nonlinear RLC circuit in Figure 8.2 that originate near the equilibrium point are initially stretched apart exponentially by the locally negative resistance in the case G ′a < 0. Eventually, however, they are squeezed together onto a limit cycle, so the stretching is not persistent. This is a consequence of the noncrossing property and eventual passivity. Although perhaps locally active, every physical resistor is eventually passive meaning that, for a large enough voltage across its terminals, it dissipates power. This in turn limits the maximum values of the voltages and currents in the circuit giving a bounded steady-state solution. All physical systems are bounded, so how can small differences be magnified persistently in a real circuit?

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G(3)

1 2 3 4 5 G(5)

G(1)

(a)

(b)

(c)

(d)

(e)

(f)

FIGURE 8.12 The Smale horseshoe map stretches the unit square (a), folds it into a horseshoe (b), and lays it back on itself (c), so that only points lying in bands 2 and 4 of (a) are mapped into the square. At the next iteration, only those points in (G(2) ∪ G(4)) ∩ (2 ∪ 4) (d) are mapped back to the square. Repeated iterations of the map (d)–(f) remove all points from the square except an invariant (fractal) set of fixed points.

Chaos in the Sense of Shil’nikov Consider a flow φ in 3 that has an equilibrium point at the origin with a real eigenvalue γ > 0 and a pair of complex conjugate eigenvalues σ ± jω with σ < 0 and ω ≠ 0. Assume that the flow has a homoclinic orbit Γ through the origin. One may define a Poincaré map for this system by taking a transverse section through the homoclinic orbit, as illustrated in Figure 8.9(a). Theorem 2 (Shil’nikov): If σ/γ < 1, the flow φ can be perturbed to φ′ such that φ′ has a homoclinic orbit Γ′ near Γ and the Poincaré map of φ′ defined in a neighborhood of Γ′ has a countable number of horseshoes in its discrete dynamics. The characteristic horseshoe shape in the Poincaré map stretches and folds trajectories repeatedly (see Figure 8.12). The resulting dynamics exhibit extreme sensitivity to initial conditions [7]. The presence of horseshoes in the flow of a continuous-time system that satisfies the assumptions of Shil’nikov’s theorem implies the existence of countable numbers of unstable periodic orbits of arbitrarily long period as well as an uncountable number of complicated bounded nonperiodic chaotic solutions [7]. Horseshoes. The action of the Smale horseshoe map is to take the unit square [Figure 8.12(a)], stretch it, fold it into a horseshoe shape [Figure 8.12(b)], and lay it down on itself [Figure 8.12(c)]. Under the action of this map, only four regions of the unit square are returned to the square.

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D1 D0 D−1

X0 P− Er(P−) Ec(P−)

FIGURE 8.13 Stretching and folding mechanism of chaos generation in Chua’s circult. A trajectory spirals away from the equilibrium point P– along the eigenplane E c (P–) until it enters the D0 region, where it is folded back into D–1 and returns to the unstable eigenplane E c (P–) close to P–. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, vol. 40, p. 657, Oct. 1993. 1993 IEEE.

Successive iterations of the horseshoe map return smaller and smaller regions of square to itself, as shown in Figure 8.12(d)–(f). If the map is iterated ad infinitum, the unit square is ultimately mapped onto a set of points. These points form an invariant (fractal) limit set L that contains a countable set of periodic orbits of arbitrarily long periods, an uncountable set of bounded nonperiodic orbits, and at least one orbit that comes arbitrarily close to every point in L. The properties of the map still hold if the horseshoe is distorted by a perturbation of small size but arbitrary shape. Thus, the dynamical behavior of the horseshoe map is structurally stable.9 Although the invariant limit set of a horseshoe map consists of nonwandering points, it is not attracting. Therefore, the existence of a horseshoe in the flow of a third-order system does not imply that the system will exhibit chaotic steady-state behavior. However if a typical trajectory in the Poincaré map remains in a neighborhood of the invariant set, then the system may exhibit chaos. Thus, although Shil’nikov’s theorem is a strong indicator of chaos, it does not provide definitive proof that a system is chaotic. Example: Chaos in a Piecewise-Linear System. Although we have stated it for the case σ < 0, γ > 0, Shil’nikov’s theorem also applies when the equilibrium point at the origin has an unstable pair of complex conjugate eigenvalues and a stable real eigenvalue. In that case, it is somewhat easier to visualize the stretching and folding of bundles of trajectories close to a homoclinic orbit. Consider the trajectory in a three-region piecewise-linear vector field in Figure 8.13. We assume that the equilibrium point P– has a stable real eigenvalue γ1 [where the eigenvector is E r(P–)] and an unstable complex conjugate pair of eigenvalues σ1 ± jω1, the real and imaginary parts of whose eigenvectors span the plane E c(P_) [2], as illustrated. A trajectory originating from a point X0 on E c(P_) spirals away from the equilibrium point along E c(P_) until it enters the D0 region, where it is folded back into D–1. Upon reentering D–1, the trajectory is pulled toward P_ roughly in the direction of the real eigenvector E r(P_), as illustrated. Now imagine what would happen if the trajectory entering D–1 from D0 were in precisely the direction E r (P_). Such a trajectory would follow E r (P_) toward P_, reaching the equilibrium point asymptotically as t → ∞. Similarly, if we were to follow this trajectory backward in time through D0 and back onto E c (P_) in D–1, it would then spiral toward P_, reaching it asymptotically as t → –∞. The closed curve thus formed would be a homoclinic orbit, reaching the same equilibrium point P_ asymptotically in forward and reverse time. Although the homoclinic orbit itself is not structurally stable, and therefore cannot be observed experimentally, horseshoes are structurally stable. A flow φ that satisfies the assumptions of Shil’nikov’s 9

Structural stability is discussed in more detail in the section on structural stability and bifurcations.

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theorem contains a countable infinity of horseshoes; for sufficiently small perturbations φ′ of the flow, finitely many of the horseshoes will persist. Thus, both the original flow and the perturbed flow exhibit chaos in the sense of Shil’nikov. In Figure 8.13, we see that a trajectory lying close to a homoclinic orbit exhibits similar qualitative behavior: it spirals away from P_ along the unstable complex plane E c (P_), is folded in D0, reenters D–1 above E c (P_), and is pulled back toward E c (P_), only to be spun away from P_ once more. Thus, two trajectories starting from distinct initial states close to P_ on E c (P_) are stretched apart exponentially along the unstable eigenplane before being folded in D1 and reinjected close to P_; this gives rise to sensitive dependence on initial conditions. The recurrent stretching and folding continues ad infinitum, producing a chaotic steady-state solution. Lyapunov Exponents The notion of sensitive dependence on initial conditions may be made more precise through the introduction of Lyapunov exponents (LEs). Lyapunov exponents quantify the average exponential rates of separation of trajectories along the flow. The flow in a neighborhood of asympototically stable trajectory is contracting so the LEs are zero or negative.10 Sensitive dependence on initial conditions results from a positive LE. To determine the stability of an equilibrium point, we considered the eigenvalues of the linearization of the vector field in the vicinity of equilibrium trajectory. This idea can be generalized to any trajectory of the flow. The local behavior of the vector field along a trajectory φt(X0) of an autonomous continuous time dynamical system (8.3) is governed by the linearized dynamics · X = DXF(X)X,

x(0) = x0

= DXF[φt(X0)]x This is a linear time-varying system where the state transition matrix, Φt(X0), maps a point x0 into x(t). Thus, x (t ) = Φt ( X 0 )x 0 Note that Φt is a linear operator. Therefore, a ball Bε(X0) of radius ε about X0 is mapped into an ellipsoid as presented in Figure 8.1. The principal axes of the ellipsoid are determined by the singular values of Φt . The singular values σ1(t), σ2(t), …, σn(t) of Φt are defined as the square roots of the eigenvalues of Φ Ht Φt , where Φ Ht is the complex conjugate transpose of Φt . The singular values are ordered so that σ1(t)> σ2(t)> … > σn(t). In particular, a ball of radius ε is mapped by the linearized flow into an ellipsoid (see Figure 8.1) the maximum and minimum radii of which are bounded by σ1(t)ε and σn(t)ε, respectively. The stability of a steady-state orbit is governed by the average local rates of expansion and contraction of volumes of state space close to the orbit. The Lyapunov exponents (LEs) λi , are defined by λ i = lim t→∞

1 ln σ i (t ) t

whenever this limit exists. The LEs quantify the average exponential rates of separation of trajectories along the flow. 10A continuous flow that has a bounded trajectory not tending to an equlibrium point has a zero Lyapunov exponent (in the direction of flow).

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The LEs are a property of a steady-state trajectory. Any transient effect is averaged out by taking the limit as t → ∞. Furthermore, the LEs are global quantities of an attracting set that depend on the local stability properties of a trajectory within the set. The set {λi, i, = 1, 2, …, n} is called the Lyapunov spectrum. An attractor has the property that the sum of its LEs is negative. Lyapunov Exponents of Discrete-Time Systems. The local behavior along an orbit of the autonomous discrete-time dynamical system (8.8) is governed by the linearized dynamics Xk+1 = DxG(Xk)xk,

k = 0, 1, 2, …

where the state transition matrix, Φk(X0), maps a point x0 into xk. Thus, xk = k(X0)x0 The Lyapunov exponents λi for the discrete-time dynamical system (8.8) are defined by λ i = lim t→∞

1 ln σ i (k ) k

whenever this limit exists. σi(k) denotes the ith singular value of Φ Hk Φk . Lyapunov Exponents of Steady-State Solutions. Consider once more the continuous-time dynamical ˜ system (8.3). If DxF were constant along the flow, with n distinct eigenvalues λi i = 1, 2, …, n, then

( )

exp λ˜ t 1 0 Φt = 0

0

( )

exp λ˜ 2 t

0 ˜ exp λ n t 0

( )

0

and

( ( ))

exp 2 Re λ˜ t 1 0 ΦtH Φt = 0

0

( ( ))

exp 2 Re λ˜ 2 t

0 exp 2 Re λ˜ n t

( ( ))

0

˜ )t) and giving σi(t) = exp(Re( λ i λ i = lim t →∞

[ ( )]

1 ln exp Re λ˜ i t t

( )

= Re λ˜ i

In this case, the LEs are simply the real parts of the eigenvalues of DXF.

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TABLE 8.1 Classification of Steady-State Behaviors According to their Limit Sets, Power Spectra, LEs, and Dimension Steady State

Limit Set

Spectrum

LEs

DC Periodic

Fixed Point Closed Curve

Quasiperiodic

K-Torus

Chaotic

Fractal

Spike at DC Fundamental Plus Integer Harmonics Incommensurate Frequencies Broad Spectrum

0 > λ1 ≥ … ≥ λn λ1 = 0 0 > λ2 ≥ … ≥ λn λ1 = … = λK = 0 0 > λK+1 ≥ … ≥ λn λ1 > 0 Σni=1 λ i < 0

Dimension 0 1 K Noninteger

All the eigenvalues of a stable equilibrium point have negative real parts and therefore the largest Lyapunov exponent of an attracting equilibrium point is negative. Trajectories close to a stable limit cycle converge onto the limit cycle. Therefore, the largest LE of a periodic steady-state is zero (corresponding to motion along the limit cycle [15]), and all its other LEs are negative. A quasiperiodic K-torus has K zero LEs because the flow is locally neither contracting nor expanding along the surface of the K-torus. S chaotic trajectory is locally unstable and therefore has a positive LE; this produces sensitive dependence on initial conditions. Nevertheless, in the case of a chaotic attractor, this locally unstable chaotic trajectory belongs to an attracting limit set to which nearby trajectories converge. The steady-state behavior of a four-dimensional continuous-time dynamical system which has two positive, one zero, and one negative LE is called hyperchaos. The Lyapunov spectrum may be used to identify attractors, as summarized in Table 8.1.

Structural Stability and Bifurcations Structural stability refers to the sensitivity of a phenomenon to small changes in the parameter of a system. A structurally stable vector field F is one for which sufficiently close vector fields F′ have equivalent11 dynamics [18]. The behavior of a typical circuit depends on a set of parameters one or more of which may be varied in order to optimize some performance criteria. In particular, one may think of a one-parameter family of systems .

X = Fµ ( X )

(8.11)

where the vector field is parametrized by a control parameter µ. A value µ0 of (8.11) for which the flow of (8.11) is not structurally stable is a bifurcation value of µ [7]. The dynamics in the state space may be qualitatively very different from one value of µ to another. In the nonlinear RLC circuit example, the steady-state solution is a limit cycle if the control parameter Ga′ is negative and an equilibrium point if Ga′ is positive. If Ga′ is identically equal to zero, trajectories starting from I30 = 0, V20 < E yield sinusoidal solutions. These sinusoidal solutions are not structurally stable because the slightest perturbation on Ga′ will cause the oscillation to decay to zero or converge to the limit cycle, depending on whether Ga′ is made slightly larger or smaller than zero. If we think of this circuit as being parametrized by Ga′, then its vector field is not structurally stable at Ga′ ≡ 0. We say that the equilibrium point undergoes a bifurcation (from stability to instability) as the value of the bifurcation parameter Ga′ is reduced through the bifurcation point Ga′ = 0.

11

Equivalent means that there exists a continuous invertible function h that transforms F into F′.

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Bifurcation Types In this section, we consider three types of local bifurcation: the Hopf bifurcation, the saddle-node bifurcation, and the period-doubling bifurcation [18]. These bifurcations are called local because they may be understood by linearizing the system close to an equilibrium point or limit cycle. Hopf Bifurcation. A Hopf bifurcation occurs in a continuous-time dynamical system (8.3) when a simple pair of complex conjugate eigenvalues of the linearization DxF(XQ) of the vector field at an equilibrium point XQ crosses the imaginary axis. Typically, the equilibrium point changes stability from stable to unstable and a stable limit cycle is born. The bifurcation at Ga′ ≡ 0 in the nonlinear RLC circuit is Hopf-like.12 When an equilibrium point undergoes a Hopf bifurcation, a limit cycle is born. When a limit cycle undergoes a Hopf bifurcation, motion on a two-torus results. Saddle-Node Bifurcation. A saddle-node bifurcation occurs when a stable and an unstable equilibrium point merge and disappear; this typically manifests itself as the abrupt disappearance of an attractor. A common example of a saddle-node bifurcation in electronic circuits is switching between equilibrium states in a Schmitt trigger. At the threshold for switching, a stable equilibrium point corresponding to the “high” saturated state merges with the high-gain region’s unstable saddle-type equilibrium point and disappears. After a switching transient, the trajectory settles to the other stable equilibrium point, which corresponds to the “low” state. A saddle-node bifurcation may also manifest itself as a switch between periodic attractors of different size, between a periodic attractor and a chaotic attractor, or between a limit cycle at one frequency and a limit cycle at another frequency. Period-Doubling Bifurcation. A period-doubling bifurcation occurs in a discrete-time dynamical system (8.8) when a real eigenvalue of the linearization DXG(XQ) of the map G at an equilibrium point crosses the unit circle at –1 [7]. In a continuous-time system, a period-doubling bifurcation occurs only from a periodic solution (an equilibrium point of the Poincaré map). At the bifurcation point, a periodic orbit with period T changes smoothly into one with period 2T, as illustrated in Figure 8.14(a) and (b). Blue Sky Catastrophe. A blue sky catastrophe is a global bifurcation that occurs when an attractor disappears “into the blue,” usually because of a collision with a saddle-type limit set. Hysteresis involving a chaotic attractor is often caused by a blue sky catastrophe [18]. Routes to Chaos Each of the three local bifurcations may give rise to a distinct route to chaos, and all three have been reported in electronic circuits. These routes are important because it is often difficult to conclude from experimental data alone whether irregular behavior is due to measurement noise or to underlying chaotic dynamics. If, upon adjusting a control parameter, one of the three prototype routes is observed, this indicates that the dynamics might be chaotic. Periodic-Doubling Route to Chaos. The period-doubling route to chaos is characterized by a cascade of period-doubling bifurcations. Each period-doubling transforms a limit cycle into one at half the frequency, spreading the energy of the system over a wider range of frequencies. An infinite cascade of such doublings results in a chaotic trajectory of infinite period and a broad frequency spectrum that contains

12

Note that the Hopf bifurcation theorem is proven for sufficiently smooth systems and does not strictly apply to piecewise-linear systems. However, a physical implementation of a piecewise-linear characteristic, such as that of NR, is always smooth.

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6 4 2 0 −2 −4 −6

V1

V2

I3

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0

2

4

6

8

10

0 −20 −40 −60 −80 −100

(a) 6 4 2 0 −2 −4 −6

V1

V2

I3

0 −20 −40 −60 −80 −100

(b) 6 4 2 0 −2 −4 −6

V1

V2

I3

0 −20 −40 −60 −80 −100

(c) 6 4 2 0 −2 −4 −6

V1

V2

I3

0 −20 −40 −60 −80 −100

(d)

FIGURE 8.14 Period-doubling route to chaos in Chua’s oscillator. Simulated state space trajectories, time waveforms V1(t), and power spectra of V2(t) (a) G = 530 µS: periodic steady-state — the signal is characterized by a discrete power spectrum with energy at integer multiples of the fundamental frequency f0; (b) G = 537 µS; period-two — after a period-doubling bifurcation, the period of the signal is approximately twice that of (a). In the power spectrum, a spike appears at the new fundamental frequency ≈ f0/2. (c) G = 539 µS: period-four — a second period-doubling bifurcation gives rise to a fundamental frequency of ≈ f0/4; (d) G = 541 µS: spiral Chua’s attractor — a cascade of period doublings results in a chaotic attractor that has a broadband power spectrum. Time plots: horizontal axis — t (ms); vertical axis — V1(V). Power spectra: horizontal axis — frequency (kHz); vertical axis — power [mean squared amplitude of V2 (t)] (db).

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energy at all frequencies. Figure 8.14 is a set of snapshots of the period-doubling route to chaos in Chua’s oscillator. An infinite number of period-doubling bifurcations to chaos can occur over a finite range of the bifurcation parameter because of a geometric relationship between the intervals over which the control parameter must be moved to cause successive bifurcations. Period-doubling is governed by a universal scaling law that holds in the vicinity of the bifurcation point to chaos µ∞. Define the ratio δk of successive interval µ, in each of which there is a constant period of oscillation, as follows, δk =

µ 2 k − µ 2 k −1 µ 2 k +1 − µ 2k

where µ2k is the bifurcation point for the period from 2k T to 2k+1T. In the limit as k → ∞, a universal constant called the Feigenbaum number δ is obtained: lim δ k = δ = 4.6692 …

k→ ∞

The period-doubling route to chaos is readily identified from a state-space plot, time series, power spectrum, or a Poincaré map. Intermittency Route to Chaos. The route to chaos caused by saddle-node bifurcations comes in different forms, the common feature of which is direct transition from regular motion to chaos. The most common type is the intermittency route and results from a single saddle-node bifurcation. This is a route and not just a jump because straight after the bifurcation, the trajectory is characterized by long intervals of almost regular motion (called laminar phases) and short bursts of irregular motion. The period of the oscillations is approximately equal to that of the system just before the bifurcation. This is illustrated in Figure 8.15. As the parameter passes through the critical value µc at the bifurcation point into the chaotic region, the laminar phases become shorter and the bursts become more frequent, until the regular intervals disappear altogether. The scaling law for the average interval of the laminar phases depends on µ – µc , so chaos is not fully developed until some distance from the bifurcation point [13]. Intermittency is best characterized in the time domain because its scaling law governs on the length of laminar phases. Another type of bifurcation to chaos associated with saddle-nodes is the direct transition from a regular attractor (fixed point or limit cycle) to a coexisting chaotic one, without the phenomenon of intermittency. Quasiperiodic (Torus Breakdown) Route to Chaos. The quasiperiodic route to chaos results from a sequence of Hopf bifurcations. Starting from a fixed point, the three-torus generated after three Hopf bifurcations is not stable in the sense that there exists an arbitrarily small perturbation of the system (in terms of parameters) for which the three-torus gives way to chaos. A quasiperiodic–periodic–chaotic sequence corresponding to torus breakdown in Chua’s oscillator is given in Figure 8.5. Quasiperiodicity is difficult to detect from a time series; it is more readily identified by means of a power spectrum or Poincaré map (see Figure 8.11, for example). Bifurcation Diagrams and Parameter Space Diagrams Although state space, time- and frequency-domain measurements are useful for characterizing steadystate behaviors, nonlinear dynamics offers several other tools for summarizing qualitative information concerning bifurcations. A bifurcation diagram is a plot of the attracting sets of a system versus a control parameter. Typically, one chooses a state variable and plots this against a single control parameter. In discrete systems, one

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2 1

V1

0 −1 −2 0

10

20

30

40

50

60

70

80

90

100

0

I3

V2

−20 −40 −60 −80 −100 0

1

2

3

4

5

(a) 2

V1

1 0 −1 −2

0

10

20

30

40

50

60

70

80

90

100

0

I3

V2

−20 −40 −60 −80 −100 0

1

2

3

4

5

(b) 2

V1

1 0 −1 −2

0

10

20

30

40

50

60

70

80

90

100

0

I3

V2

−20 −40 −60 −80 −100 0

1

2

3

4

5

(c)

FIGURE 8.15 Intermittency route to chaos in Chua’s oscillator. Simulated state space trajectories, time waveforms V1(t) and power spectra of V2(t) (a) Periodic steady-state — the signal is characterized by a discrete power spectrum with energy at integer multiples of the fundamental frequency; (b) onset of intermittency — the time signal contains long regular “laminar” phases and occasional “bursts” of irregular motion — in the frequency domain, intermittency manifests itself as a raising of the noise floor; (c) fully developed chaos-laminar phases are infrequent and the power spectrum is broad. Time plots: horizontal axis — t (ms); vertical axis — V1 (V). Power spectra: horizontal axis — frequency (kHz); vertical axis — power [mean squared amplitude of V2(t)] (dB).

simply plots successive values of a state variable. In the continuous-time case, some type of discretization is needed, typically by means of a Poincaré section. Figure 8.16 is a bifurcation diagram of the logistic map Xk+1 = µXk (1 – Xk ) for µ ∈[2.5, 4] and Xk ∈[0, 1]. Period doubling from period-one to period-two occurs at µ2; the next two doublings in the period-doubling cascade occur at µ2 and µ4, respectively. A periodic window in the chaotic region is indicated by µ3. The map becomes chaotic by the period-doubling route if µ is increasing from µ3 and by the intermittency route if µ is reduced out of the window. When more than one control parameter is present in a system, the steady-state behavior may be summarized in a series of bifurcation diagrams, where one parameter is chosen as the control parameter,

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Iterates of map xn

1 0.8 0.6 0.4 0.2 0

2.5

2.8

µ1

3.2

3.6 µ2 µ4

µ3

4

Bifurcation parameter µ

FIGURE 8.16 Bifurcation diagram for the logistic map: Xk+1 = µXk (1 – Xk ). The first period-doubling bifurcation occurs at µ = µ1, the second at µ2, and the third at µ4 · µ3 corresponds to a period-three window. When µ = 4, the entire interval (0, 1) is visited by a chaotic orbit {Xk , k = 0, 1, …}. Source: C. W. Wu and N. R. Rul’kov, “Studying chaos via 1-D maps — A tutorial,” IEEE Trans. Circuits Syst. I, vol. 40, p. 708, Oct. 1993. 1993 IEEE.

with the others held fixed, and only changed from one diagram to the next. This provides a complete but cumbersome representation of the dynamics [13]. A clearer picture of the global behavior is obtained by partitioning the parameter space by means of bifurcation curves, and labeling the regions according to the observed steady-state behaviors within these regions. Such a picture is called a parameter space diagram.

8.2

Chua’s Circuit: A Paradigm for Chaos

Chaos is characterized by a stretching and folding mechanism; nearby trajectories of a dynamical system are repeatedly pulled apart exponentially and folded back together. In order to exhibit chaos, as autonomous circuit consisting of resistors, capacitors, and inductors must contain (i) at least one locally active resistor, (ii) at least one nonlinear element, and (iii) at least three energy-storage elements. The active resistor supplies energy to separate trajectories, the nonlinearity provides folding, and the three-dimensional state space permits persistent stretching and folding in a bounded region without violating the noncrossing property of trajectories. Chua’s circuit (see Figure 8.17) is the simplest electronic circuit that satisfies these criteria. It consists of a linear inductor, a linear resistor, two linear capacitors, and a single nonlinear resistor NR . The circuit is readily constructed at low cost using standard electronic components and exhibits a rich variety of bifurcation and chaos [10].

R

C2

L I3

+

+

V2

V1

−

−

+ C1

VR

IR NR

−

FIGURE 8.17 Chua’s circuit consists of a linear inductor L, two linear capacitors (C2,C1), a linear resistor R, and a voltage-controlled nonlinear resistor NR.

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IR Gb (Gb−Ga)E −E

Ga 0

VR

E

(Ga−Gb)E

Gb

FIGURE 8.18 The driving-point characteristic of the nonlinear resistor NR in Chua’s circuit has breakpoints at ±E and slopes Ga and Gb in the inner and outer regions, respectively.

Dynamics of Chua’s Circuit State Equations Chua’s circuit may be described by three ordinary differential equations. Choosing V1, V2, and I3 as state variables, we write dV1 G 1 = (V − V1 ) − f (V1 ) dt C1 2 C1 dV2 G = (V − V2 ) + C1 I3 dt C2 1 2

(8.12)

dI 3 1 = – V2 dt L where G = 1/R and f (VR) = GbVR + 1/2(Ga + Gb) (VR + E – VR – E), as depicted in Figure 8.18. Because of the piecewise-linear nature of NR, the vector field of Chua’s circuit may be decomposed into three distinct affine regions: V1 < –E, V1 ≤ E, and V1 > E. We call these the D–1, D0 and D1 regions, respectively. The global dynamics may be determined by considering separately the behavior in each of the three regions (D–1, D0 and D1) and then gluing the pieces together along the boundary planes U–1 and U1. Piecewise-Linear Dynamics In each region, the circuit is governed by a three-dimensional autonomous affine dynamical system of the form X˙ = AX + b

(8.13)

where A is the (constant) system matrix and b is a constant vector. The equilibrium points of the circuit may be determined graphically by intersecting the load line IR = –GVR with the DP characteristic IR = f(VR ) of the nonlinear resistor NR , as presented in Figure 8.19 [2]. When G > Ga or G > Gb, the circuit has a unique equilibrium point at the origin (and two virtual equilibria P– and P+); otherwise, it has three equilibrium points at P–, 0, and P+. The dynamics close to an equilibrium point XQ are governed locally by the linear system x˙ = Ax

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(8.14)

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G>|Ga|

IR

Ga

|Gb| 0 and ω ≠ 0, xc(t) spirals away from XQ along the complex eigenplane E c, and if σ < 0, xc(t) spirals toward XQ and E c.

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We remark that the vector E r and plane E c are invariant under the flow of (8.13): if X(0) ∈E r, then X(t ) ∈E r for all t; if X(0) ∈E c , then X(t ) ∈E c for all t. An important consequence of this is that a trajectory X(t) cannot cross through the complex eigenspace E c ; suppose X(t 0 ) ∈E c at some time t0, then X(t ) ∈E c , for all t > t 0 .

Chaos in Chua’s Circuit In the following discussion, we consider a fixed set of component values: L = 18 mH, C2 = 100 nF, C1 = 10 nF, Ga = –50/66 mS = –757.576 µS, Gb = –9/22 mS = –409.091 µS, and E = 1 V. When G = 550 µS, three equilibrium points occur at P+, 0, and P–. The equilibrium point at the origin (0) has one unstable real eigenvalue γ0 and a stable complex pair σ0 ± jω0. The outer equilibria (P– and P+) each have a stable real eigenvalue γ1 and an unstable complex pair σ0 ± jω1. Dynamics of D0 A trajectory starting from some initial state X0 in the D0 region may be decomposed into its components along the complex eigenplane E c(0) and along the eigenvector E r(0). When γ0 > 0 and σ0 < 0, the component along E c(0) spirals toward the origin along this plane while the component in the direction E r(0) grows exponentially. Adding the two components, we see that a trajectory starting slightly above the stable complex eigenplane E c(0) spirals toward the origin along the E c(0) direction, all the while being pushed away from E c(0) along the unstable direction E r(0). As the (stable) component along E c(0) shrinks in magnitude, the (unstable) component grows exponentially, and the trajectory follows a helix of exponentially decreasing radius whose axis lies in the direction of E r(0); this is illustrated in Figure 8.20. Dynamics of D–1 and D1 Associated with the stable real eigenvalue γ1 in the D1 region is the eigenvector E r(P+). The real and imaginary parts of the complex eigenvectors associated with σ1 ± jω1 define a complex eigenplane E c(P+). A trajectory starting from some initial state X0 in the D1 region may be decomposed into its components along the complex eigenplane E c(P+) and the eigenvector E r(P+). When γ1 < 0 and σ1 > 0, the component on E c(P+) spirals away from P+ along this plane while the component in the direction of E r(0) tends asymptotically toward P+. Adding the two components, we see that a trajectory starting close to the stable real eigenvector E r(P+) above the complex eigenplane moves toward E c(P+) along a helix of exponentially increasing radius. Because the component along E r(P+) shrinks exponentially in magnitude and the component on E c(P+) grows exponentially, the trajectory is quickly flattended onto E c(P+), where it spirals away from P+ along the complex eigenplane; this is illustrated in Figure 8.21.

V1 Er(0)

D0

I3

V2 0 Ec(0)

FIGURE 8.20 Dynamics of the D0 region. A trajectory starting slightly above the stable complex eigenplane E c(0) spirals toward the origin along this plane and is repelled close to 0 in the direction of the unstabe eigenvector E r(0). Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, vol. 40, p. 660, Oct. 1993. 1993 IEEE.

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V1

Er(P+)

Ec(P+) P+

D1

V2

I3

Er(P−)

P−

Ec(P−)

FIGURE 8.21 Dynamics of the D1 region. A trajectory starting above the unstable complex eigenplane E c(P+) close to the eigenvector E r(P+) moves toward the plane and spirals away from P+ along E c(P+). By symmetry, the D–1 region has equivalent dynamics. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst., vol. 40, p. 662, Oct. 1993. © 1993 IEEE.

By symmetry, the equilibrium point P– in the D–1 region has three eigenvalues: γ1 and σ1 ± jω1. The eigenvector E r(P–) is associated with the stable real eigenvalue γ1; the real and imaginary parts of the eigenvectors associated with the unstable complex pair σ1 ± jω1 define an eigenplane E c(P–), along which trajectories spiral away from P–. Global Dynamics With the given set of parameter values, the equilibrium point at the orgin has an unstable real eigenvalue and a stable pair of complex conjugate eigenvalues; the outer equilibrium point P– has a stable real eigenvalue and an unstable complex pair. In particular, P– has a pair of unstable complex conjugate eigenvalues σ1 ± ω1 (σ1 > 0, ω1 ≠ 0) and a stable real eigenvalue γ1, where σ1 < ω1. In order to prove that the circuit is chaotic in the sense of Shil’nikov, it is necessary to show that it possesses a homoclinic orbit for this set of parameter values. A trajectory starting on the eigenvector E r(0) close to 0 moves away from the equilibrium point until it crosses the boundary U1 and enters D1, as illustrated in Figure 8.20. If this trajectory is folded back into D0 by the dynamics of the outer region, and reinjected toward 0 along the stable complex eigenplane E c(0) then a homoclinic orbit is produced. That Chua’s circuit is chaotic in the sense of Shil’nikov was first proven by Chua et al. [21] in 1985. Since then, there has been an intensive effort to understand every aspect of the dynamics of this circuit with a view to developing it as a paradigm for learning, understanding, and teaching about nonlinear dynamics and chaos [3].

Steady-States and Bifurcations in Chua’s Circuit In the following discussion, we consider the global behavior of the circuit using our chosen set of parameters with R in the range 0 ≤ R ≤ 2000 Ω (500 µ s ≤ G < ∞ s). Figure 8.14 is a series of simulations of the equivalent circuit in Figure 8.26 with the following parameter values: L = 18 mH, C2 = 100 nF, C1 = 10 nF, Ga = –50/66 mS = –757.576 µS, Gb = –9/22 mS = –409.091 µS, and E = 1 V. R0 = 12.5 Ω, the parasitic series resistance of a real inductor. R is the bifurcation parameter. Equilibrium Point and Hopf Bifurcation When R is large (2000 Ω), the outer equilibrium points P– and P+ are stable (γ1 < 0 and σ1 < 0, ω1 ≠ 0); the inner equilibrium point 0 is unstable (γ0 > 0 and σ0 < 0,ω0 ≠ 0). Depending on the initial state of the circuit, the system remains at one outer equilibrium point or the other. Let us assume that we start at P+ in the D1 region. This equilibrium point has one negative real

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8-31

eigenvalue and a complex pair with negative real parts. The action of the negative real eigenvalue γ 1 is to squeeze trajectories down onto the complex eigenplane E c(P+), where they spiral toward the equilibrium point P+. As the resistance R is decreased, the real part of the complex pair of eigenvalues changes sign and becomes positive. Correspondingly, the outer equilibrium points become unstable as σ1 passes through 0; this is a Hopf-like bifurcation.13 The real eigenvalue of P+ remains negative so trajectories in the D1 region converge toward the complex eigenplane E c(P+). However, they spiral away from the equilibrium point P+ along E c(P+) until they reach the dividing plane U1 (defined by V1 ≡ E) and enter the D0 region. The equilibrium point at the origin in the D0 region has a stable complex pair of eigenvalues and an unstable real eigenvalue. Trajectories that enter the D0 region on the complex eigenplane E c(0) are attracted to the origin along this plane. Trajectories that enter D0 from D1 below or above the eigenplane either cross over to D–1 or are turned back toward D1, respectively. For R sufficiently large, trajectories that spiral away from P+ along E c(P+) and enter D0 above E c(0) are returned to D1, producing a stable period-one limit cycle. This is illustrated in Figure 8.14. Period-Doubling Cascade As the resistance R is decreased further, a period-doubling bifurcation occurs. The limit cycle now closes on itself after encircling P+ twice; this is called a period-two cycle because a trajectory takes approximately twice the time to complete this closed orbit as to complete the preceding period-one orbit [see Figure 8.14(b)]. Decreasing the resistance R still further produces a cascade of period-doubling bifurcations to periodfour [Figure 8.14(c)], period-eight, period-sixteen, and so on until an orbit of infinite period is reached, beyond which we have chaos [see Figure 8.14(d)]. This is a spiral Chua’s chaotic attractor. The spiral Chua’s attractor in Figure 8.14(d) looks like a ribbon or band that is smoothly folded on itself; this folded band is the simplest type of chaotic attractor [18]. A trajectory from an initial condition X0 winds around the strip repeatedly, returning close to X0, but never closing on itself. Periodic Windows Between the chaotic regions in the parameter space of Chua’s circuit, there exist ranges of the bifurcation parameter R over which stable periodic motion occurs. These regions of periodicity are called periodic windows and are similar to those that exist in the bifurcation diagram of the logistic map (see Figure 8.16). Periodic windows of periods three and five are readily found in Chua’s circuit. These limit cycles undergo period-doubling bifurcations to chaos as the resistance R is decreased. For certain sets of parameters, Chua’s circuit follows the intermittency route to chaos as R is increased out of the period-three window. Spiral Chua’s Attractor Figure 8.22 outlines three views of another simulated spiral Chua’s chaotic attractor. Figure 8.22(b) is a view along the edge of the outer complex eigenplanes E c(P+) and E c(P–); notice how trajectories in the D1 region are compressed toward the complex eigenplane E c(P+) along the direction of the stable real eigenvector E c(P+) and they spiral away from the equilibrium point P+ along E c(P+). When a trajectory enters the D0 region through U1 from D1, it is twisted around the unstable real eigenvector E r(0) and returned to D1. Figure 8.22(c) illustrates clearly that when the trajectory enters D0 from D1, it crosses U1 above the eigenplace E c(0). The trajectory cannot cross through this eigenplane and therefore it must return to the D1 region. Double-Scroll Chua’s Attractor Because we chose a nonlinear resistor with a symmetric nonlinearity, every attractor that exists in the D1 and D0 regions has a counterpart (mirror image) in the D–1 and D0 regions. As the coupling resistance 13Recall that the Hopf bifurcation theorem strictly applies only for sufficiently smooth systems, but that physical implementations of piecewise-linear characteristics are typically smooth.

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V1

V1

D1

Er(P+)

Ec(P+)

P+ U1

U1 I3

V2

D0 I3

0

Er(0) U−1

V2 U−1

D−1

P−

(a)

(b) V1

U1 Ec(0) Er(0)

I3

V2 U−1

(c)

FIGURE 8.22 Three views of a simulated spiral Chua’s attractor in Chua’s oscillator with G = 550µS. (a) Reference view [compare with Figure 8.14(d)]. (b) View of the edge of the outer complex eigenplanes E c(P+) and E c(P–); note how trajectory in D1 is flattened onto E c(P+). (c) View along the edge of the complex eigenplane E c(0); trajectories cannot cross this plane. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, vol. 40, p. 664, Oct. 1993. © 1993 IEEE.

R is decreased further, the spiral Chua’s attractor “collides” with its mirror image and the two merge to form a single compound attractor called a double-scroll Chua’s chaotic attractor [10], as presented in Figure 8.23. Once more, we show three views of this attractor in order to illustrate its geometrical structure. Figure 8.23(b) is a view of the attractor along the edge of the outer complex eigenplanes E c(P+) and E c (P_). Upon entering the D1 region form D0, the trajectory collapses onto E c(P+) and spirals away from P+ along this plane. Figure 8.23(c) is a view of the attractor along the edge of the complex eigenplane E c(0) in the inner region. Notice once more that when the trajectory crosses U1 into D0 above E c(0), it must remain above E c(0) and so returns to D1. Similarly, if the trajectory crosses U1 below E c(0), it must remain below E c(0)and therefore crosses over to the D–1 region. Thus, E c(0) presents a knife-edge to the trajectory as it crosses U1 into the D0 region, forcing it back toward D1 or across D0 to D–1. Boundary Crisis Reducing the resistance R still further produces more regions of chaos, interspersed with periodic windows. Eventually, for a sufficiently small value of R, the unstable saddle trajectory that normally resides outside the stable steady-state solution collides with the double-scroll Chua’s attractor and a blue sky catastrophe called a boundary crisis [10] occurs. After this, all trajectories become unbounded.

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V1

V1

Er(P+)

D1

P+

Ec(P+)

U1 D0

I3

V2

I3

0 U−1

D−1

P−

V2

Er(P−)

Ec(P−)

(a)

(b) V1

U1 Ec(0) Er(0)

I3

V2 U−1

(c)

FIGURE 8.23 Three views of a simulated double-scroll Chua’s attractor in Chua’s oscillator with G = 565 µS. (a) Reference view [compare with Figure 8.14(d)]. (b) View along the edge of the outer complex eigenplanes E c(P+) and E c(P–); note how the trajectory in D1 is flattened onto E c(P+) and onto E c(P–) in D–1. (c) View along the edge of the complex eigenplane E c(0); a trajectory entering D0 from D1 above this plane returns to D1 while one entering D0 below E c(0) crosses to D–1. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, vol. 40, p. 665, Oct. 1993. © 1993 IEEE.

Manifestations of Chaos Sensitive Dependence on Initial Conditions Consider once more the double-scroll Chau’s attractor shown in Figure 8.23. Two trajectories starting from distinct but almost identical initial states in D1 will remain “close together” until they reach the separating plane U1. Imagine that the trajectories are still “close” at the knife-edge, but that one trajectory crosses into D0 slightly above E c(0) and the other slightly below E c(0). The former trajectory returns to D1 and the latter crosses over to D1: their “closeness” is lost. The time-domain waveforms V1(t) for two such trajectories are shown in Figure 8.24. These are solutions of Chua’s oscillator with the same parameters as in Figure 8.23; the initial conditions are (I3, V2, V1) = (1.810 mA, 222.014 mV, –2.286 V) [solid line] and (I3, V2, V1) = (1.810 mA, 222.000 mV, –2.286 V) [dashed line]. Although the initial conditions differ by less than 0.01 percent in just one component (V2), the trajectories diverge and become uncorrelated within 0.01 percent in just one component (V2), the trajectories diverge and become uncorrelated within 5 ms because one crosses the knife-edge before the other. This rapid decorrelation of trajectories that originate in nearby initial states, commonly called sensitive dependence on initial conditions, is a generic property of chaotic systems. It gives rise to an apparent randomness in the output of the system and long-term unpredictability of the state.

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6 4 2 0 −2 −4 −6

0

1

2

3

4

5

FIGURE 8.24 Sensitive dependence on initial conditions. Two time waveforms V1(t) from Chua’s oscillator with G = 550 µS, starting from (I3, V2, V1) = (1.810 mA, 222.01 mV, –2.286 V) [solid line] and (I3, V2, V1) = (1.810 mA, 222.000 mV, –2.286 V) [dashed line]. Note that the trajectories diverge within 5 ms. Horizontal axis: t (ms); vertical axis: V1 (V). Compare with Figure 8.23.

“Randomness” in the Time Domian Figures 8.14(a), (b), (c), and (d) show the state-space trajectories of period-one, period-two, and periodfour periodic attractors, a spiral Chua’s chaotic attractor, respectively, and the corresponding voltage waveforms V1(t). The “period-one” waveform is periodic; it looks like a slightly distorted sinusoid. The “period-two” waveform is also periodic. It differs qualitatively from the “period-one” in that the pattern of a large peak followed by a small peak repeats approximately once every two cycles of the period-one signal; that is why it is called “period-two.” In contrast with these periodic time waveforms, V1(t) for the spiral Chua’s attractor is quite irregular and does not appear to repeat itself in any observation period of finite length. Although it is produced by a third-order deterministic differential equation, the solution looks “random.” Broadband “Noise-Like” Power Spectrum In the following discussion, we consider 8192 samples of V2(t) recorded at 200 kHz; leakage in the power spectrum is controlled by applying a Welch window [17] to the data. We remarked earlier that the period-one time waveform corresponding to the attractor in Figure 8.14(a), is almost sinusoidal; we expect, therefore, that most of its power should be concentrated at the fundamental frequency. The power spectrum of the period-one waveform V2(t) shown in Figure 8.14(a) consists of a sharp spike at approximately 3 kHz and higher harmonic components that are over 30 dB below the fundamental. Because the period-two waveform repeats roughly once every 0.67 ms, this periodic signal has a fundamental frequency component at approximately 1.5 kHz [see Figure 8.14(b)]. Notice, however, that most of the power in the signal is concentrated close to 3 kHz. The period-four waveform repeats roughly once every 1.34 ms, corresponding to a fundamental frequency component at approximately 750 Hz [See Figure 8.14(c)]. Note once more that most of the power in the signal is still concentrated close to 3 kHz. The spiral Chua’s attractor is qualitatively different from these periodic signals. The aperiodic nature of its time-domain waveforms is reflected in the broadband noise-like power spectrum [Figure 8.14(d)]. No longer is the power of the signal concentrated in a small number of frequency components; rather, it is distributed over a broad range of frequencies. This broadband structure of the power spectrum persists even if the spectral resolution is increased by sampling at a higher frequency fs. Notice that the spectrum still contains a peak at approximately 3 kHz that corresponds to the average frequency of rotation of the trajectory about the fixed point.

Practical Realization of Chua’s Circuit Chua’s circuit can be realized in a variety of ways using standard or custom-made electronic components. All the linear elements (capacitor, resistor, and inductor) are readily available as two-terminal devices. A

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R

1 +

L

+

V2

C2

IR

2

V1

C1

V+

+ A1 −

VR

I3

R6

R3

+

3

+ A2 −

V−

V−

R2 −

R5

R1

−

5

6

4 −

V+

R4

0 NR

FIGURE 8.25 Practical implementation of Chua’s circuit using two op amps and six resistors to realize the Chua diode [10]. Component values are listed in Table 8.2.

TABLE 8.2 Component List for the Practical Implementation of Chua’s Circuit, depicted in Figure 8.25 Element A1 A2 C1 C2 R R1 R2 R3 R4 R5 R6 L

Description Op Amp ( 1--2 AD712, TL082, or Equivalent)

Tolerance

—

—

W Resistor

— 10 nF 100 nF 2 kΩ 3.3 kΩ

— ±5% ±5% — ±5%

W Resistor

22 kΩ

±5%

W Resistor

22 kΩ

±5%

( --12 AD712,

Op Amp Capacitor Capacitor Potentiometer --1 4 1-4 1-4 1-4 1-4 1-4

Value

TL082, or Equivalent)

W Resistor W Resistor

W Resistor Inductor (TOKO-Type 10 RB, or Equivalent)

2.2 kΩ

±5%

220 Ω

±5%

220 Ω 118 mH

±5% ±10%

nonlinear resistor NR with the prescribed DP characteristic (called a Chua diode [10]) may be implemented by connecting two negative resistance converters in parallel as outlined in Figure 8.25. A complete list of components is given in Table 8.2. The op amp subcircuit consisting of A1, A2 and R1–R6 functions as a negative resistance converter NR with driving-point characteristic as shown in Figure 8.28(b). Using two 9-V batteries to power the op amps gives V + = 9 V and V – = – 9 V. From measurements of the saturation levels of the AD712 outputs, Esat ≈ 8.3 V, giving E ≈ 1 V. With R2 = R3 and R5 = R6, the nonlinear characteristic is defined by Ga = –1/R1 – 1/R4 = –50/66 mS, Gb = 1/R3 – 1/R4 = –9/22 mS, and E = R1Esat/(R1 + R2) ≈ 1 V[10]. The equivalent circuit of Figure 8.25 is presented in Figure 8.26, where the real inductor is modeled as a series connection of an ideal linear inductor L and a linear resistor R0. When the inductor’s resistance is modeled explicitly in this way, the circuit is called Chua’s oscillator [5].

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R

L I3 C2 R0

+

+

V2

V1

−

−

+ C1

VR

IR

NR

−

FIGURE 8.26 Chua’s oscillator.

Experimental Steady-State Solutions A two-dimensional projection of the steady-state attractor in Chua’s circuit may be obtained by connecting V2 and V1 to the X and Y channels, respectively, of an oscilloscope in X–Y mode. Bifurcation Sequence with R as Control Parameter By reducing the variable resistor R in Figure 8.25 from 2000 Ω toward zero, Chua’s circuit exhibits a Hopf bifurcation from dc equilibrium, a sequence of period-doubling bifurcations to a spiral Chua’s attractor, periodic windows, a double-scroll Chua’s chaotic attractor, and a boundary crisis, as illustrated in Figure 8.27. Notice that varying R in this way causes the size of the attractors to change: the period-one orbit is large, period-two is smaller, the spiral Chua’s attractor is smaller again, and the double-scroll Chua’s attractor shrinks considerably before it dies. This shrinking is due to the equilibrium points P+ and P– moving closer towards the origin as R is decreased. Consider the load line in Figure 8.19(b): as R is decreased, the slope G increases, and the equilibrium points P– and P+ move toward the origin. Compare also the positions of P+ in Figures 8.22(a) and 8.23(a) The Outer Limit Cycle No physical system can have unbounded trajectories. In particular, any physical realization of a Chua diode is eventually passive, meaning simply that for a large enough voltage across its terminals, the instantaneous power PR(t) [= VR(t)IR(t)] consumed by the device is positive. Hence, the DP characteristic of a real Chua diode must include at least two outer segments with positive slopes which return the characteristic to the first and third quadrants [see Figure 8.28(b)]. From a practical point of view, as long as the voltages and currents on the attractor are restricted to the negative resistance region of the characteristic, these outer segments will not affect the circuit’s behavior. The DP characteristic of the op-amp-based Chua diode differs from the desired piecewise linear characteristic depicted in Figure 8.28(a) in that it has five segments, the outer two of which have positive slopes Gc = 1/R5 = 1/220 S. The “unbounded” trajectories that follow the boundary crisis in the ideal three-region system are limited in amplitude by these dissipative outer segments and a large limit cycle results, as illustrated in Figure 8.27(i). This effect could, of course, be simulated by using a five-segment DP characteristic for NR as illustrated in Figure 8.28(b). The parameter value at which the double-scroll Chua’s attractor disappears and the outer limit cycle appears is different from that at which the outer limit cycle disappears and the chaotic attractor reappears. This “hysteresis” in parameter space is characteristic of a blue sky catastrophe.

Simulation of Chua’s Circuit Our experimental observations and qualitative descriptive description of the global dynamics of Chua’s circuit may be confirmed by simulation using a specialized nonlinear dynamics simulation package such as INSITE [15] or by employing a customized simulator such as “ABC” [10].

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Bifurcation and Chaos

(a)

(b)

(c)

(d)

(e)

(f)

(g)

(h)

(i)

FIGURE 8.27 Typical experimental bifurcation sequence in Chua’s circuit (component values as in Table 8.2) recorded using a digital storage oscilloscope. Horizontal axis V2 (a)–(h) 200 mV/div, (i) 2 V/div; vertical axis V1 (a)–(h) 1 V/div, (i) 2 V/div. (a) R = 1.83 kΩ, period–1; (b) R = 1.82 kΩ, period-2; (c) R = 1.81 kΩ, period-4; (d) R = 1.80 kΩ, spiral Chua’s attractor; (e) R = 1.797 kΩ, period-3 window; (f) R = 1.76 kΩ, spiral Chua’s attractor; (g) R = 1.73 kΩ, double-scroll Chua’s attractor; (h) R = 1.52 kΩ, double-scroll Chua’s attractor; (i) R = 1.42 kΩ, large limit cycle corresponding to the outer segments of the Chua diode’s DP characteristic. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuit Syst. I, vol. 40, pp. 669, 670, Oct. 1993. © 1993 IEEE.

For electrical engineers who are familiar with the SPICE circuit simulator but perhaps not with chaos, we present a net-list and simulation results for a robust op-amp-based implementation of Chua’s circuit. The AD712 op amps in this realization of the circuit are modeled using Analog Devices’ AD712 macromodel. The TOKO 10RB inductor has a nonzero series resistance that we have included in the SPICE net-list; a typical value of RO for this inductor is 12.5 Ω. Node numbers are as Figure 8.25: the power

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Nonlinear and Distributed Circuits

IR

IR Gb

Gb Gc −E′

Ga −E

−Esat

VR

E

Ga −E

Esat E′

E

Gb

Gb

(a)

VR Gc

(b)

FIGURE 8.28 (a) Required three-segment piecewise-linear DP characteristic for the Chua diode in Figure 8.17. (b) Every physically realizable nonlinear resistor NR is eventually passive — the outermost segments (while not necessarily linear as presented here) must lie completely within the first and third quadrants of the VR–IR place for sufficiently large VR and IR.

rails are 111 and 222; 10 is the “internal” node of the physical inductor, where its series inductance is connected to its series resistance. A double-scroll Chua’s attractor results from a PSPICE simulation using the input deck shown in Figure 8.29; this attractor is plotted in Figure 8.30.

Dimensionless Coordinates and the – Parameter-Space Diagram Thus far, we have discussed Chua’s circuit equations in terms of seven parameters: L, C2, G, C1, E, Ga, and Gb. We can reduce the number of parameters by normalizing the nonlinear resistor such that its breakpoints are at ±1 V instead of ±E V. Furthermore, we may write Chua’s circuit equations (8.12) in normalized dimensionless form by making the following change of variables: X1 = V1 /E, X2 = V2 /E, X3 = I3/(EG), and τ = tG/C2. The resulting state equations are

[

]

dX1 = α X 2 − X1 − f ( X1 ) dτ dX 2 = X1 − X 2 + X 3 dτ

(8.15)

dX 3 = −βX 2 dτ where α = C2 /C1, β = C2 /(LG2), and f(X) = bX + 1/2 (a – b) (X + 1 – X – 1); a = Ga /G and b = Gb /G. Thus, each set of seven circuit parameters has an equivalent set of four normalized dimensionless parameters {α, β, a, b}. If we fix the values of a and b (which correspond to the slopes Ga and Gb of the Chua diode), we can summarize the steady-state dynamical behavior of Chua’s circuit by means of a two-dimensional parameter-space diagram. Figure 8.31 presents the (α,β) parameter-space diagram with a = –8/7 and b = –5/7. In this diagram, each region denotes a particular type of steady-state behavior: for example, an equilibrium point, periodone orbit, period-two, spiral Chua’s attractor, double-scroll Chua’s attractor. Typical state-space behaviors are shown in the insets. For clarity, we show chaotic regions in a single shade; it should be noted that these chaotic regions are further partitioned by periodic windows and “islands” of periodic behavior. To interpret the α–β diagram, imagine fixing the value of β = C2 /(LG2) and increasing α = C2 /C1 from a positive value to the left of the curve labeled “Hopf at P ±”; experimentally, this corresponds to fixing the parameters L, C2, G, E, Ga , and Gb , and reducing the value of C1 — this is called a “C1 bifurcation sequence.” Initially, the steady-state solution is an equilibrium point. As the value of C1 is reduced, the circuit undergoes a Hopf bifurcation when α crosses the “Hopf at P ± ” curve. Decreasing C1 still further, the

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Bifurcation and Chaos

ROBUST OP AMP REALIZATION OF CHUA’S CIRCUIT V+ 111 0 DC 9 V− 0 222 DC 9 L 1 10 0.018 R0 10 0 12.5 R 1 2 1770 C2 1 0 100.0N C1 2 0 10.0N XA1 2 4 111 222 3 AD712 R1 2 3 220 R2 3 4 220 R3 4 0 2200 XA2 2 6 111 222 5 AD712 R4 2 5 22000 R5 5 6 22000 R6 6 0 3300 * AD712 SPICE Macro-model

1/91, Rev. A

* Copyright 1991 by Analog Devices, Inc. (reproduced with permission) * .SUBCKT AD 712 13 15 21 16 14 * VOS 15 8 DC 0 EC 9 0 14 0 1 C1 6 7 .5P RP 16 12 12K GB 11 0 3 0 1.67K RD1 6 16 16k RD2 7 16 16k ISS 12 1 DC 100U CCI 3 11 150P GCM 0 3 0 1 1.76N GA 3 0 7 6 2.3M RE 1 0 2.5MEG RGM 3 0 1.69K VC 12 2 DC 2.8 VE 10 16 DC 2.8 RO1 11 14 25 CE 1 0 2P RO2 0 11 30 RS1 1 4 5.77K RS2 1 5 5.77K J1 6 13 4 FET J2 7 8 5 FET DC 14 2 DIODE DE 10 14 DIODE DP 16 12 DIODE D1 9 11 DIODE D2 11 9 DIODE IOS 15 13 5E-12 .MODEL DIODE D .MODEL FET PJF(VTO = −1 BETA = 1M IS = 25E−12) .ENDS .IC V(2) = 0.1 V(1) = 0 .TRAN 0.01MS 100MS 50MS .OPTIONS RELTOL = 1.0E−4 ABSTOL = 1.0E−4 .PRINT TRAN V(2) V(1) .END

FIGURE 8.29 SPICE deck to simulate the transient response of the dual op amp implementation of Chua’s circuit. Node numbers are as in Figure 8.25. The op amps are modeled using the Analog Devices AD712 macro-model. RO models the series resistance of the real inductor L.

steady-state behavior bifurcates from period-one to period-two to period-four and so on to chaos, periodic windows, and a double-scroll Chua’s attractor. The right-hand side edge of the chaotic region is delimited by a curve corresponding to the boundary crisis and “death” of the attractor. Beyond this curve, trajectories diverge toward infinity. Because of eventual passivity in a real circuit, these divergent trajectories will of course converge to a limit cycle in any physical implementation of Chua’s circuit.

8.3

Chua’s Oscillator

Chua’s oscillator [5] (see Figure 8.26) is derived from Chua’s circuit by adding a resistor R0 in series with the inductor L. The oscillator contains a linear inductor, two linear resistors, two linear capacitors, and

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Nonlinear and Distributed Circuits

4.0V

2.0V

0V

−2.0V

−4.0V −800mV

−600mV

−400mV

−200mV

0V

200mV

400mV

600mV

800mV

FIGURE 8.30 PSpice (evaluation version 5.4, July 1993) simulation of Figure 8.25 using the input deck from Figure 8.29 yields this double-scroll Chua’s attractor. Horizontal axis V2 (V); vertical axis V1 (V).

a single Chua diode NR. NR is a voltage-controlled piecewise-linear resistor whose continuous oddsymmetric three-segment driving-point characteristic (see Figure 8.18) is described explicitly by the relationship

(

I R = GbVR + 12 (Ga − Gb ) VR + E − VR − E

)

The primary motivation for studying this circuit is that the vector field of Chua’s oscillator is topologically conjugate to the vector field of a large class of three-dimensional, piecewise-linear vector fields. In particular, the oscillator can exhibit every dynamical behavior known to be possible in an autonomous three-dimensional, continuous-time dynamical system described by a continuous odd-symmetric threeregion piecewise-linear vector field. With appropriate choices of component values, the circuit follows the period-doubling, intermittency, and quasiperiodic routes to chaos.

State Equations Choosing V1, V2, V, and I3 as state variables, Chua’s oscillator may be described by three ordinary differential equations: dV1 G 1 = (V − V ) − f (V1 ) dt C1 2 1 C1 dV2 G = (V − V2 ) + C1 I3 dt C2 1 2 R dI 3 1 = − V2 − 0 I 3 L dt L where G = 1/R and f (VR) = Gb VR + 1/2 (Ga – Gb) (VR + E – VR – E). Copyright © 2006 Taylor & Francis Group, LLC

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8-41

25

0

20

p+ 15

3 0

2

p−

5 F 0

G

p+

p−

6

β

p−

E

p+

p−

0

BI RT H

2 D

4 p+

p−

C

p+

0

p−

O ER

HO M DE AT D H

p+

0

RI OD

p−

1

30

B

p+

PE

A 0

f at ± p

p+

Hop

35

SP I WI R A L ND OW

Bifurcation and Chaos

T HE

7 H 0

p−

1 2

3

7 9 4 5 6 8 1011

7

10

I + 0 p− p

p+

p−

9

8 5

J 0

K

p+

0

p−

L

p+

0

p−

11

10 0 0

α

5

10

15

FIGURE 8.31 α–β parameter space diagram for the normalized dimensionless Chua’s circuit equations (8.31) with a = –8/7 and b = –5/7. Source: M. P. Kennedy, “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, vol. 40, p. 673, Oct. 1993. 1993 IEEE.

The vector field is parameterized by eight constants: L, C2, G, C1, R0, E, Ga, and Gb . We can reduce the number of parameters by normalizing the nonlinear resistor such that its breakpoints are at ±1 V instead of ±E V, scaling the state variables, and scaling time. By making the following change of variables: X1 = V1/E, X2 = V2/E, X3 = I3/(EG), τ = tG/C2 , and k = sgn (G/C2),14 we can rewrite the state equations (8.16) in normalized dimensionless form:

[

]

dX1 = kα X 2 − X1 − f ( X1 ) dτ dX 2 = k( X1 − X 2 + X 3 ) dτ dX 3 = − k(βX 2 + γX 3 ) dτ

where α = C2 /C1, β = C2 /(LG2), γ = R0C2 /(LG), and f (x) = bX +1/2(a – b)(X + 1 – X – 1) with a = Ga /G and b = Gb /G. Thus, each set of eight circuit parameters has an equivalent set of six normalized dimensionless parameters {α, β, γ, a, b, k}.

14

The signum function is defined by sgn(x) = x if x > 0, sgn(x) = –x if x < 0, and sgn(0) = 0.

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Topological Conjugacy Two vector fields F and F′ are topologically conjugate if there exists a continuous map h (which has a continuous inverse) such that h maps trajectories of F into trajectories of F′, preserving time orientation and parametrization of time. If φt and φ′t are the flows of F and F′, respectively, then φt ° h = h ° φ′t for all t. This means that the dynamics of F and F′ are qualitatively the same. If h is linear, then F and F′ are said to be linearly conjugate. Class The three-dimensional, autonomous, continuous-time dynamical system defined by the state equation X˙ = F( X )

X ∈3

is said to belong to class iff 1. F: 3 → 3 is continuous 2. F is odd-symmetric, i.e., F(–X) = –F(X) 3. 3 is partitioned by two parallel boundary planes U1 and U–1 into an inner region D0, which contains the origin, and two outer regions D1 and D–1, and F is affine in each region. Without loss of generality, the boundary planes and the regions they separate can be chosen as follows: D−1 = {X: X1 ≤ −1} U −1 = {X: X1 = −1}

{

}

D0 = X: X1 ≤ 1

U −1 = {X: X1 = 1} D1 = {X: X1 ≥ 1} Any vector field in the family can then be written in the form A −1X − b X1 ≤ − 1 X˙ = A 0 X − 1 ≤ X1 ≤ 1 A1X + b X1 ≥ 1 where a11 A −1 = A1 = a21 a 31

a12 a22 a32

a13 b1 a23 and b = b2 b a33 3

By continuity of the vector field across the boundary planes, (a11 + b1 ) A 0 = (a21 + b2 ) (a31 + b3 )

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a12 a22 a32

a13 a23 a33

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Bifurcation and Chaos

Equivalent Eigenvalue Parameters Let (µ1, µ2, µ3) denote the eigenvalues associated with the linear vector field in the D0 region and let (ν1, ν2, ν3) denote the eigenvalues associated with the affine vector fields in the outer regions D1 and D–1. Define p1 = µ1 + µ 2 + µ 3

p2 = µ1µ 2 + µ 2µ 3 + µ 3µ1 p3 = µ1µ 2µ 3 q1 = v1 + v2 + v3 q2 = v1v2 + v2 v3 + v3 v1 q3 = v1v2 v3

(8.16)

Because the six parameters {p1, p2, p3, q1, q2, q3} are uniquely determined by the eigenvalues {µ1, µ2, µ3, ν1, ν2, ν3} and vice versa, the former are called the equivalent eigenvalue parameters. Note that the equivalent eigenvalues are real; they are simply the coefficients of the characteristic polynomials:

(s − µ1 )(s − µ 2 )(s − µ3 ) = s3 − p1s 2 + p2s − p3 (s − ν1 )(s − ν2 )(s − ν3 ) = s3 − q1s 2 + q2s − q3 Theorem 3 (Chua et al.) [5]: Let {µ1, µ2, µ3, ν1, ν2, ν3} be the eigenvalues associated with a vector field F(X)∈/0, where 0 is the set of measure zero in the space of equivalent eigenvalue parameters where one of (8.17) is satisfied. Then, Chua’s oscillator with parameters defined by (8.18) and (8.19) is linearly conjugate to this vector field. p1 − q1 = 0 p2 − q 2 p1 − p − q = 0 1 1 p −q k − 2 2 − 1 = 0 p1 − q1 k2 p −q − k1k3 + k2 3 3 = 0 p1 − q1 0 a13 = a12k33 − a13k32 = 0 K 33

p −q p −q p2 − 3 3 − 2 2 p1 − q1 p1 − q1

1 det K = det a11 K 31

0 a12 K 32

(8.17)

where 3

K 3i =

∑a a

1 j ji

i = 1, 2, 3

j=i

˜ ˜ We denote by the set of vector fields /0. Two vector fields in are linearly conjugate if they have the same eigenvalues in each region.

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Eigenvalues-to-Parameters Mapping Algorithm for Chua’s Oscillator Every continuous, third-order, odd-symmetric, three-region, piecewise-linear vector field F′ in may be mapped onto a Chua’s oscillator (where the vector field F is topologically conjugate to F′) by means of the following algorithm [5]: 1. Calculate the eigenvalues (µ1′ , µ ′2 , µ ′3 ) and (ν1′, ν 2′ , ν 3′ ) associated with the linear and affine regions, respectively, of the vector field F′ of the circuit or system whose attractor is to be reproduced (up to linear conjugacy) by Chua’s oscillator. 2. Find a set of circuit parameters {C1 , C 2 , L, R, R0 , Ga , Gb , E} (or dimensionless parameters {α, β, γ, a, b, k}) so that the resulting eigenvalues µj and vj for Chua’s oscillator satisfy µj = µ′j and νj = ν′,j j = 1, 2, 3. Let { p1 , p2 , p3 , q1 , q2 , q3 } be the equivalent eigenvalue parameters defined by (8.16). Furthermore, let p3 − q3 p2 − q2 p2 − q 2 k 2 = p2 − p1 − p − q − p1 − q1 p1 − q1 1 1 p2 − q 2 k1 k3 = − −k − p q 1 1 2 p3 − q3 k4 =− k1k3 + k2 p1 − q1 p − q3 k1 = − p3 + 3 p1 − q1

p2 − q 2 p1 − p − q 1 1

(8.18)

The corresponding circuit parameters are given by C1 = 1

k2 C2 = − 2 k3 2 k3 L=− k4 k3 R=− k2 2 kk R0 = − 1 3 k2k4 p2 − q 2 k 2 Ga = − p1 + + p1 − q1 k3 p2 − q 2 k 2 Gb = − q1 + + p1 − q1 k3

(8.19)

The breakpoint E of the piecewise-linear Chua diode can be chosen arbitrarily because the choice of E does not affect either the eigenvalues or the dynamics; it simply scales the circuit variables. In a practical realization of the circuit, one should scale the voltages and currents so that they lie within the inner three segments of the nonlinear resistor NR.

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Bifurcation and Chaos

1

R

6 +

+ R6

A2

−

R5

V−

V+

IR +

0

+ 4

5 L

C2

R1 R2

V2

C1

V1

VR

I3

R4

− A1 +

V+ 3 V−

−

−

− 2

R3 NR

FIGURE 8.32 Practical implementation of Chua’s oscillator using an op amp and four resistors to realize the Chua diode [10]. The negative resistor G is realized by means of a negative resistance converter (a2, R5, R6, and positive resistor R). If R2 = R3 and R5 = R6, and Ga = 1/R4 – 1/R1, Gb = 1/R4 + 1/R2, and G = –1/R. Component values are listed in Table 8.3.

The dimensionless parameters can be calculated as follows: k β = 42 k2k3 k1 γ= k2k3 p2 − q 2 k3 a = −1 + p1 − p1 − q1 k2 p2 − q 2 k3 b = −1 + q1 − p1 − q1 k2 k = sgn(k3 )

α=−

k2 k32

(8.20)

Example: Torus Figure 8.32 shows a practical implementation of Chua’s oscillator that exhibits a transition to chaos by torus breakdown. A complete list of components is given in Table 8.3. A SPICE simulation of this circuit produces a quasiperiodic voltage V(2) (= –V1), as expected (see Figure 8.33). The resistor RO is not explicitly added to the circuit, but models the dc resistance of the inductor.

8.4

Van der Pol Neon Bulb Oscillator

In a paper titled “Frequency Demultiplication,” the eminent Dutch electrical engineer Balthazar van der Pol described an experiment in which, by tuning the capacitor in a neon bulb RC relaxation oscillator

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Nonlinear and Distributed Circuits

TABLE 8.3

Component List for the Chua Oscillator in Figure 8.32

Element

Description

Value

Op Amp( --12 AD712, TL082, or Equivalent)

A1

Amp( 1--2 AD712,

A2 C1 C2

Op Capacitor Capacitor

R1

-1 W Resistor

TL082, or Equivalent)

— — 47 nF 820 nF 6.8 kΩ

4

Tolerance — — ±5% ±5% ±5%

R2

œmp W Resistor

47 kΩ

±5%

R3

1- W Resistor 4

47 kΩ

±5%

R4 R5

Potentiometer W Resistor

2 kΩ 220 Ω

— ±5%

R6

1- W Resistor 4

220 Ω

±5%

R L

Potentiometer Inductor(TOKO-Type 10 RB, or Equivalent)

2 kΩ 18 mH

— ±10%

2.0V

0V

−2.0V

−4.0V

−6.0V 50MS

60MS

70MS

80MS

90MS

100MS

FIGURE 8.33 PSpice simulation (.TRAN 0.01MS 100 MS 50 MS) of Figure 8.32 with initial conditions .IC V(2) = –0.1 V(1) = –0.1 and tolerances .OPTIONS RELTOL = 1 E -4 ABSTOL = 1 E – 4 yields this quasiperiodic voltage waveform at node 2.

i R Ne

E

Es

+ _

C

Rs

FIGURE 8.34 Sinusoidally driven neon bulb relaxation oscillator. Ne is the neon bulb.

driven by a sinusoidal voltage source (see Figure 8.34), “currents and voltages appear in the system which are whole submultiples of the driving frequency” [11]. The circuit consists of a high-voltage dc source E attached via a large series resistance R to a neon bulb and capacitor C that are connected in parallel; this forms the basic relaxation oscillator. Initially, the capacitor is discharged and the neon bulb is nonconducting. The dc source charges C with time constant

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Bifurcation and Chaos

SYSTEM PERIOD/T 14

12

10

8

6

4

2

0 0

4

8

12

16

20

24

28

C (nF)

FIGURE 8.35 Normalized current pulse pattern repetition rate vs. C for the sinusoidally driven neon relaxation oscillator in Figure 8.34, showing a coarse staircase structure of mode-lockings. Source: M. P. Kennedy and L. O. Chua, “Van der Pol and Chaos,” IEEE Trans. Circuits Syst., vol. CAS-33, p. 975, Oct. 1986. 1986 IEEE.

RC until the voltage across the neon bulb is sufficient to turn it on. Once lit, he bulb presents shunt low resistance path to the capacitor. The voltage across the capacitor falls exponentially until the neon arc is quenched, the bulb is returned to its “off” state, and the cycle repeats. In series with the neon bulb is inserted a sinusoidal voltage source Es = E0 sin(2π fs t); its effect is to perturb the “on” and “off ” switching thresholds of the capacitor voltage. Experimental results for this circuit are summarized in Figure 8.35, where the ratio of the system period (time interval before the pattern of current pulses repeats itself) to the period T of the forcing is plotted versus the capacitance C. Van der Pol noted that as the capacitance was increased from that values (C0) for which the natural frequency f0 of the undriven relaxation oscillator equaled that of the sinusoidal source (system period/T = 1), the system frequency made “discrete jumps from one whole submultiple of the driving frequency to the next” (detected by means of “a telephone coupled loosely in some way to the system”). Van der Pol noted that “often an irregular noise is heard in the telephone receiver before the frequency jumps to the next lower value”; van der Pol had observed chaos. Interested primarily in frequency demultiplication, he dismissed the “noise” as “a subsidiary phenomenon.” Typical current waveforms, detected by means of a small current-sensing resistor Rs placed in series with the bulb are shown in Figure 8.36. These consist of a series of sharp spikes, corresponding to the periodic firing of the bulb. Figure 8.36(c) shows a nonperiodic “noisy” signal of the type noticed by van der Pol. The frequency locking behavior of the driven neon bulb oscillator circuit is characteristic of forced oscillators that contain two competing frequencies: the natural frequency f0 of the undriven oscillator

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Nonlinear and Distributed Circuits

i (µA) 800

i (µA) 800

600

600

400

400

200

200

0

0 20.0

21.0

22.0

23.0

24.0 t (ms)

20.0

21.0

T

22.0

23.0

24.0 t (ms)

2T

(a)

(b) i (µA) 800

600

400

200

0 80

100

120

140

160 t (ms)

(c)

FIGURE 8.36 Periodic and chaotic neon bulb current waveforms. (a) One current pulse per cycle of Es :fs /fd = 1/1; (b) one current pulse every two cycles of Es : fs /fd = 2/1; (c) “noisy” current waveform.

and the driving frequency fs . If the amplitude of the forcing is small, either quasiperiodicity or modelocking occurs. For a sufficiently large amplitude of the forcing, the system may exhibit chaos.

Winding Numbers Subharmonic frequency locking in a forced oscillator containing two competing frequencies f1 and f2 may be understood in terms of a winding number. The concept of a winding number was introduced by Poincaré to describe periodic and quasiperiodic trajectories on a torus. A trajectory on a torus that winds around the minor axis of the torus with frequency f1 revolutions per second, and completes revolution of the major axis with frequency f2, may be parametrized by two angular coordinates θ1 ≡ f1t and θ2 ≡ f2t, as illustrated in Figure 8.37. The angles of rotation θ1 and θ2 about the major and minor axes of the torus are normalized so that one revolution corresponds to a change in θ of 1. A Poincaré map for this system can be defined by sampling the state θ1 with period τ = 1/f2. Let θk = θ1 (kτ). The Poincaré map has the form θk +1 = G(θk ),

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k = 0, 1, 2, …

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∑

θk

θ1

G(θk)

θ2

FIGURE 8.37 A trajectory on a torus is characterized by two normalized angular coordinates. θ1 = f1 t is the angle of rotation about the minor axis of the torus, while θ2 = f2 t is the angle of rotation along the major axis, where f1 and f2 are the frequencies of rotation about the corresponding axes. A Poincaré map θk+1 = G(θk) is defined by sampling the trajectory with frequency 1/f2. The winding number w counts the average number of revolutions in the Poincaré section per iteration of the map.

If f1 /f2 = p/q is rational, then the trajectory is periodic, closing on itself after completing q revolutions about the major axis of the torus. In this case, we say that the system is periodic with period q and completes p cycles per period. If the ratio p/q is irrational then the system is quasiperiodic; a trajectory covers the surface of the torus, coming arbitrarily close to every point on it, but does not close on itself. The winding number w is defined by

w = lim

k→ ∞

G (k ) (θ0 ) k

where G (k) denotes the k-fold iterate of G and θ0 is the initial state. The winding number counts the average number of revolutions in the Poincaré section per iteration. Equivalently, w equals the average number of turns about the minor axis per revolution about the major axis of the torus.15 Periodic orbits possess rational winding numbers and are called resonant; quasiperiodic trajectories have irrational winding numbers.

The Circle Map A popular paradigm for explaining the behavior of coupled nonlinear oscillators with two competing frequencies is the circle map: K sin(2πθk ) + Ω mod 1, k = 0, 1, 2, … θk +1 = θk + 2π

(8.21)

so-called because it maps the circle into itself. The sinusoidal term represents the amplitude of the forcing, and Ω is the ratio of the natural frequency of the unperturbed system and the forcing frequency [18]. When K ≡ 0, the steady state of the discrete-time dynamical system (8.22) is either periodic or quasiperiodic, depending on whether Ω is rational or irrational.

15Either frequency may be chosen to correspond to the major axis of the torus, so the winding number and its reciprocal are equivalent.

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1.0 0.8 0.6 0.4

1 4

1 3

2 5

1 2

3 5

3 4

2 3 0.24

0.22

1 5

0.2

0.25

0.0 0.0

0.2

0.4

Ω

0.6

3 14

3 2 13 9

0.26

0.8

0.27

1.0

FIGURE 8.38 Devil’s staircase for the circle map with K = 1. The steps indicate the regions in which w is constant. The staircase is self-similar in the sense that its structure is reproduced qualitatively at smaller scales (see inset). Source: J. A. Glazier and A. Libchaber, “Quasi-periodicity and dynamical systems: An experimentalist’s view,” IEEE Trans. Circuits Syst., vol. 35, p. 793, July 1988. © 1988 IEEE.

If the amplitude K of the forcing is nonzero but less than unity, the steady-state is q-periodic when Ω = p/q is rational. In this case, a nonzero mode-locked window [Ωmin(w), Ωmax(w)] occurs, over which w = p/q. A mode-locked region is delimited by saddle-node bifurcations at Ωmin(w) and Ωmax(w) [18]. The function w(Ω) in Figure 8.38 is monotone increasing and forms a Devil’s staircase with plateaus at every rational value of w — for example, the step with winding number 1/2 is centered at Ω = 0.5. An experimental Devil’s staircase for the driven neon bulb circuit, with low-amplitude forcing, is shown in Figure 8.39. As the amplitude k is increased, the width of each locked interval in the circle map increases so that mode-locking becomes more common and quasiperiodicity occurs over smaller ranges of driving frequencies. The corresponding (K, Ω) parameter space diagram (see Figure 8.40) consists of a series of distorted triangles, known as Arnold Tongues, with apexes that converge to rational values of Ω at K = 0. Within a tongue, the winding number is constant, yielding one step of the Devil’s staircase. The winding numbers of adjacent tongues are related by a Farey tree structure. Given two periodic windows with winding number w1 = p/q and w2 = r/s, another periodic window with winding number w = (αp + βr)/(αq + βs) can always be found, where p, q, r, and s are relatively prime and α and β are strictly positive integers. Furthermore, the widest mode-locked window between w1 and w2 has winding number (p + r)/(q + s). For example, the widest step between those with winding numbers 1/2 and 2/3 in Figure 8.38 has w = 3/5. The sum of the widths of the mode-locked states increases monotonically from zero at K = 1 to unity at K = 1. Below the critical line K = 1, the tongues bend away from each other and do not overlap. At K = 1, tongues begin to overlap, a kink appears in the Poincaré section and the Poincaré map develops a horseshoe; this produces coexisting attractors and chaos. The transition to chaos as K is increased through K = 1 may be by a period-doubling cascade within a tongue, intermittency, or directly from a quasiperiodic trajectory by the abrupt disappearance of that trajectory (a blue sky catastrophe). This qualitative behavior is observed in van der Pol’s neon bulb circuit.

Experimental Observations of Mode-Locking and Chaos in van der Pol’s Neon Bulb Circuit With the signal source Es zeroed, the natural frequency of the undriven relaxation oscillator is set to 1 kHz by tuning capacitance C to C0. A sinusoidal signal with frequency 1 kHz and amplitude E0 is applied as shown in Figure 8.34. The resulting frequency of the current pulses (detected by measuring the voltage across Rs) is recorded with C as the bifurcation parameter.

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fs/fd

FORCED NEON BULB CIRCUIT

3.00 2.80 2.60 2.40 2.20 2.00 1.80 1.60 1.40 1.20 1.00 1.00

1.50

2.00

2.50 fs (kHz)

FIGURE 8.39 Experimentally measured staircase structure of lockings for a forced neon bulb relaxation oscillator. The winding number is given by fs /fd, the ratio of the frequency of the sinusoidal driving signal to the average frequency of current pulses through the bulb. Source: M. P. Kennedy, K. R. Krieg, and L. O. Chua, “The Devil’s staircase: The electrical engineer’s fractal,” IEEE Trans. Circuits Syst., vol. 36, p. 1137, Aug. 1989. © 1989 IEEE.

1.50 1.25 1 1 5 4

1 3

2 5

1 2

3 5

2 3

3 4 4 5

k

1.0 0.75 0.50 0.25 0.0

0.0

0.2

0.4

Ω

0.6

0.8

1.0

FIGURE 8.40 Parameter space diagram for the circle map showing Arnold tongue structure of lockings in the K – Ω plane. The relative widths of the tongues decrease as the denominator of the winding number increases. Below the critical line K = 1, the tongues bend away from each other and do not overlap; for K > 1, the Poincaré map develops a fold and chaos can occur. Source: J. A. Glazier and A. Libchaber, “Quasi-periodicity and dynamical systems: An experimentalist’s view,” IEEE Trans. Circuits Syst., vol. 35, p. 793, July 1988. © IEEE.

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C Bifurcation Sequence If a fixed large-amplitude forcing Es is applied and C is increased slowly, the system at first continues to oscillate and 1 kHz [Figure 8.36(a)] over a range of C, until the frequency “suddenly” drops to 1000/2 Hz [Figure 8.36(b)], stays at that value over an additional range of capacitance, drops to 1000/3 Hz, then 1000/4 Hz, 1000/5 Hz, and so on as far as 1000/20 Hz. These results are summarized in Figure 8.35. Between each two submultiples of the oscillator driving frequency, a further rich structure of submultiples is found. At the macroscopic level (the coarse structure examined by van der Pol) increasing the value of C causes the system periods to step from T (1 ms) to 2T, 3T, 4T, …, where the range of C for which the period is fixed is much greater than that over which the transitions occur (Figure 8.35). Examining the shaded transition regions more closely, one finds that between any two “macroscopic” regions where the period is fixed at (n – 1)T and nT (n > 1), respectively, there lies a narrower region over which the system oscillates with stable period (2n – 1)T. Further, between (n – 1)T and (2n –1)T, one finds a region of C for which the period is (3n – 2)T, and between (2n – 1)T and nT, a region with period (3n – 1)T. Indeed, between any two stable regions with periods (n – 1)T and nT, respectively, a region with period (2n –1)T can be found. Figure 8.41 depicts an enlargement of the C axis in the region of the T to 2T macro-transition, showing the finer period-adding structure. Between T and 2T is a region with stable period 3T. Between this and 2T, regions of periods 5T, 7T, 9T, … up to 25T are detected. Current waveforms corresponding to period-3 and period-5 steps, with winding numbers 3/2 and 5/3, respectively, are shown in Figure 8.42.

SYSTEM PERIOD/T

26 24 22 20 18 16 14 12 10 8 6 4 2 0 0

C0

2.0

2.5

3.0

3.5

C (nF)

FIGURE 8.41 Experimental pulse pattern repetition rate versus C for van der Pol’s forced neon bulb oscillator, showing fine period-adding structure. Source: M. P. Kennedy and L. O. Chua, “Van der Pol and chaos,” IEEE Trans, Circuits Syst., vol. CAS-33, p. 975, Oct. 1986 © 1986 IEEE.

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i (µA) 800

i (µA) 800

600

600

400

400

200

200

0

0 20.0

22.0

24.0

26.0

28.0 t (ms)

20.0

3T (a)

22.0

24.0

26.0

28.0 t (ms)

5T (b)

FIGURE 8.42 Neon bulb current waveforms. (a) Two pulses every three cycles of Ezis :fs /fd = 3/2; (b) three pulses every five cycles fs /fd = 5/3.

A region of period 4T lies between T and 3T, with steps 7T, 10T, 13T, … up to 25T between that and 3T. In practice, it becomes difficult to observe cycles with longer periods because stochastic noise in the experimental circuit can throw the solution out of the narrow window of existence of a high period orbit. Experimental fs Bifurcation Sequence with Low-Amplitude Forcing An experimental Devil’s staircase may be plotted for this circuit by fixing the parameters of the relaxation oscillator and the amplitude of the sinusoidal forcing signal, and choosing the forcing frequency fs as the bifurcation parameter. The quantity fs /fd is the equivalent winding number in this case, where fd is the average frequency of the current pulses through the neon bulb. Experimental results for the neon bulb circuit with low-amplitude forcing are presented in Figures 8.39 and 8.43. The monotone staircase of lockings is consistent with a forcing signal of small amplitude. Note that the staircase is self-similar in the sense that its structure is reproduced qualitatively at smaller scales of the bifurcation parameter. If the amplitude of the forcing is increased, the onset of chaos is indicated by a nonmonotonicity in the staircase.

Circuit Model The experimental behavior of van der Pol’s sinusoidally driven neon bulb circuit may be reproduced in simulation by an equivalent circuit (see Figure 8.44) in which the only nonlinear element (the neon bulb) is modeled by a nonmonotone current-controlled resistor with a series parasitic inductor Lp . The corresponding state equations are dVC 1 1 E V − I + =− dt RC C C L RC f ( I L ) E 0 sin(2π fst ) R dI L 1 − = VC − s I L − Lp Lp Lp dt Lp where V = f(I) is the driving-point characteristic of the current-controlled resistor (see Figure 8.45).

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FORCED NEON BULB CIRCUIT

fs/fd

3.00

FORCED NEON BULB CIRCUIT

2.85

2.90 2.80 2.80 2.75

2.70 2.60

2.70

2.50 2.65

2.40 2.30

2.60

2.20 2.55

2.10 2.00

2.40 2.40

2.50

2.60

2.56

2.70 fs (kHz)

2.58

2.60

2.62

2.64 fs (kHz)

FIGURE 8.43 Magnification of Figure 8.39 showing self-similarity. Source: M. P. Kennedy, K. R. Krieg, and L. O. Chua, “The Devil’s staircase: The electrical engineer’s fractal,” IEEE Trans. Circuits Syst., vol. 36, p. 1137, Aug. 1989. © 1989 IEEE.

iL

R Lp + E

VC

+ C

V = f(iL)

−

−

Es

+ −

Rs

FIGURE 8.44 Van der Pol’s neon bulb circuit — computer model. The bulb is modeled by a nonmonotonic currentcontrolled nonlinear resistor with parasitic transit inductance Lp.

8.5

Synchronization of Chaotic Circuits

Chaotic steady-state solutions are characterized by sensitive dependence on initial conditions; trajectories of two identical autonomous continuous-time dynamical systems started from slightly different initial

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i (µA)

i (µA)

300

300

250

250

200

200

150

150

100

100

50

50

0

0 0

50

60 v(V) (a)

70

80

0

50

60 v(V) (b)

70

80

FIGURE 8.45 Neon bulb driving-point characteristics: (a) measured and (b) simulated. Source: M. P. Kennedy and L. O. Chua, “Van der Pol and chaos,” IEEE Trans. Circuit Syst., vol. CAS-33, p. 976, Oct. 1986. © 1986 IEEE.

conditions quickly become uncorrelated. Surprisingly perhaps, it is nevertheless possible to synchronize these systems in the sense that a trajectory of one asymptotically approaches that of the other. Two trajectories X1(t) and X2(t) are said to synchronize if lim X1 (t ) − X 2 (t ) = 0

t→∞

In this section, we describe two techniques for synchronizing chaotic trajectories.

Linear Mutual Coupling The simplest technique for synchronizing two dynamical systems X˙ 1 = F1 ( X1 )

X1 (0) = X10

X˙ 2 = F2 ( X 2 )

X 2 (0) = X 20

is by linear mutual coupling of the form X˙ 1 = F1 ( X1 ) + K( X 2 − X1 )

X1 (0) = X10

X˙ 2 = F2 ( X 2 ) + K( X 2 − X1 )

X 2 (0) = X 20

(8.22)

where X1,X2 ∈n and K = diag(K11, K22, …, Knn)T. Here, X1(t ) is called the goal dynamics. The synchronization problem may be stated as follows: find K such that

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lim X1 (t ) − X 2 (t ) = 0

t→∞

that is, that the solution X 2 (t ) synchronizes with the goal trajectory X1(t). In general, it is difficult to prove that synchronization occurs, unless an appropriate Lyapunov function16 of the error system E(t ) = X1(t ) – X 2 (t ) can be found. However, several examples exist in the literature where mutually coupled chaotic systems synchronize over particular ranges of parameters. Example: Mutually Coupled Chua’s Circuits. Consider a linear mutual coupling of two Chua’s circuits. In dimensionless coordinates, the system under consideration is

[

]

dX1 = α X 2 − X1 − f ( X1 ) + K11 ( X 4 − X1 ) dt dX 2 = X1 − X 2 − X 3 + K 22 ( X 5 − X 2 ) dt dX 3 = − βy + K 33 ( X 6 − X 3 ) dt

(

)

dX 4 = α X 5 − X 4 − f ( X 4 ) + K11 ( X1 − X 4 ) dt dX 5 = X 4 − X 5 − X 6 + K 22 ( X 2 − X 5 ) dt dX 6 = −βX 5 + K 33 ( X 3 − X 6 ) dt Two mutually coupled Chua’s circuits characterized by α = 10.0, β = 14.87, a = –1.27, and b = –0.68 will synchronize (the solutions of the two systems will approach each other asymptotically) for the following matrices K: X1 – coupling K11 > 0.5, K22 = K33 = 0 X2 – coupling K22 > 5.5, K11 = K33 = 0 X3 – coupling 0.7 < K33 < 2, K11 = K22 = 0 Coupling between states X1 and X 4 may be realized experimentally by connecting a resistor between the tops of the nonlinear resistors, as shown in Figure 8.46. States X 2 and X 5 may be coupled by connecting the tops of capacitors C 2 by means of a resistor. An INSITE simulation of the system, which confirms synchronization of the two chaotic Chau’s circuits in the case of linear mutual coupling between state VC1 and VC′1 is presented in Figure 8.47.

Pecora–Carroll Drive-Response Concept The drive-response synchronization scheme proposed by Pecora and Carroll applies to systems that are drive-decomposable [16]. A dynamical system is called drive-decomposable if it can be partitioned into two subsystems that are coupled so that the behavior of the second (called the response subsystem) depends on that of the first, but the behavior of the first (called the drive subsystem) is independent of that of the second. To construct a drive-decomposable system, an n-dimensional autonomous continuous-time dynamical system

16

For a comprehensive exposition of Lyapunov stability theory, see [19].

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R

C2

L IL

+

+

+

VC2

VC1

−

−

−

+

+

+

V′C2

V′C1

−

−

IR

C1 VR

NR RX

R

L

C2 I′L

C1 V′R

I′R NR

−

FIGURE 8.46 Synchronization of two Chua’s circuits by means of resistive coupling between VC1 and V C′1 . 0.816

0.816

0.411

0.411

0.006 x[2] −0.400

0.006 x[5] −0.400

−0.805

−3.662

−1.838

−0.015 x[1]

−0.805 1.808

3.632

0.816

5.577

0.411

2.802

0.006 x[5] −0.400

0.026 x[6] −2.750

−0.805

−0.805

−0.400

−5.525 0.006 x[2]

0.411

0.816

−3.662

−1.838

−0.015 x[4]

1.808

3.632

−5.525

−2.750

0.026 x[3]

2.802

5.577

FIGURE 8.47 INSITE simulation of the normalized dimensionless form of Figure 8.46, illustrating synchronization by mutual coupling of state variables. Identify {x[1], x[2], x[3]} with {VC1, VC2, IL } and {x[4], x[5], x[6]} with {V C′ 1, V C′2, I L′ } synchronizes with VC2 (t) and I ′L(t) synchronizes with IL(t). Source: L. O. Chua, M. Itoh, L. Ko˘carev, and K. Eckert, “Chaos synchronization in Chua’s Circuit,” J. Circuits Syst. Comput., vol. 3, no. 1, p. 99, Mar. 1993.

X˙ = F( X )

X(0) = X 0

(8.23)

where X = (X1 , X 2 , ... , X n )T and F(X) = [F1(X), F2(X), …, Fn(X)]T, is first partitioned into two subsystems X˙ 1 = F1 ( X1 , X 2 )

X1 (0) = X10

(8.24)

X˙ 2 = F2 ( X1 , X 2 )

X 2 (0) = X 20

(8.25)

where X1 = (X1 , X 2 ,..., X m )T , X 2 = (X m+1 , X m+2 ,..., X n )T,

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F1 ( X1 , X 2 ) F (X , X ) 2 1 2 F1 ( X1 , X 2 ) = Fm ( X1 , X 2 ) and Fm + 1 ( X1 , X 2 ) F ( X , X ) m+2 1 2 F2 ( X1 , X 2 ) = Fn ( X1 , X 2 ) An identical (n – m)-dimensional copy of the second subsystem, with X 3 as state variable and X1 as input, is appended to form the following (2n – m)-dimensional coupled drive-response system: X˙ 1 = F1 ( X1 , X 2 )

X1 (0) = X10

(8.26)

X˙ 2 = F2 ( X1 , X 2 )

X 2 (0) = X 20

(8.27)

X˙ 3 = F2 ( X1 , X 3 )

X 3 (0) = X 30

(8.28)

The n-dimensional dynamical system defined by (8.26) and (8.27) is called the drive system and (8.28) is called the response subsystem. Note that the second drive subsystem (8.27) and the response subsystem (8.28) lie in state spaces of dimension (n–m) and have identical vector fields F2 and inputs X1 . Consider a trajectory X 3 (t ) of (8.29) that originates from an initial state X30 “close” to X20. We may think of X2(t) as a perturbation of X3(t). In particular, define the error X3(t) = X2(t) – X3(t). The trajectory X2(t) approaches X3(t) asymptotically (synchronizes) if X2 → 0 as t → ∞. Equivalently, the response subsystem (8.29) is asymptotically stable when driven with X1(t). The stability of an orbit of a dynamical system may be determined by examining the linearization of the vector field along the orbit. The linearized response subsystem is governed by

(

)

x˙ 3 = D X3 F2 X 1 (t ), X 3 x 3 ,

x 3 (0) = x 30

where Dx3F2(X1(t), X3) denotes the partial derivatives of the vector field F2 of the response subsystem with respect to X3. This is linear time-varying system whose state transition matrix Φt (X10, X30) maps a point x30 into X3(t). Thus,

(

)

x 3 (t ) = Φt X 10 , X 30 x 30 Note that Φt is a linear operator. Therefore, an (n – m)-dimensional ball Bε(X30 ) of radius ε about X30 is mapped into an ellipsoid whose principal axes are determined by the singular values of Φt . In particular, a ball of radius ε is mapped by Φt into an ellipsoid, the maximum and minimum radii of which are bounded by the largest and smallest singular values, respectively, of Φt .

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The conditional Lyapunov exponents λi (X10, X20) (hereafter denoted CLE) are defined by

(

[(

)

)]

1 λ i X 10 , X 20 = lim ln σ i φt X 10 , X 20 , t→∞ t

i = 1, 2, … , (n − m)

whenever the limit exists. The term conditional refers to the fact that the exponents depend explicitly on the trajectory φt (X10, X20 ) of the drive system. Given that ε remains infinitesimally small, one of considering the local linearized dynamics along the flow determined by φt (X10, X20) and determining the average local exponential rates of expansion and contraction along the principal axes of an ellipsoid. If all CLEs are negative, the response subsystem is asymptotically stable. A subsystem, where all the CLEs are negative, is called a stable subsystem. A stable subsystem does not necessarily exhibit dc steady-state behavior. For example, while an asymptotically stable linear parallel RLC circuit has all negative LEs, the system settles to a periodic steady-state solution when driven with a sinusoidal current. Although the RLC subcircuit has negative CLEs in this case, the complete forced circuit has one nonnegative LE corresponding to motion along the direction of the flow. Theorem 4 (Pecora and Carroll): The trajectories X2(t) and X3(t) will synchronize only if the CLEs of the response system (8.28) are all negative. Note that this is a necessary but not sufficient condition for synchronization. If the response and second drive subsystems are identical and the initial conditions X20 and X30 are sufficiently close, and the CLEs of (8.28) are all negative, synchronization will occur. However, if the systems are not identical or the initial conditions are not sufficiently close, synchronization might not occur, even if all of the CLEs are negative. Although we have described it only for an autonomous continuous-time system, the drive-response technique may also be applied for synchronizing nonautonomous and discrete-time circuits. Cascaded Drive-Response Systems The drive-response concept may be extended to the case where a dynamical system can be partitioned into more than two parts. A simple two-level drive-response cascade is constructed as follows. Divide the dynamical system X˙ = F( X ),

X(0) = X 0

(8.29)

into three parts: X˙ 1 = F1 ( X 1 , X 2 , X 3 )

X 1 (0) = X 10

(8.30)

X˙ 2 = F2 ( X 1 , X 2 , X 3 )

X 2 (0) = X 20

(8.31)

X˙ 3 = F3 ( X 1 , X 2 , X 3 )

X 3 (0) = X 30

(8.32)

Now, construct an identical copy of the subsystems corresponding to (8.31) and (8.32) with X1(t) as input: X˙ 4 = F2 ( X 1 , X 4 , X 5 )

X 4 (0) = X 40

(8.33)

X˙ 5 = F3 ( X 1 , X 4 , X 5 )

X 5 (0) = X 50

(8.34)

If all the CLEs of the driven subsystem composed of (8.33) and (8.34) are negative then, after the transient decays, X4(t) = X2(t) and X5(t) = X3(t).

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Note that (8.30)–(8.34) together define one large coupled dynamical system. Hence, the response subsystem can exhibit chaos even if all of its CLEs are negative. Proceeding one step further, we reproduce subsystem (8.30): X˙ 6 = F1 ( X 6 , X 4 , X 5 )

X 6 (0) = X 60

(8.35)

As before, if all of the conditional Lyapunov exponents of (8.35) are negative, then X6(t) – X1(t) → 0. If the original system could be partitioned so that (8.30) is one-dimensional, then using (8.33)–(8.35) as a driven response system, all of the variables in the drive system could be reproduced by driving with just one variable X1(t). This principle can be exploited for spread-spectrum communication using a chaotic carrier signal. Example: Synchronization of Chua’s Circuits Using the Drive-Response Concept. Chua’s circuit may be partitioned in three distinct ways to form five-dimensional, drive-decomposable systems: X1-drive configuration

[

]

dX1 = α X 2 − X1 − f ( X1 ) dt dX 2 = X1 − X 2 − X 3 dt dX 3 = −βX 2 dt dX 4 = X1 − X 4 − X 5 dt dX 5 = −βX 5 dt

With α = 10.0, β = 14.87, a = –1.27, and b = – 0.68, the CLEs for the (X2, X3) subsystem (calculated using INSITE) are (–0.5, –0.5). X2-drive configuration dX 2 = X1 − X 2 − X 3 dt

[

]

dX1 = α X 2 − X1 − f ( X1 ) dt dX 2 = −βX 2 dt

[

]

dX 4 = α X2 − X4 − f (X4 ) dt dX 5 = −βX 5 dt

This case is illustrated in Figure 8.48. The CLEs of the (X1, X3) subsystem are 0 and – 2.5 ± 0.05. Because of the zero CLE, states X5 (t) and X3 (t) remain a constant distance X30 – X50 apart, as depicted in Figure 8.49.

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Bifurcation and Chaos

R

C2

L

+

+

VC2

VC1

−

−

−

+

+

IL

+

IR

C1 VR

NR

R − + L

C1 V′R

V′C1 −

I′L

I′R NR

−

FIGURE 8.48 Synchronization of two Chua’s circuits using the Pecora–Carroll drive-response method with VC2 as drive variable. 5.570

2.770

2.795

−0.005

0.019 x[3]

−2.781 x[5]

−2.757

−5.557

−5.532 −3.660

−1.833

−0.006 x[1]

1.821

3.648

−8.332

3.648

2.770

1.821

−0.005

−0.006 x[4] −1.833

−2.781 x[5] −5.557

−3.660 −3.660

−1.833

−0.006 x[1]

1.821

3.648

−8.332

−3.660

−1.833 −0.006 x[4]

1.821

3.648

−5.532

−2.757

0.019 x[3]

2.795

5.570

FIGURE 8.49 INSITE simulation of the normalized dimensionless form of Figure 8.48, illustrating synchronization of state variables. Identify {x[1], x[2], x[3]} with {VC1, VC2, IL }, and {x[4], x[5]} with {VC′1 , I L′ } · V C′ 1(t) synchronizes with V C′ 1(t), and I L′(t) synchronizes with IL (t). Because one of the CLEs of the response subsystem is zero, the difference in the initial conditions IL0 – IL0 does not decay to zero. Source: L. O. Chua, M. Itoh, L. Ko˘carev, and K. Eckert, “Chaos synchronization in Chua’s circuits,” J. Circuits Syst. Comput., vol. 3, no. 1, p. 106, Mar. 1993.

X3-drive configuration dX 3 = −βX 2 dt

[

]

dX1 = α X 2 − X1 − f ( X1 ) dt dX 2 = X1 − X 2 − X 3 dt

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Nonlinear and Distributed Circuits

[

]

dX 4 = α X5 − X 4 − f (X 4 ) dt dX 5 = X 4 − X5 − X3 dt

The CLEs in this case are 1.23 ± 0.03 and –5.42 ± 0.02. Because the (X1, X2 ) subsystem has a positive CLE, the response subsystem does not synchronize.

8.6

Applications of Chaos

Pseudorandom Sequence Generation One of the most widely used deterministic “random” number generators is the linear congruential generator, which is a discrete-time dynamical system of the form X k +1 = ( AX k + B) mod M ,

k = 0, 1, …

(8.36)

where A, B, and M are called the multiplier, increment, and modulus, respectively. If A > 1, then all equilibrium points of (8.36) are unstable. With the appropriate choice of constants, this system exhibits a chaotic solution with a positive Lyapunov exponent equal to In A. However, if the state space is discrete, for example in the case of digital implementations of (8.37), then every steadystate orbit is periodic with a maximum period equal to the number of distinct states in the state space; such orbits are termed pseudorandom. By using in analog state space, a truly “random” chaotic sequence can be generated. A discrete-time chaotic circuit with an analog state space may be realized in switched-capacitor (SC) technology. Figure 8.50 is an SC realization of the parabolic map x k +1 = V − 0.5x k2

(8.37)

which, by the change of variables X k = Ax k + B

e

o

o

e

C

V e

o

C/2

X2k

C

− +

Xk

FIGURE 8.50 Switched-capacitor (SC) realization of the parabolic map xk+1 = V – 0.5 Xk2. The switches labeled o and e are driven by the odd and even phases, respectively, of a nonoverlapping two-phase clock.

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Bifurcation and Chaos

with µ = 1/(2A), B = 0.5, and A = (−1 ± 1 + 2V ) /(4V), is equivalent to the logistic map X k +1 = µX k (1 − X k )

(8.38)

The logistic map is chaotic for µ = 4 with Lyapunov exponent ln 2 [18]. Figure 8.16 is a bifurcation diagram of (8.38) with 0 ≤ µ ≤ 4. For V < 1.5, the steady-state solution of the SC parabolic map described by (8.37) is a fixed point. As the bifurcation parameter V is increased from 1.5 to 3 V, the circuit undergoes a series of period-doubling bifurcations to chaos. V = 4 corresponds to fully developed chaos on the open interval (0 < Xk < 1) in the logistic map with µ = 4.

Spread-Spectrum and Secure Communications Modulation and coding techniques for mobile communication systems are driven by two fundamental requirements: that the communication channel should be secure and the modulation scheme should be tolerant of multipath effects. Security is ensured by coding and immunity from multipath degradation may be achieved by using a spread-spectrum transmission. With appropriate modulation and demodulation techniques, the “random” nature and “noise-like” spectral properties of chaotic circuits can be exploited to provide simultaneous coding and spreading of a transmission. Chaotic Switching The simplest idea for data transmission using a chaotic circuit is use the data to modulate some parameter(s) of the transmitter. This technique is called parameter modulation, chaotic switching, or chaos shift keying (CSK). In the case of binary data, the information signal is encoded as a pair of circuit parameter sets which produce distinct attractors in a dynamical system (the transmitter). In particular, a single control parameter µ may be switched between two values µ0, corresponding to attractor 0 and µ1, corresponding to 1. By analogy with FSK and PSK, this technique is known as chaos shift keying. The binary sequence to be transmitted is mapped into the appropriate control signal µ(t) and the corresponding trajectory switches, as required, between 1 and 0. One of the state variables of the transmitter is conveyed to the receiver, where the remaining state variables are recovered by drive-response synchronization. These states are then applied to the second stage of a drive-response cascade. At the second level, two matched receiver subsystems are constructed, one of which synchronizes with the incoming signal if a “zero” was transmitted, the other of which synchronizes only if a “one” was transmitted. The use of two receiver circuits with mutually exclusive synchronization properties improves the reliability of the communication system. Chaos shift keying has been demonstrated both theoretically and experimentally. Figure 8.51 depicts a CSK transmitter and receiver based on Chua’s circuit. The control parameter is a resistor with conductance ∆G whose effect is to modulate the slopes Ga and Gb of the Chua diode. Switch S is opened and closed by the binary data sequence and VC 1 is transmitted. At the receiver, the first subsystem (a copy of the (VC 2 , IL ) subsystem of the transmitter) synchronizes with the incoming signal, recovering VC 2 (t). Thus, VC 21 (t) → VC 2 (t). The synchronized local copy of VC 1 (t) is then used to synchronize two further subsystems corresponding to the VC 1 subsystem of the transmitter with and without the resistor ∆G. If the switch is closed at the transmitter, V ′C 12 (but not VC 12 ) synchronizes with VC 1 and if the switch is open, VC 12 (but not VC′12 ) synchronizes with VC 1 . Figure 8.52 presents simulated results for a similar system consisting of two Chua’s circuits. At the receiver, a decision must be made as to which bit has been transmitted. In this case, bout was derived using the rule

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Nonlinear and Distributed Circuits

R

C2

L

+

+

VC2

VR

−

IL

IR

+

S NR

−

C1 ∆G

VC1 −

TRANSMITTER − +

R

+

+ L

VC1

C2

−

VC21 −

FIRST RECEIVER SUBSYSTEM R “ONE” + NR

− +

C1

VC12 −

+ VC21

R “ZERO”

−

+ NR ∆G

C1

V′C12 −

SECOND RECEIVER SUBSYSTEMS

FIGURE 8.51 Chaos shift keying communication system using Chua’s circuit. When a “one” is transmitted, switch S remains open, VC21 (t) synchronizes with VC2 (t), VC12 (t) synchronizes with VC1 (t), and VC′12 (t) falls out of synchronization with VC1 (t). When a “zero” is transmitted, switch S is closed, VC21(t) synchronizes with VC2(t), VC12(t) falls out of synchronization with VC1(t), and V C′ 12(t) synchronizes with VC1(t).

bout

0, bold = 0 1, bold = 1 = bold 1 − b old

for for for for

a0 < ε, a1 > ε a0 > ε, a1 < ε a0 < ε, a1 < ε a0 > ε, a1 > ε

where bold is the last bit received and bout is the current bit [14]. Chaotic Masking Chaotic masking is a method of hiding an information signal by adding it to a chaotic carrier at the transmitter. The drive-response synchronization technique is used to recover the carrier at the receiver. Figure 8.53 is a block diagram of a communication system using matched Chua’s circuits. The receiver has the same two-layer structure as in the previous example. The first subcircuit, which has very negative

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Bifurcation and Chaos

1.5 bin

(a)

1 0.5 0 (b) 2

s 1 2

(c)

∆0 1 0 −1 (d) ∆1

2 0

(e)

0.8 a0 0.6 0.4 0.2 0

(f)

1 a1 0.5 0 1.5

(g)

bout 1 0.5 0 0

10

20 time [ms]

30

40

FIGURE 8.52 Chaos shift keying waveforms. (a) Binary input signal bin; (b) transmitted signal s(t);(c) response ∆0 = VC12 – VC1; (d) response ∆0 = VC′12 – VC1; (e) 40-point moving average of ∆0; (f) 40-point moving average of ∆1; (g) output binary signal bout when ε = 0.1. Source: M. Ogorzalek, “Taming chaos — Part I: Synchronization,” IEEE Trans. Circuits Syst. I, vol. 40, p. 696, Oct. 1993. © 1993 IEEE.

conditional Lyapunov exponents, synchronizes with the incoming signal, despite the perturbation s(t), and recovers VC 2 . The second subcircuit, when driven by VC 2, produces the receiver’s copy of VC 1 . The information signal r(t) is recovered by subtracting the local copy of VC 1 from the incoming signal VC 1 +s(t).

Vector Field Modulation With vector field modulation, an information-carrying signal is added to the vector field at the transmitter and recovered at the receiver [9]. A dynamical system is partitioned as follows:

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Nonlinear and Distributed Circuits

− +

R

L

C2

+

+

VC2

VR

−

−

IL

IR

+

+

NR C1

+

+ VC1 + s(t)

s(t)

VC1 −

−

TRANSMITTER

− +

R

+

+

VC1 + s(t)

L

C2

VC21

−

− FIRST RECEIVER SUBSYSTEM

− +

− +

R

+ +

+ NR C1

VC21

VC12

−

−

−

+

VC1 + s(t) r(t) −

SECOND RECEIVER SUBSYSTEM

FIGURE 8.53 Chaos masking using Chua’s circuits. At the transmitter, the information signal s(t) is added to the chaotic carrier signal VC1 (t). Provided s(t) is sufficiently small and the first receiver subsystem is sufficiently stable, VC21 (t) synchronizes with VC2 (t). This signal is applied to a second receiver subsystem, from which an estimate VC12(t) of the unmodulated carrier VC1 (t) is derived. VC12 is subtracted from the incoming signal VC1 + s(t) to yield the received signal r(t). The method works well only if s(t) is much smaller than VC1 (t).

X˙ 1 = F1 ( X 1 , X 2 )

X 1 (0) = X 10

X˙ 2 = F2 ( X 1 , X 2 )

X 2 (0) = X 20

The information signal S(t) is added into the transmitter X˙ 1 = F1 ( X 1 , X 2 ) + S(t ) X˙ 2 = F2 ( X 1 , X 2 ) and the state X1(t) transmitted.

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X 1 (0) = X 10 X 2 (0) = X 20

(8.39) (8.40)

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Bifurcation and Chaos

R

C2

L

+

+

VC2

VR

−

−

IL

IR

+ NR

s(t) C1

VC1 −

TRANSMITTER

− +

R

r(t)

+

+

VC1

V′R

−

−

I′R NR C1

+

+

V′C1

V′C2

−

−

C2

L I′L

RECEIVER

FIGURE 8.54 Vector field modulation using Chua’s circuit. The signal s(t) to be transmitted is applied as perturbation of the vector field at the transmitter. The receiver’s (V C′2 , I L′ ) subsystem synchronizes with the corresponding subsystem at the transmitter. This synchronized subsystem drives the V C′1 subsystem. The transmitted signal s(t) is recovered as an excess current r(t) at the receiver.

The receiver contains a copy of the second drive subsystem (8.41) X˙ 3 = F2 ( X 1 , X 3 )

X 3 (0) = X 30

where the state X3(t) synchronizes with X2(t), and a demodulator, R(t ) = X˙ 1 − F1 ( X 1 , X 3 ) which is used to recover S(t). If all of the CLEs of the response system are negative, and the initial conditions are sufficiently close, then X 3 (t ) → X 2 (t ) and the recovered signal R(t) equals S(t).

Example: Communication via Vector Field Modulation Using Chua’s Circuits A communication system based on Chua’s circuit that uses the vector field modulation technique and a chaotic carrier is illustrated in Figure 8.54. In this case, the signal to be transmitted is the scalar current s(t), which is recovered as a current r(t) at the receiver. The state equations of the coupled drive-response system are:

C1 C2

dVC1 dt dVC2 dt

L

(

) ( )

(

)

= G VC2 − VC1 − f VC1 + s(t ) = G VC1 − VC2 + I L

dI L = − VC2 dt

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Nonlinear and Distributed Circuits

C2

dVC′2 dt L

(

)

= G VC1 − VC′2 + I L′

dI L′ = − VC′2 dt

Because the CLEs of the (VC2, IL) subsystem are negative, VC′2 (t) → VC2 (t) and I′L (t) → IL (t). The current r(t) at the receiver is given by r (t ) = C1 = C1

dVC1 dt dVC1 dt

(

) ( )

(

) ( )

− G VC′2 − VC1 − f VC1 − G VC2 − VC1 − f VC1

= s(t )

Miscellaneous Chaotic circuits may also be used for suppressing spurious tones in Σ∆ modulators, for modeling musical instruments, fractal pattern generation, image-processing, and pattern recognition [3]. A chaotic attractor contains an infinite number of unstable periodic trajectories of different periods. Various control schemes for stabilizing particular orbits in chaotic circuits have been successfully demonstrated [14].

References [1] F. M. Callier and C. A. Desoer, Linear System Theory, New York: Springer-Verlag, 1991. [2] L. O. Chua, C. A. Desoer, and E. S. Kuh, Linear and Nonlinear Circuits, New York: McGraw-Hill, 1987. [3] L. O. Chua and M. Hasler, Eds., Special Issue on Chaos in Nonlinear Electronic Circuits, Part A: Tutorials and Reviews, IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, Oct. 1993; Part B: Bifurcation and Chaos, IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, Nov. 1993; Part C: Applicat., IEEE Trans. Circuits Syst. II, Analog and Digital Signal Process., vol. 40, Oct. 1993. [4] L. O. Chua, M. Itoh, L. Ko˘carev, and K. Eckert, “Chaos synchronization in Chua’s circuit,” J. Circuits Syst. Comput., vol. 3, no. 1, pp. 93–108, Mar. 1993. [5] L. O. Chua, C. W. Wu, A. Huang, and G.-Q. Zhong, “A universal circuit for studying and generating chaos — Part I: Routes to chaos,” IEEE Trans. Circuits Syst. I, Fundamental Theory Applicat., vol. 40, pp. 732–744, Oct. 1933. [6] J. A. Glazier and A. Libchaber, “Quasi-periodically and dynamical systems: An experimentalist’s view,” IEEE Trans. Circuits Syst., vol. 35, pp. 790–809, July 1988. [7] J. Guckenheimer and P. Holmes, Nonlinear Oscillations, Dynamical Systems, and Bifurcations of Vector Fields, New York: Springer-Verlag, 1983. [8] M. W. Hirsch, “The dynamical systems approach to differential equations,” Bull. Amer. Math. Soc., vol. 11, no. 1, pp. 1–64, July 1984. [9] M. Itoh, H. Murakami, K. S. Halle, and L. O. Chua, “Transmission of signals by chaos synchronization,” IEICE Tech. Rep., CAS93-39, NLP93-27, pp. 89–96, 1993. [10] M. P. Kennedy, “Three steps to chaos — Part I: Evolution,” IEEE Trans. Circuits and Systems I, Fundament. Theory Applicat., vol. 40, pp. 640–656, Oct. 1993; “Three steps to chaos — Part II: A Chua’s circuit primer,” IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, pp. 657–674, Oct. 1993. [11] M. P. Kennedy and L. O. Chua, “Van der Pol and chaos,” IEEE Trans. Circuits Syst., vol. CAS-33, pp. 974–980, Oct. 1986.

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8-69

[12] M. P. Kennedy, K. R. Krieg, and L. O. Chua, “The Devil’s staircase: The electrical engineer’s fractal,” IEEE Trans. Circuits Syst., vol. 36, pp. 1133–1139, 1989. [13] W. Lauterborn and U. Parlitz, “Methods of chaos physics and their application to acoustics,” J. Acoust. Soc. Amer., vol. 84, no. 6, pp. 1975–1993, Dec. 1988. [14] M. Ogarzalek, “Taming chaos — Part I: Synchronization,” IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, pp. 693–699, Oct. 1993; “Taming chaos — Part II: Control,” IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, pp. 700–706, Oct. 1993. [15] T. S. Parker and L. O. Chua, Practical Numerical Algorithms for Chaotic Systems, New York: SpringerVerlag, 1989. [16] L. M. Pecora and T. Carroll, “Driving systems with chaotic signals,” Phys. Rev., vol. 44, no. 4, pp. 2374–2383, Aug. 15, 1991. [17] W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes in C, Cambridge: Cambridge Univ., 1988. [18] J. M. T. Thompson and H. B. Stewart, Nonlinear Dynamics and Chaos, New York: Wiley, 1986. [19] M. Vidyasagar, Nonlinear Systems Analysis, Englewood Cliffs, NJ: Prentice-Hall, 1978. [20] C. W. Wu and N. F. Rul’kov, “Studying chaos via 1-D maps — A tutorial,” IEEE Trans. Circuits Syst. I, Fundament. Theory Applicat., vol. 40, pp. 707–721, Oct. 1993. [21] L. O. Chua, M. Komuro, and T. Matsumoto, “The Double Scroll Family, Parts I and II,” IEEE Trans. Circuits Syst., vol. 33, pp. 1073–1118, Nov. 1986.

Further Information Current Research in Chaotic Circuits. The August 1987 issue of the Proceedings of the IEEE is devoted to “Chaotic Systems.” The IEEE Transactions on Circuits and Systems, July 1988, focuses on “Chaos and Bifurcations of Circuits and Systems.” A three-part special issue of the IEEE Transactions on Circuits and Systems on “Chaos in Electronic Circuits” appeared in October (parts I and II) and November 1993 (part I). This Special Issue contains 42 papers on various aspects of bifurcations and chaos. Two Special Issues (March and June 1993) of the Journal of Circuits, Systems and Computers are devoted to “Chua’s Circuit: A Paradigm for Chaos.” These works, along with several additional papers, a pictorial guide to forty-five attractors in Chua’s oscillator, and the ABC simulator, have been compiled into a book of the same name — Chua’s Circuit: A Paradigm for Chaos, R. N. Madan, Ed. Singapore: World Scientific, Singapore 1993. Developments in the field of bifurcations and chaos, with particular emphasis on the applied sciences and engineering, are reported in International Journal of Bifurcation and Chaos, which is published quarterly by World Scientific, Singapore 9128. Research in chaos in electronic circuits appears regularly in the IEEE Transactions on Circuits and Systems. Simulation of Chaotic Circuits. A variety of general-purpose and custom software tools has been developed for studying bifurcations and chaos in nonlinear circuits systems. ABC (Adventures in Bifurcations and Chaos) is a graphical simulator of Chua’s oscillator, which runs on IBM-compatible PCs. ABC contains a database of component values for all known attractors in Chua’s oscillator, initial conditions, and parameter sets corresponding to homoclinic and heteroclinic trajectories, and bifurcation sequences for the period-doubling, intermittency, and quasiperiodic routes to chaos. The program and database are available from Dr. Michael Peter Kennedy Department of Electronic and Electrical Engineering University College Dublin Dublin 4, Ireland E-mail: [email protected]

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Nonlinear and Distributed Circuits

In “Learning about Chaotic Circuits with SPICE,” IEEE Transactions on Education, vol. 36, pp. 28–35, Jan. 1993, David Hamill describes how to simulate a variety of smooth chaotic circuits using the generalpurpose circuit simulator SPICE. A commercial variant of SPICE, called PSpice, is available from MicroSim Corporation 20 Fairbanks Irvine, CA 92718 Telephone: (714) 770-3022 The free student evaluation version of this program is sufficiently powerful for studying simple chaotic circuits. PSpice runs on both workstations and PCs. INSITE is a software toolkit that was developed at the University of California, Berkeley, for studying continuous-time and discrete-time dynamical systems. The suite of nine programs calculates and displays trajectories, power spectra, and state delay maps, draws vector fields of two-dimensional systems, reconstructs attractors from time series, calculates Poincaré sections, dimension, and Lyapunov exponents. The package runs on DEC, HP, IBM, and Sun workstations under UNIX, and on IBM-compatible PCs under DOS. For additional information, contact INSITE Software P.O. Box 9662 Berkeley, CA 94709 Telephone: (510) 530-9259

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9 Transmission Lines 9.1

Generic Relations ............................................................... 9-1 Equivalent Circuit • Transmission Line Equations • General Solutions and Propagation Constant • Characteristic Impedance • Wavelength • Phase Velocity • Voltage Reflection Coefficient at the Load • Voltage Reflection Coefficient at the Input • Input Impedance • Input Admittance

9.2

Two-Wire Lines .................................................................. 9-5 Geometric Structure • Transmission Line Parameters • Wavelength and Phase Velocity

9.3

Coaxial Lines ...................................................................... 9-7 Geometric Structure • Transmission Line Parameters • Wavelength and Phase Velocity

9.4

Waveguides ......................................................................... 9-9 Rectangular Waveguides • Waveguide Parameters • Circular Waveguides

9.5

Microstrip Lines ............................................................... 9-13 Geometric Structure • Transmission Line Parameters • Wavelength and Phase Velocity

T. K. Ishii

9.6

Marquette University, Wisconsin

9.1

Coplanar Waveguide ........................................................ 9-15 Geometric Structure • Transmission Line Parameters • Wavelength and Phase Velocity

Generic Relations

Equivalent Circuit The equivalent circuit of a generic transmission line in monochromatic single frequency operation is · shown in Fig. 9.1 [1–3], where Z is a series impedance per unit length of the transmission line (Ω/m) · and Y is a shunt admittance per unit length of the transmission line (S/m). For a uniform, nonlinear · · · · transmission line, either Z or Y or both Z and Y are functions of the transmission line voltage and current, · · but both Z and Y are not functions of location on the transmission line. For a nonuniform, linear · · transmission line, both Z and Y are functions of location, but not functions of voltage and current on · · · · the transmission line. For a nonuniform and nonlinear transmission line, both Z and Y or Z or Y are functions of the voltage, the current, and the location on the transmission line.

Transmission Line Equations Ohm’s law of a transmission line, which is the amount of voltage drop on a transmission line per unit distance of voltage transmission is expressed as dV˙ /˙ ˙ = − IZ dz

(V m)

(9.1)

9-1 Copyright © 2006 Taylor & Francis Group, LLC

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9-2

Nonlinear and Distributed Circuits

. Z

. Z . Y

. Z

. Z

. Y

. Y

. Y

FIGURE 9.1 Equivalent circuit of a generic transmission line.

· · where V is the transmission line voltage (Volt), I is the transmission line current (Ampere), Z is the series impedance per unit length of the transmission line (Ω), and z is a one-dimensional coordinate placed in parallel to the transmission line (meter). The equation of current decrease per unit length is dI˙ ˙˙ = −YV dz

(A m)

(9.2)

· where Y is the shunt admittance per unit distance of the transmission line (S/m). Combining (9.1) and (9.2), the Telegrapher’s equation or Helmholtz’s wave equation for the transmission line voltage is [1–3]. d 2V˙ ˙ ˙ ˙ − ZYV = 0 dz 2

( V m )2

(9.3)

The Telegrapher’s equation or Helmholtz’s wave equation for the transmission line current is [1–3] d 2 I˙ ˙ ˙ ˙ − ZY I = 0 dz 2

(A m ) 2

(9.4)

General Solutions and Propagation Constant The general solution of the Telegrapher’s equation for transmission line voltage is [1–3] ˙ ˙ V˙ = V˙ F ε − γ z + V˙ R ε γ z

(9.5) · · where VF is the amplitude of the voltage waves propagating in +z-direction, VR is the amplitude of the voltage waves propagating –z-direction, and γ˙ is the propagation constant of the transmission line [1].

(m )

˙ ˙ = α + γβ ˙ γ˙ = ± ZY

–1

(9.6)

where the + sign is for forward propagation or propagation in +z-direction, and the – sign is for the backward propagation or propagation in –z-direction. α is the attenuation constant and it is the real part of propagation constant γ˙ : ˙ /˙ α = ℜγ˙ = ℜ ZY

(m ) –1

(9.7)

In (9.6), β is the phase constant and it is the imaginary part of the propagation constant γ· : ˙ ˙ β = ℑγ˙ = ℑ ZY

(m ) –1

(9.8)

Characteristic Impedance The characteristic impedance of the transmission line is [1–3] Z0 =

Copyright © 2006 Taylor & Francis Group, LLC

Z˙ Y˙

(Ω )

(9.9)

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9-3

Transmission Lines

z=0 . V i(o)

. V i( )

z=

l

l

. ZL

Zo . V r(o)

. V r( )

· · FIGURE 9.2 Incident wave V i and reflected wave V r.

l

Wavelength The wavelength of the transmission line voltage wave and transmission line current wave is λ=

2π 2π = ˙ ˙ β ℑ ZY

(m )

(9.10)

Phase Velocity The phase velocity of voltage wave propagation and current wave propagation is υp = f λ =

ω β

( m s)

(9.11)

where f is the frequency of operation and the phase constant is β=

2π λ

(m ) −1

(9.12)

Voltage Reflection Coefficient at the Load · If a transmission line of characteristic impedance Z0 is terminated by a mismatched load impedance ZL, · as shown in Fig. 9.2, a voltage wave reflection occurs at the load impedance ZL. The voltage reflection coefficient is [1–3] ˜ V˙ r (l ) Z˙ − Z 0 Z˙ L − 1 ρ˙ (l ) = ˙ i = ˙ L = ˜ V (l ) Z L + Z 0 Z˙ + 1 L

(9.13)

˜ · where ρ (l ) is the voltage reflection coefficient at z = l, and Z˙ = Z˙ L Z 0 is the normalized load impedance. · · Vi (l ) is the incident voltage at the load at z = l. When Z0 is a complex quantity Z0, then Z˙ − Z 0∗ ρ˙ (l ) = ˙ L Z L + Z 0∗

(9.14)

· where Z0∗ is a conjugate of Z0.

Voltage Reflection Coefficient at the Input Input Fig. 9.2 V˙ i (l) is caused by V˙ i (0) , which is the incident voltage at the input z = 0 of the transmission line. V˙ r (l) produces, V˙ r (0), which is the reflected voltage at the input z = 0. The voltage reflection coefficient at the input occurs, then, by omitting transmission line loss [1–3] V˙ r (0) = ρ˙ (l )ε −2 jβl ρ˙ = ˙ i V (0)

Copyright © 2006 Taylor & Francis Group, LLC

(9.15)

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Nonlinear and Distributed Circuits

Input Impedance At the load z = l, from (9.13), 1 + ρ˙ (l ) ˜ Z˙ L = 1 − ρ˙ (l )

(9.16)

1 + ρ˙ (l ) Z˙ L = Z 0 1 − ρ˙ (l )

(9.17)

1 + ρ˙ (0) ˜ Z˙ (0) = 1 − ρ˙ (0)

(9.18)

1 + ρ˙ (l )ε −2 jβl ˜ Z˙ (0) = 1 − ρ˙ (l )ε −2 jβl

(9.19)

˜ Z˙ + j tan βl ˜ Z˙ (0) = ˜ 1 + jZ˙ L tan βl

(9.20)

Z˙ + jZ tan βl ˜ Z˙ (0) = L ˙ 0 Z 0 + jZ L tan βl

(9.21)

γ˙ = α + j β

(9.22)

Z˙ + Z˙ 0∗ tanh γ˙ l Z˙ (0) = Z˙ 0∗ L∗ Z˙ 0 + Z˙ L tanh γ˙/l

(9.23)

or

At the input of the transmission line z = 0

Using (9.15),

Inserting (9.13), [1–3]

or

If the line is lossy and

then [1]

· · where Z0∗ is the complex conjugate of Z0.

Input Admittance The input admittance at z = 0 is Y˙ + Y˙ ∗ tanh γ˙ l Y˙ (0) = Y˙0∗ L∗ 0 Y˙0 + Y˙L tanh γ˙ l

(9.24)

where Y˙ (0) is the input admittance of the transmission line, Y˙0 is the characteristic admittance of the transmission line, which is 1 Y˙0 = Z˙

0

Copyright © 2006 Taylor & Francis Group, LLC

(9.25)

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9-5

Transmission Lines

· · and Y˙0∗ is the conjugate of Y0 · YL is the load admittance; i.e., 1 Y˙L = ˙ ZL

(9.26)

γ˙ = j β

(9.27)

Z˙ + jZ 0 tan βl Z˙ (0) = L Z 0 + jZ L tan βl

(9.28)

When the line is lossless,

then [1–3]

9.2

Two-Wire Lines

Geometric Structure A structural diagram of the cross-sectional view of a commercial two-wire line is shown in Fig. 9.3. As observed in this figure, two parallel conductors, in most cases made of hard-drawn copper, are positioned by a plastic dielectric cover.

Transmission Line Parameters In a two-wire line Z˙ = R + jX = R + jωL

(Ω m )

(9.29)

· where Z is the impedance per unit length of the two-wire line (Ω/m), R is the resistance per unit length (Ω/m), X is the reactance per unit length (Ω/m), ω = 2π f is the operating angular frequency (s –1), and L is the inductance per unit length (H/m). For a two-wire line made of hard-drawn copper [4] R = 8.42

f a

(µΩ m)

(9.30)

where f is the operating frequency and a is the radius of the conductor [4]: L = 0.4 ln

b a

( µH m ) b

(9.31)

conductor

a a

dielectric conductor

FIGURE 9.3 Cross-sectional view of a two-wire line.

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9-6

Nonlinear and Distributed Circuits

where b is the wire separation or the center-to-center distance of the two-wire line as illustrated in Fig. 9.3.

(S m )

Y˙ = G + jB = G + jωC

(9.32)

· where Y is a shunt admittance per unit length of the two-wire line (S/m), G is a shunt conductance per unit length of the two-wire line (S/m), B is a shunt susceptance per unit length (S/m), and C is a shunt capacitance per unit length (F/m) G=

3.14σ d b cosh−1 2a

(pS m)

(9.33)

where σd is the insulation conductivity of the plastic dielectric surrounding the two parallel conductors, and C=

27.8ε r b cosh −1 2a

(pF m)

(9.34)

where ε r is the relative permittivity of the plastic insulating material [5]. If R and G are negligibly small, the characteristic impedance is [6] Z 0 = 277 log10

(Ω )

b a

(9.35)

The attenuation constant of a generic two-wire line is, including both R and G [1], α=

R GZ 0 + 2Z0 2

(m ) –1

(9.36)

and the phase constants is [1] (ωLB − RG) + β =

(RG − ωLB)2 + (ωLG + BR)2

1 2

(m ) –1

2

(9.37)

Wavelength and Phase Velocity The wavelength on a lossless two-wire line (R = 0, G = 0) is λ0 =

ω = β0

(m )

1 LC

(9.38)

where β0 is the phase constant of the lossless two-wire line

(m )

β0 = ω LC

–1

(9.39)

The wavelength on a lossy two-wire line (R ≠ 0, G ≠ 0) is 2π λ= = β (ωLB − RG) +

Copyright © 2006 Taylor & Francis Group, LLC

1

2 8π 2 2 (RG − ωLB) + (ωLG + BR) 2

(m )

(9.40)

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9-7

Transmission Lines

The phase velocity of transverse electromagnetic (TEM) waves on a lossless two-wire line is v0 = f λ 0 =

ω = β0

( m s)

1 LC

(9.41)

The phase velocity of TEM waves on a lossy two-wire line is ω v = f λ = = β (ωLB − RG ) +

9.3

1

2 (RG − ωLB)2 + (ωLG + BR)2 2ω 2

( m s)

(9.42)

Coaxial Lines

Geometric Structure A generic configuration of a coaxial line is shown in Fig. 9.4. The center and outer conductors are coaxially situated and separated by a coaxial insulator. Generally, coaxial lines are operated in the TEM mode, in which both the electric and magnetic fields are perpendicular to the direction of propagation. The propagating electric fields are in the radial direction and propagating magnetic fields are circumferential to the cylindrical surfaces. In Fig. 9.4, a is the radius of the center conductor, b is the inner radius of the outer conductor, and c is the outer radius of the outer conductor.

Transmission Line Parameters The series resistance per unit length of the line for copper is [7], 1 1 R = 4.16 f + a b

(µΩ m)

(9.43)

The series inductance per unit length is L = 0.2 ln

b a

(µH m)

c b

center conductor

outer conductor

insulator

FIGURE 9.4 Generic configuration of a coaxial line.

Copyright © 2006 Taylor & Francis Group, LLC

a

(9.44)

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9-8

Nonlinear and Distributed Circuits

The shunt conductance per unit length is 6.28σ i ln(b a)

G=

(S m )

(9.45)

where σi is the conductivity of the insulator between the conductors. The shunt capacitance per unit length is C=

55.5ε r ln(b a)

(pF m)

(9.46)

where ε r is the relative permittivity of the insulator. When the loss of the line is small, the characteristic impedance of the coaxial line is Z0 =

(Ω )

138 b log10 a εr

(9.47)

when the line is lossy [1] Z˙ R + jωL = R0 + jX 0 = Y˙ G + jωC

Z˙ 0 =

2 RG + ω LC + R0 =

(

X0 =

(9.48) 1

2 RG + ω LC + (ωLG – ωRC ) 2 2 2 G +ω C 2

)

2

2

1 ωLG − ωCR ⋅ 2R0 G 2 + ω 2C 2

(9.49)

(9.50)

The propagation constant of the coaxial line is γ˙ = α + jβ

(9.51)

The attenuation constant is [1] α=

ωLG + ωCR 2β

(9.52)

where the phase constant is 2 ω LC − RG + β=

(

) (RG − ω LC ) + (ωLG + ωRC ) 2

2

2

1

2

2

(9.53)

Wavelength and Phase Velocity The phase velocity on the coaxial line is υp =

ω β

(9.54)

λ1 =

2π β

(9.55)

The wavelength on the line is

Copyright © 2006 Taylor & Francis Group, LLC

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9-9

Transmission Lines

9.4

Waveguides

Rectangular Waveguides Geometric Structure A rectangular waveguide is a hollow conducting pipe of rectangular cross section as depicted in Fig. 9.5. Electromagnetic microwaves are launched inside the waveguide through a coupling antenna at the transmission site. The launched waves are received at the receiving end of the waveguide by a coupling antenna. In this case, a rectangular coordinate system is set up on the rectangular waveguide (Fig. 9.5). The z-axis is parallel to the axis of the waveguide and is set coinciding with the lower left corner of the waveguide. The wider dimension of the cross section of the waveguide a and the narrower dimension of the cross section of the waveguide is b, as shown in the figure. Modes of Operation The waveguide can be operated in either H- or E-modes, depending on the excitation configuration. An H-mode is a propagation mode in which the magnetic field, H, has a z-component, Hz, as referred to in Fig. 9.5. In this mode, the electric field, E, is perpendicular to the direction of propagation, which is the +z-direction. Therefore, an H-mode is also called a transverse electric (TE) mode. An E-mode is a propagation mode in which the electric field, E, has a z-component, Ez, as referred to in Fig. 9.5. In this mode, the magnetic field, H, is perpendicular to the direction of propagation, which is the +z-direction. Therefore, an E-mode is also called a transverse magnetic (TM) mode. Solving Maxwell’s equations for H-modes [1], mπ x n π y − γ˙ z + j ω t H˙ z = H˙ 0 cos cos ε a b

(9.56)

· · where H0 is the amplitude of Hz . Waveguide loss was neglected. Constants m and n are integral numbers 0, 1, 2, 3, … and are called the mode number, and γ· is the propagation constant. Both m and n cannot equal 0 simultaneously. Solving Maxwell’s equations for E-modes [1],

Y

b o

X

a

conducting wall

Z

FIGURE 9.5 A rectangular waveguide and rectangular coordinate system.

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9-10

Nonlinear and Distributed Circuits

mπx nπy − γ˙z + jωt ε E˙ z = E˙ 0 sin sin a b

(9.57)

· · where E0 is the amplitude of Ez. Neither m nor n can equal 0. The waveguide loss was neglected. An H-mode is expressed as the Hmn-mode or TEmn-mode. An E-mode is expressed as the Emn-mode or TMmn-mode.

Waveguide Parameters Propagation constant γ˙ of a rectangular waveguide made of a good conductor [1]: λ γ˙ = jβ0 1 − λc

2

(m ) −1

(9.58)

where β0 is the phase constant of free space, which is β0 =

2π λ

(m ) −1

(9.59)

Here, λ is the wavelength in free space, and λc is the cutoff wavelength of the waveguide. Electromagnetic waves with λ > λc cannot propagate inside the waveguide. It is given for both Emn-mode and Hmn-mode operation by [1]:

(m )

2

λc =

2

m n + a b

2

(9.60)

This means that if the waveguide is made of a good conductor, the attenuation constant

(m ) −1

α≈0

(9.61)

and the phase constant is λ β g = β0 1 − λc

2

(9.62)

The wavelength in the waveguide, i.e., waveguide wavelength λg , is longer than the free-space wavelength λ: λg =

λ λ 1− λc

(9.63)

2

Then, the speed of propagation vp is > c = f λ. vp = f λg =

Copyright © 2006 Taylor & Francis Group, LLC

fλ λ 1− λc

2

=

c λ 1− λc

2

(9.64)

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9-11

Transmission Lines

For an Hmn-mode, the wave impedance is

−E˙ E˙ ηH = ˙ y = ˙ x = Hx Hy

µ0 ε0 λ 1− λc

(Ω )

2

(9.65)

For an Emn-mode the wave impedance is 2 −E˙ λ E˙ ηE = ˙ y = ˙ x = 1 − Hx Hy λc

µ0 ε0

(Ω )

(9.66)

Circular Waveguides Geometric Structure A circular waveguide is a hollow conducting pipe of circular cross section, as depicted in Fig. 9.6. Electromagnetic microwaves are launched inside the waveguide through a coupling antenna at the transmission site. The launched waves are received at the receiving end of the waveguide by a coupling antenna. In this case, a circular coordinate system (r, φ, z) is set up in the circular waveguide, as depicted in Fig. 9.6. The z-axis is coincident with the axis of the cylindrical waveguide. The inside radius of the circular waveguide is a. Modes of Operation The circular waveguide can be operated in either H- or E-modes, depending on the excitation configuration. An H-mode is a propagation mode in which the magnetic field, H, has a z-component, Hz, as referred to in Fig. 9.6. In this mode the electric field, E, is perpendicular to the direction of propagation, which is the +z-direction. Therefore, an H-mode is also called a TE mode. In the mode Ez = 0. An E-mode is a propagation mode in which the electric field, E, has a z-component, Ez , as referred to in Fig. 9. 6. In this mode the magnetic field, H, is perpendicular to the direction of propagation, which is the +z-direction. Therefore, an E-mode is also called a TM mode. Solving Maxwell’s equations [1], ˙ H˙ z = H˙ 0 J n (kcm ′ r ) cos nφε − γz + jωt

(9.67)

Y

(r,φ,z) a X o

z

Z

r

φ

Copyright © 2006 Taylor & Francis Group, LLC

FIGURE 9.6 A circular waveguide and cylindrical coordinate system.

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9-12

Nonlinear and Distributed Circuits

· · Here, H0 is the amplitude of Hz, n and m are integral numbers 0, 1, 2, 3, … and are called the mode ′ r) is the Bessel function of nth order, with the argument that kcm ′ r, kcm ′ is the mth root of number, Jn (kcm J′n (kcm a) = 0, which is kcm ′ =

unm ′ a

(9.68)

′ is the mth root of the derivative of the Bessel function of order n, i.e., J n′ (x) = 0, where x is a where unm generic real argument. The propagation constant is γ˙ . Solving Maxwell’s equations for E-modes, ˙ E˙ z = E˙ 0 J n (kcmr ) cos nφε − γz + jωt

(9.69)

kcm is an mth root of Jn (kc a) = 0, which is kcm =

unm a

(9.70)

where unm is the mth root of the Bessel function of order n, i.e., Jn (x) = 0, where x is a generic real argument. An H-mode in a circular waveguide is expressed as the Hnm-mode or the TMnm-mode. An E-mode is expressed as the Enm-mode or the TMnm-mode. Waveguide Parameters The propagation constant γ˙ of a circular waveguide made of a good conductor is [1] λ γ˙ = jβ0 1 − λc

(m ) −1

(9.71)

where β0 is the phase constant of free space, which is β0 =

2π λ

(m ) −1

(9.72)

Here, λ is the wavelength in free space, and λc is the cutoff wavelength of the waveguide. Electromagnetic waves with λ > λc cannot propagate inside the waveguide. It is given for an Hnm-mode [1] λCH =

2πa unm ′

(m )

(9.73)

λCE =

2πa unm

(m )

(9.74)

For Enm-mode operation,

This means that if the waveguide is made of a good conductor, the attenuation constant is α≈0

(m ) −1

(9.75)

and the phase constant is λ β g = β0 1 − λc

Copyright © 2006 Taylor & Francis Group, LLC

2

(m ) −1

(9.76)

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9-13

Transmission Lines

The waveguide wavelength is λ

λg =

(m ) −1

λ 1− λc

2

(9.77)

The speed of propagation (phase velocity) is vp = f λg =

( m s)

c λ 1− λc

2

(9.78)

For an Hnm-mode, the wave impedence is E˙ −E˙ φ jωµ 0 ηH = ˙ r = ˙ = Hφ Hr γ˙ =

ωµ 0 λ β0 1 − λc

(Ω )

2

(9.79)

For an Enm-mode, the wave impedance is −E˙ E˙ γ˙ ηE = ˙ r = ˙ φ = Hφ Hr jωε 0

=

9.5

λ β0 1 − λc ωε 0

(9.80)

2

(Ω )

Microstrip Lines

Geometric Structure Figure 9.7 presents a general geometric structure of a microstrip line. A conducting strip of width, w, and thickness, t, is laid on an insulating substrate of thickness, H, and permittivity, ε = ε0 εr . The dielectric substrate has a groundplate underneath, as presented in Fig. 9.7.

Transmission Line Parameters The characteristic impedance, Z0, of a microstrip line, as shown in Fig. 9.7, is given by [8–10]

Z0 =

4H ln 1+ ε r + 1 w ′

42.4

2 14 + 8 ε r 4H 14 + 8ε r 4H 1 + 1 ε r 2 π + + 11 w ′ 2 11 W ′

where w ′ is an effective width of the microstrip, which is given by

Copyright © 2006 Taylor & Francis Group, LLC

(9.81)

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9-14

Nonlinear and Distributed Circuits

conducting strip

insulating substrate

∈ = ∈o∈r

t W H

ground plate

FIGURE 9.7 Geometric structure of a microstrip line.

w′ = w +

1 + 1 εr t ⋅ ln 2 π

10.87 1π t + H w t + 1.10 2

2

(9.82)

The attenuation constant of a microstrip line is α=

p + p′ Z 01 2π 2 Z0 λ0

(Np m)

(9.83)

where 1 8H Z 01 ≡ 30 ln 1 + 2 w ′

2 8H + 8H + π 2 w′ w′

(9.84)

Z 01 Z 0δ

(9.85)

and p ≡1− where 1 8( H + δ) Z 0δ ≡ 30 ln 1 + 2 w ′

8H + δ ) + 8H + δ 2 + π 2 w′ w′

(9.86)

1 π f µσ

(9.87)

and δ=

is the skin depth of the conducting strip of conductivity σ p′ ≡

Copyright © 2006 Taylor & Francis Group, LLC

Pk 1/ q −1 1− εr

(9.88)

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9-15

Transmission Lines

where ε r = ε r′ − jε r′′

(9.89)

ε ′′ PK = sin tan −1 r ε r′

(9.90)

2 1 Z 01 − 1 q= ε r − 1 Z 0

(9.91)

and

and

Wavelength and Phase Velocity The transmission line wavelength is Z0 λ Z 01 0

(9.92)

2π Z 01 λ0 Z0

(9.93)

λ1 = The phase constant of the microstrip line is then β=

The phase velocity of electromagnetic waves on the microstrip line is v p = 3 × 108

9.6

Z0 Z 01

(9.94)

Coplanar Waveguide

Geometric Structure A cross-sectional view of a coplanar waveguide (CPW) is given in Fig. 9.8. The waveguide consists of a narrow, central conducting strip of width s(m) and very wide conducting plates on both sides of the central conducting strip, with gap widths w. These conductors are developed on a surface of dielectric substrate of thickness d, as presented in the figure. The electromagnetic waves propagate in the gap between the outer conducting plates and the center conducting strip.

center metal plate outer metal plate

w

outer metal plate

w s

substrate

FIGURE 9.8 Cross-sectional view of a coplanar waveguide.

Copyright © 2006 Taylor & Francis Group, LLC

d

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9-16

Nonlinear and Distributed Circuits

Transmission Line Parameters The attenuation constant of a coplanar waveguide is given by [11]

5

π α = ⋅2⋅ 2

1–

ε eff ( f ) εr

⋅

ε eff ( f )

(s + 2w )2 εr3/2 Np m ( ) c 3 K ′(k )K (k )

(9.95)

εr

where the effective dielectric constant is given by ε eff ( f ) = ε q +

εr − εq f 1 + a f TE

−b

(9.96)

and εq =

ε r +1 2

(9.97)

εr is the relative permittivity of the substrate material, f TE =

c 4d ε r − 1

(9.98)

is the TE mode cutoff frequency, k ≡ s (s + 2w )

(9.99)

K (k) is the complete ellipitic integral of the first kind of the argument k, and c is the speed of light in vacuum, which is 3 × 108 m/s. The parameter a is [11] s a ≈ log −1 u log + v w

(9.100)

u ≈ 0.54 − 0.64q + 0.015q 2

(9.101)

v ≈ 0.43 − 0.86q + 0.54q 2

(9.102)

q ≈ log

s d

(9.103)

The parameter b is an experimentally determined constant b ≈ 1.8 K ′(k ) = K

Copyright © 2006 Taylor & Francis Group, LLC

(9.104)

( 1−k ) 2

(9.105)

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9-17

Transmission Lines

The phase constant of the coplanar waveguide is β( f ) = 2π

f c

ε eff ( f )

(rad m)

(9.106)

The characteristic impedence of the coplanar waveguide is [11] Z0 =

K ′(k ) ε eff ( f ) 4 K (k )

120π

(Ω )

(9.107)

Wavelength and Phase Velocity The wavelength of electromagnetic waves propagating on a coplanar waveguide is obtained from (9.106): λl =

2π 1 c = ⋅ = β( f ) f ε eff ( f )

λ

ε eff ( f )

(m )

(9.108)

The phase velocity of the waves on the coplanar waveguide is, then, v p = f λ1 =

c

ε eff ( f )

( m s)

(9.109)

References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]

T. K. Ishii, Microwave Engineering, San Diego, CA: Harcount, Brace, Jovanovich, 1989. J. R. Wait, Electromagnetic Wave Theory, New York: Harper & Row, 1985. V. F. Fusco, Microwave Circuits, Englewood Cliffs, NJ: Prentice Hall, 1987. L. A. Ware and H. R. Reed, Communications Circuits. New York: John Wiley & Sons, 1949. E. A. Guillemin, Communications Networks, New York: John Wiley & Sons, 1935. F. E. Terman, Radio Engineering, New York: McGraw-Hill, 1941. H. J. Reich, P. F. Ordung, H. L. Krauss, and J. G. Skalnik, Microwave Theory and Techniques, Princeton, NJ: D. Van Nostrand, 1953. H. A. Wheeler, “Transmission-line properties of parallel strips separated by a dielectric sheet,” IEEE Trans. MTT, vol. MTT-13, pp. 172–185, Mar. 1965. H. A. Wheeler, “Transmission-line properties of parallel strips by a conformal-mapping approximation,” IEEE Trans. MTT, vol. MTT-12, pp. 280–289, May 1964. H. A. Wheeler, “Transmission-line properties of a strip on a dielectric sheet on a plane,” IEEE Trans. MTT, vol. MTT-25, pp. 631–647, Aug. 1977. M. Y. Frankel, S. Gupta, J. A. Valdmanis, and G. A. Mourou, “Terahertz attenuation and dispersion characteristics of coplanar transmission lines.” IEEE Trans. MTT, vol. 39, no. 6, pp. 910–916, June 1991.

Copyright © 2006 Taylor & Francis Group, LLC

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10 Multiconductor Transmission Lines Daniël De Zutter Gent University, Belgium

10.1 Introduction: Frequency vs. Time Domain Analysis....... 10-1 10.2 Telegrapher’s Equations for Uniform Multiconductor Transmission Lines........................................................... 10-2

Luc Martens Gent University, Belgium

Generalities • Low-Frequency or Quasi-Transverse Electromagnetic Description • Analytical Expressions for Some Simple Multiconductor Transmission Line Configurations

10.1 Introduction: Frequency vs. Time Domain Analysis Multiconductor transmission lines (MTL), or multiconductor buses as they are also often called, are found in almost every electrical packaging technology and on every technology level from digital chips, over MMICs (monolithic microwave integrated circuits) to MCMs (multichip modules), boards, and backplanes. Multiconductor transmission lines are electrical conducting structures with a constant crosssection (the x, y-plane) that propagates signals in the direction perpendicular to that cross-section (the z-axis) (see also Fig. 10.1). Being restricted to a constant cross-section we are in fact dealing with the socalled uniform MTL. The more general case using a nonuniform cross-section is much more difficult to handle and constitutes a fully three-dimensional problem. It is not the purpose of this chapter to give a detailed account of the physical properties and the use of the different types of MTL. The literature on this subject is abundant and any particular reference is bound to be both subjective and totally incomplete. Hence, we put forward only [1], [2], and [3] as references here, as they contain a wealth of information and additional references. In the frequency domain, i.e., for harmonic signals, solution of Maxwell’s sourceless equations yields a number of (evanescent and propagating) modes characterized by modal propagation factors exp (± j β z) and by a modal field distribution, which depends only upon the (x, y)-coordinates of the cross-section. In the presence of losses and for evanescent modes β can take complex values, and j β is then replaced by γ = α + jβ. In the propagation direction, the modal field amplitudes essentially behave as voltage and current along a transmission line. This immediately suggests that MTL should be represented on the circuit level by a set of coupled circuit transmission lines. The relationship between the typical circuit quantities, such as voltages, currents, coupling impedances, and signal velocities, on the one hand, and the original field quantities (modal fields and modal propagation factors) is not straightforward [4]. In general, the circuit quantities will be frequency dependent. The frequency domain circuit model parameters can be used as the starting point for time domain analysis of networks, including multiconductor lines. This is, again, a vast research topic with important technical applications. Section 10.2 describes the circuit modeling in the frequency domain of uniform MTL based on the Telegrapher’s equations. The meaning of the voltages and currents in these equations is explained both at lower frequencies in which the quasi-transverse electromagnetic (TEM) approach is valid as well as

10-1 Copyright © 2006 Taylor & Francis Group, LLC

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10-2

Nonlinear and Distributed Circuits

1

air 2

3 dielectric

1

2

layered substrate

ground plane shield (a)

(b)

FIGURE 10.1 Two examples of cross sections of multiconductor lines.

in the so-called full-wave regime valid for any frequency. The notions TEM, quasi-TEM, and full-wave are elucidated. We introduce the capacitance, inductance, resistance, and conductance matrices together with the characteristic impedance matrix of the coupled transmission line model. Finally, for some simple MTL configurations analytical formulas are presented expressing the previous quantities and the propagation factors as a function of the geometric and electrical parameters of these configurations. It would be a formidable task to give a comprehensive overview of all the methods that are actually used for the time domain analysis of MTL. In the remaining part of this paragraph a very short overview (both for uniform and nonuniform structures) is presented along with some references. In the case of linear loads and drivers, frequency domain methods in combination with (fast) Fourier transform techniques are certainly most effective [5–7]. In the presence of nonlinear loads and drivers other approaches must be used. Simulations based on harmonic balance techniques [8, 9] are, again, mainly frequency domain methods. All signals are approximated by a finite sum of harmonics and the nonlinear loads and drivers are taken into account by converting their time domain behavior to the frequency domain. Kirchhoff laws are then imposed for each harmonic in an iterative way. Harmonic balance techniques are not very well suited for transient analysis or in the presence of strong nonlinearities, but are excellent for mixers, amplifiers, filters, etc. Many recent efforts were directed toward the development of time domain simulation methods (for both uniform and nonuniform interconnection structures) based on advanced convolution-type approaches. It is, of course, impossible to picture all the ramifications in this research field. We refer the reader to a recent special issue of IEEE Circuits and Systems Transactions [10], to the “Simulation Techniques for Passive Devices and Structures” section of a special issue of IEEE Microwave Theory and Techniques Transactions [11], and to a 1994 special issue of the Analog Integrated Circuits and Signal Processing Journal [12] and to the wealth of references therein. Both frequency and time domain experimental characterization techniques for uniform and nonuniform multiconductor structures can be found in Chapter 11.

10.2 Telegrapher’s Equations for Uniform Multiconductor Transmission Lines Generalities Figures 10.1(a) and (b) show the cross-sections of two general coupled lossy MTLs consisting of N + 1 conductors. These conductors either can be perfectly conducting or exhibit finite conductivity. Their cross-section remains constant along the propagation or longitudinal direction z. The (N +1)th conductor is taken as reference conductor. In many practical cases, this will be the ground plane at the top or bottom

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Multiconductor Transmission Lines

[(Fig. 10.1(a)] of the layered dielectric in which the conductors are embedded or is the shielding surrounding the other conductors [(Fig. 10.1(b)]. We restrict the analysis to the frequency domain, i.e., all field components and all voltages and currents have a common time dependence, exp(jωt), which is suppressed in the sequel. The generalized Telegrapher’s equations governing the circuit representation of the MTL of Fig. 10.1 in terms of a set of C-coupled circuit transmission lines is given by [4]: dV + ZI = 0 dz

(10.1)

dI + YV = 0 dz V and I are column vectors, the C elements of which are the voltages and currents of the circuit model; Z and Y are the C × C impedance and admittance matrices. Equation (10.1) is a good circuit description of the wave phenomena along a MTL if only the fundamental modes of the corresponding field problem are of importance. In that case C = N (C = 3 in Fig. 10.1(a) and C = 2 in Fig. 10.1(b)) if a ground plane is present, and C = N –1 in the absence of a ground plane. For the relationship between the actual electromagnetic field description in terms of modes and the circuit model (10.1), we refer the reader to [4] and [13]. The general solution to (10.1) is given by

( )

V( z ) = 2 ITm

−1

( )

e − j?z K + + 2 ITm

−1

e j?z K − (10.2)

I( z ) = Ime − j?z K + − Ime j?z K −

K + and K – are column vectors with C elements. β is a diagonal C × C matrix with the propagation factors β f ( f = 1, 2,… , C) of the C fundamental eigenmodes as diagonal elements. This matrix reduces to a single propagation factor for a single transmission line (see Eq. 9.6). For the calculation of the fields and of the propagation constants many different methods can be found in the literature [14]. Solution (10.2) of the differential equations (10.1) is the extension of the corresponding equations (9.5) for a single transmission line to the coupled line case. It also consists of waves respectively traveling in positive and negative z-directions. The Im is a C × C matrix, the columns of which are the current eigenvectors of the circuit model. The following relationships hold:

( ) β(I )

Z = jωL + R = 2 j ITm

−1

−1

m

j Y = jωC + G = ImβITm 2

(10.3)

L, R , C and G are the C × C (frequency dependent) inductance, resistance, capacitance, and conductance matrices. The C × C characteristic impedance matrix of the transmission line models is given by Z char = 2(ITm )−1(Im )−1 . The matrix Zchar replaces the simple characteristic impedance number of (9.9). In general the mapping of the wave phenomenon onto the circuit model [(10.1) to (10.3)] depends on the choice of Im. We refer the reader to the detailed discussions in [4]. For MTLs the most adopted definition for the elements of Im is [15]

I m, jf =

∫H cj

tr , f

⋅ dl

j , f = 1, 2, … , C

(10.4)

where cj is the circumference of conductor j and where Htr, f is the transversal component of the magnetic field of eigenmode f. This means than Im, jf is the total current through conductor j due to eigenmode f. This definition is used in the power-current impedance definition for microstrip and stripline problems

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Nonlinear and Distributed Circuits

[9]. For slotline circuits, a formulation that parallels the one given above must be used, but in this case it makes much more sense to introduce the voltage eigenvectors and to define them as line integrals of the electric field (see Appendix B of [16]). As Z and Y in (10.3) are frequency dependent, the time domain equivalent of (10.1) involves convolution integrals between Z and I on the one hand and Y and V on the other hand. The propagation factors βf are also frequency dependent, hence the signal propagation will show dispersion, i.e., the signal waveform becomes distorted while propagating.

Low-Frequency or Quasi-Transverse Electromagnetic Description In the previous section, the reader was given a very general picture of the MTL problem, valid for any frequency. This analysis is the so-called full-wave analysis. The present section is restricted to the lowfrequency or quasi-static regime. Here, the cross-section of the MTL is small with respect to the relevant wavelengths, the longitudinal field components can be neglected and the transversal field components can be found from the solution of an electrostatic or magnetostatic problem in the cross-section of the MTL. A detailed discussion of the theoretical background can be found in [17]. In the quasi-TEM limit and in the absence of losses R and G are zero and L and C become frequency independent and take their classical meaning. Both skin-effect losses and small dielectric losses can be accounted for by a perturbation approach [18]. In that case a frequency dependent R and G must be reintroduced. If R and G are zero and L and C are frequency independent, the following Telegrapher’s equations hold: ∂i ∂v = −L ⋅ ∂t ∂z

(10.5)

∂v ∂i = −C ⋅ ∂t ∂z

Equation (10.5) is the time domain counterpart of (10.1). We have replaced the capital letters for voltages and currents with lower case letters to distinguish between time and frequency domain. L and C are related to the total charge Qi per unit length carried by each conductor and to the total magnetic flux Fi between each conductor and the reference conductor: Q = C⋅V

(10.6)

F = L⋅I

where Q and F are C × 1 column vectors with elements Qi and Fi , respectively. For a piecewise homogeneous medium, one can prove that the inductance matrix L can be derived from an equivalent socalled vacuum capacitance matrix Cv with L = C −v 1 and where Cv is calculated in the same way as C, but with the piecewise constant ε everywhere replaced by the corresponding value of 1/µ. For nonmagnetic materials, this operation corresponds with taking away all dielectrics and working with vacuum, thus explaining the name of the matrix Cv. Other properties of C and L are: C and L are symmetric, i.e., Cij = Cji and Lij = Lji C is real, Cii > 0 and Cij < 0 (i ≠ j) l is real, Lii > 0 and Lij > 0 The propagation factors βf which form the elements of β in (10.2) are now given by the eigenvalues of (LC)1/2 or equivalently of (CL)1/2. The current eigenvectors which form the columns of Im are now solutions of the following eigenproblem (where ω is the circular frequency):

( )

ω 2 (CL)I = β f I

Copyright © 2006 Taylor & Francis Group, LLC

2

(10.7)

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Multiconductor Transmission Lines

The corresponding eigenvoltages are solutions of:

( )

ω 2 (LC)V = β f V 2

(10.8)

Hence, corresponding voltage and current eigenmodes propagate with the same propagation factors as L, C, V, and I and are frequency independent, βf is proportional with ω and can be rewritten as β f = ωβ ′f , proving that the propagation is nondispersive with velocity v f = 1 / β ′f . Remember that the subindex f takes the values 1, 2,…, C, i.e., for a three-conductor problem above a ground plane [N = C = 3, see Fig. 10.1(a)], three distinct propagation factors and corresponding eigenmode profiles exist for currents and voltages. Note, however, that for the same βf the eigenvector for the currents differs from the eigenvector of the voltages. We conclude this section by remarking that, for MTL embedded in a homogeneous medium (such as the simple stripline or the coaxial cable with homogeneous filling), (LC) = ε µ1, where 1 is the unity matrix. Thus, the eigenmodes are purely TEM, i.e., electric and magnetic fields have only transversal components and the longitudinal ones are exactly zero. All propagation factors βf take the same value [c / (ε r µ r )1/ 2 ], where c is the velocity of light in vacuum. Note, however, that even for identical βf different eigenmodes will be found. Numerical calculation of L and C can be performed by many different numerical methods (see the reference section of [18]), and for sufficiently simple configurations, analytical formulas are available. For a line with one conductor and a ground plane (N = C = 1) the characteristic impedance Z 0 = (L / C)1/ 2 and the signal velocity vp is v p = (LC)−1/ 2 .

Analytical Expressions for Some Simple Multiconductor Transmission Line Configurations Symmetric Stripline Sections 9.3 through 9.6 presented a number of MTL consisting of a single conductor and a ground plate (N = C = 1). Here, we add another important practical example, the symmetric stripline configuration of Fig. 10.2. We restrict ourselves to the lossless case. A perfectly conducting strip of width w and thickness t is symmetrically placed between two perfectly conducting ground planes with spacing b. The insulating substrate has a permittivity ε = ε0 εr , and is nonmagnetic. This case has a single fundamental mode. The characteristic impedance Z0 is given by [19]: 4 b−t Z 0 ε r = 30 ln 1 + π W ′

2 8 b − t + 8 b − t + 6.27 π W′ π W′

(10.9)

with W′ W ∆W = + b−t b−t b−t

b

t w

FIGURE 10.2 Strip line configuration.

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(10.10)

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10-6

Nonlinear and Distributed Circuits

b

t w

s

w

FIGURE 10.3 Coupled, symmetric strip line configuration.

where m 2 ∆W x 1 x 0.0796 x = 1 − ln + b − t π(1 − x ) 2 2 − x W b + 1.1x −1

2 x m = 21 + , x =t b 3 1− x For W′/(b – t) < 10 (10.9) is 0.5% accurate. The signal velocity vp is given by c/(εr)1/2, where c is the velocity of light in vacuum. The corresponding L and C are given by L = Z0 /vp and C = 1/(Z0vp ). Coupled Striplines The configuration is depicted in Fig. 10.3. It consists of the symmetric combination of the structure of Fig. 10.2. There are now two fundamental TEM modes (N = C = 2). The even mode (index e) corresponds to the situation in which both central conductors are placed at the same voltage (speaking in lowfrequency terms, of course). The odd mode (index o) corresponds to the situation where the central conductors are placed at opposite voltages. The impedances of the modes (respectively, Z0, e and Z0, o ) are given by: Z 0 e ,o =

30π(b − t ) bC ε r W + f Ae ,o 2 π

(10.11)

with Ae = 1 +

ln(1 + tanh θ) ln 2

Ao = 1 +

ln(1+ coth θ) ln 2

θ=

πS 2b

2b − t t t (2b − t ) C f (t b) = 2 ln − ln b − t b (b − t )2 The signal velocity is the same for both modes (c/(ε r)1/2), and the L and C of both modes can be found by replacing Z0 in the “Symmetric Strip Line” section by Z0, e and Z0, o , respectively.

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Multiconductor Transmission Lines

t h

w

s

w

FIGURE 10.4 Coupled, symmetric microstrip configuration.

Coupled Microstrip Lines The configuration is depicted in Fig. 10.4. It consists of the symmetric combination of the structure of Fig. 9.7. Again, we have two fundamental modes, but the modes are hybrid, i.e., not purely TEM. Much work has been done on this configuration. The formulas proposed in the literature are quite lengthy; and we refer the reader to [20] and [21]. Reference [20] gives a very good overview together with some simple approximations, and [21] gives the most accurate formulas, taking into account the frequency dependence. It is important to remark here that the two impedances, Z0, e and Z0, o , can be found. They depend upon frequency. Both modes now have a different velocity. The data found in literature are typically expressed in terms of the effective dielectric constant. The modal field lines are both found in the air above the substrate and in the substrate itself. Hence, the field experiences an effective dielectric constant that is smaller than the dielectric constant of the substrate. The effective dielectric constant for the even mode (εr, e ) will be higher than for the odd mode (εr, o ), and are frequency dependent. The corresponding modal velocities are given by c/(εr, e )1/2 and c/(εr, o )1/2. Two-Wire Line See Section 9.2.

References [1] T. Itoh, Ed., Numerical Techniques for Microwave and Millimeter-Wave Passive Structures, New York: John Wiley & Sons, 1989. [2] J. A. Kong, Ed., Progress in Electromagnetics Research, Volumes 1–5, New York: Elsevier, 1989–1991. [3] C. F. Coombs, Ed., Printed Circuits Handbook, 3rd ed., New York: McGraw-Hill, 1988. [4] N. Faché, F. Olyslager, and D. De Zutter, Electromagnetic and Circuit Modelling of Multiconductor Transmission Lines, Oxford Engineering Series 35, Oxford: Clarendon Press, 1993. [5] T. R. Arabi, T. K. Sarkar, and A. R. Djordjevic, “Time and frequency domain characterization of multiconductor transmission lines,” Electromagnetics, vol. 9, no. 1, pp. 85–112, 1989. [6] J. R. Griffith and M. S. Nakhla, “Time domain analysis of lossy coupled transmission lines,” IEEE Trans. MTT, vol. 38, no. 10, pp. 1480–1487, Oct. 1990. [7] B. J. Cooke, J. L. Prince, and A. C. Cangellaris, “S-parameter analysis of multiconductor, integrated circuit interconnect systems,” IEEE Trans. Computer-Aided Design, vol. CAD-11, no. 3, pp. 353–360, March 1992. [8] V. Rizzoli et al., “State of the art and present trends in nonlinear microwave CAD techniques,” IEEE Trans. MTT, vol. 36, no. 2, pp. 343–363, Feb. 1988. [9] R. Gilmore, “Nonlinear circuit design using the modified harmonic balance algorithm,” IEEE Trans. MTT, vol. 34, no. 12, pp. 1294–1307, Dec. 1986. [10] IEEE Trans. Circuits Syst. Transactions, I: Fundamental Theory and Applications, Special Issue on Simulation, Modelling and Electrical Design of High-Speed and High-Density Interconnects, vol. 39, no. 11, Nov. 1992. [11] IEEE Trans. MTT, Special Issue on Process-Oriented Microwave CAD and Modeling vol. 40, no. 7, July 1992. [12] Analog Integrated Circuits Signal Process., Special Issue on High-Speed Interconnects, vol. 5, no. 1, pp. 1–107, Jan. 1994.

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Nonlinear and Distributed Circuits

[13] F. Olyslager, D. De Zutter, and A. T. de Hoop, “New reciprocal circuit model for lossy waveguide structures based on the orthogonality of the eigenmodes,” IEEE Trans. MTT, vol. 42, no. 12, pp. 2261–2269, Dec. 1994. [14] F. Olyslager and D. De Zutter, “Rigorous boundary integral equation solution for general isotropic and uniaxial anisotropic dielectric waveguides in multilayered media including losses, gain and leakage,” IEEE Trans. MTT, vol. 41, no. 8, pp. 1385–1392, Aug. 1993. [15] R. H. Jansen and M. Kirschning, “Arguments and an accurate model for the power-current formulation of microstrip characteristic impedance,” Arch. Elek. Übertragung, vol. 37, no. 3/4, pp. 108–112, 1983. [16] T. Dhaene and D. De Zutter, “CAD-oriented general circuit description of uniform coupled lossy dispersive waveguide structures,” IEEE Trans. MTT, Special Issue on Process-Oriented Microwave CAD and Modeling, vol. 40, no. 7, pp. 1445–1554, July 1992. [17] I. V. Lindell, “On the quasi-TEM modes in inhomogeneous multiconductor transmission lines,” IEEE Trans. MTT, vol. 29, no. 8, pp. 812–817, 1981. [18] F. Olyslager, N. Faché, and D. De Zutter, “New fast and accurate line parameter calculation of general multiconductor transmission lines in multilayered media,” IEEE Trans, MTT, vol. MTT39, no. 6, pp. 901–909, June 1991. [19] H. A. Wheeler, “Transmission line properties of a stripline between parallel planes,” IEEE Trans. MTT, vol. 26, pp. 866–876, Nov. 1978. [20] T. Edwards, Foundations for Microstrip Circuit Design, 2nd ed., Chichester, U.K.: John Wiley & Sons, 1992. [21] M. Kirschning and R. H. Jansen, “Accurate wide-range design equations for the frequency-dependent characteristics of parallel coupled microstrip lines,” IEEE Trans. MTT, vol. 32, no. 1, pp. 83–90, Jan. 1984.

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11 Time and Frequency Domain Responses 11.1 Time Domain Reflectometry........................................... 11-1 Principles • One-Port Time Domain Reflectometry • Time Domain Reflectometry Pictures for Typical Loads • Time Domain Reflectometric Characterization of an Interconnection Structure

Luc Martens Gent University, Belgium

Daniël De Zutter

11.2 Frequency Domain Network Analysis ............................ 11-4

Gent University, Belgium

Introduction • Network Analyzer: Block Diagram • Measurement Errors and Calibration

11.1 Time Domain Reflectometry Principles Time domain reflectometry is used to characterize interconnections in the time domain. The setup essentially consists of a time domain step generator and a digital sampling oscilloscope (Figure 11.1) [1]. The generator produces a positive-going step signal with a well-defined rise time. The step is applied to the device under test. The reflected and the transmitted signals are shown on the oscilloscope. Measuring the reflected signal is called time domain reflectometry (TDR); the transmitted signal is measured using the time domain transmission (TDT) option. The characteristic impedance levels and delay through an interconnection structure can be derived from the TDR measurements. The TDT measurement gives information about the losses (decrease of magnitude) and degradation of the rise time (filtering of high-frequency components). The TDR/TDT measurements also are used to extract an equivalent circuit consisting of transmission lines and lumped elements. The fundamentals of TDR are discussed in detail in [2] and [3]. Reference [4] describes the applications of TDR in various environments including PCB/backplane, wafer/hybrids, IC packages, connectors, and cables.

One-Port Time Domain Reflectometry Figure 11.2 demonstrates that the device under test is a simple resistor with impedance ZL. In this case, a mismatch with respect to the reference or system impedance Z0 exists. A reflected voltage wave will appear on the oscilloscope display algebraically added to the incident wave. The amplitude of the reflected voltage wave, Er , is determined by the reflection coefficient of the load impedance, ZL , with respect to the system impedance Z0 : E r = ρE i =

Z L − Z0 E Z L + Z0 i

(11.1)

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Nonlinear and Distributed Circuits

Tee generator

two-port DUT

TDR TDT

trigger

FIGURE 11.1 Setup of TDR/TDT measurements. DUT = device under test.

oscilloscope

Z0 = 50Ω Z0, τ

Vm(t)

2Ei

ZL

coaxial cable Vm(t)

Ei+Er Ei 0

2τ

FIGURE 11.2 TDR measurement of an impedance ZL .

Figure 11.2 also depicts the time domain picture shown on the oscilloscope for a load, the impedance ZL , that is larger than Z0. From the measurement of the magnitude Er of the reflected voltage wave, the load impedance ZL can be derived.

Time Domain Reflectometry Pictures for Typical Loads The most simple loads to be measured are the open circuit and the short circuit. For ideal open-circuit and short-circuit loads the reflection coefficient is, respectively, 1 and –1. This means that the measured voltage doubles in the first case and goes to zero in the second case, when the reflected voltage wave arrives at the oscilloscope (Figure 11.3). For any other real load impedance, the reflection coefficient lies between –1 and 1. If the real load impedance is larger than the reference impedance, the reflected voltage wave is a positive-going step signal. In this case the amplitude of the voltage is increased when the reflected wave is added to the input step (Figure 11.4). The reverse happens when the load impedance is lower than the reference impedance. For complex load impedances, the step response is more complicated. For example, in the case of a series connection of a resistance and an inductance or a parallel connection of a resistance and a capacitance, a first-order step response is obtained. From the two pictures in Figure 11.5, we learn that a series inductance gives a positive dip, while the capacitance produces a negative dip.

Time Domain Reflectometric Characterization of an Interconnection Structure One of the advantages of TDR is its ability to determine impedance levels and delays through an interconnection structure with multiple discontinuities. An example is shown in Figure 11.6 for a microstrip line connected to the measurement cable. We assume a perfect junction of the two transmission lines. The line is terminated in a load with impedance ZL. Observe that two mismatches produce reflections that can be analyzed separately. The mismatch at the junction of the two transmission lines generates a reflected wave Er1 = ρl Ei . Similarly, the mismatch at the load creates a reflection due to its reflection coefficient ρ2. Both reflection coefficients are defined as:

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Time and Frequency Domain Responses

Vm(t) 2Ei Ei

t

2τ Z0 2Ei

Vm(t)

Z0, τ

ZL

ZL = ∞, ρ = +1 = open circuit

Vm(t)

Ei

t

2τ Z0 2Ei

Vm(t)

Z0, τ

ZL = 0, ρ = −1 = short circuit

ZL

FIGURE 11.3 TDR pictures of an open- and a short-circuit termination.

ρ1 =

Z 0′ − Z 0 Z 0′ + Z 0

ρ2 =

Z L − Z 0′ Z L + Z 0′

(11.2)

After a time τ, the reflection at the junction of the transmission lines occurs. The voltage wave associated with this reflection adds to the oscilloscope’s picture at the time instant 2τ. The voltage wave that propagates further in the microstrip line is (1 + ρ1) Ei and is incident on ZL. The reflection at ZL occurs at the time τ + τ′ and is given by: E rL = ρ2 (1 + ρ1 )E i

(11.3)

After a time τ + 2τ′, a second reflection is generated at the junction. The reflection is now determined by the reflection coefficient ρ1′ = −ρ1 . The voltage wave Er2 that is transmitted through the junction and propagates in the direction of the generator adds to the time domain picture at time instant 2τ + 2τ ′ and is given by:

(

)

E r 2 = (1 + ρ1 )E rL = (1 − ρ1 )ρ2 (1 + ρ1 )E i = 1 − ρ12 ρ2E i

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(11.4)

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Nonlinear and Distributed Circuits

Vm(t)

4/3Ei Ei t 2τ

Z0 2Ei

Vm(t)

Z0, τ

ZL = 2Z0, ρ = +1/3

2Z0

ZL

Vm(t)

Ei 2/3Ei t

2τ Z0 2Ei

Vm(t)

Z0, τ

ZL

Z0 2

ZL = Z0/2, ρ = −1/3

FIGURE 11.4 TDR pictures of real impedance terminations (ZL = 2Z0 and ZL = Z0 /2).

If ρ1 is small in comparison to 1, then E r 2 ≈ ρ2E i

(11.5)

which means that ρ2 can be determined from the measurement of Er2. In this example, the measurement cable was perfectly matched to the generator impedance so that no reflection occurred at the generator side, which simplifies the time domain picture. In the case of an interconnection with many important discontinuities (high reflection coefficient), multiple reflections can prevent a straightforward interpretation of the oscilloscope’s display.

11.2 Frequency Domain Network Analysis Introduction A distributed circuit also can by analyzed in the frequency domain. At low frequencies the circuits are characterized by their Z- or Y-parameters. At high frequencies, circuits are better characterized by S-parameters. We focus only on S-parameter characterization.

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11-5

Time and Frequency Domain Responses

Vm(t) 2Ei

Ei

1 + R − Z0 E R + Z0 i

t

2τ Z0 2Ei

R

Z0, τ

Vm(t)

ZL

ZL = R + jωL

L

Vm(t) 1 + R − Z0 E R + Z0 i

Ei t 2τ Z0 Vm(t)

2Ei

Z0, τ

ZL

ZL =

C

R

R 1 + jωRC

FIGURE 11.5 TDR pictures of two complex impedance terminations.

ρ1

Z0

2Ei

Z0, τ

Vm(t)

Z′0, τ′

coaxial cable

Vm(t)

ρ2

ZL

microstrip line ρ′1

Z0 >Z′0 0, the distribution can be calculated by dividing the U(x) function into ∆ξ → 0 elementary slices. These may be considered to be individual Dirac-δ excitations and the responses given to them can be summarized by integration: v(x, t ) =

1 2 πt rc

Copyright © 2006 Taylor & Francis Group, LLC

∞

∫

−∞

(x − ξ)2 U (ξ) exp − dξ 4t rc

(12.5)

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Distributed RC Networks

FIGURE 12.2 Effect of an impulse-like charge injection at x = 0. (a) Voltage distribution in subsequent time instants. (b) Voltage transients in different distances from the injection point.

FIGURE 12.3 DRC line transients. (a) An arbitrary initial voltage distribution. (b) Solution for the initial stepfunction case.

Evaluating this equation for the special case of having 2U0 voltage on the x < 0 side at t = 0, while x > 0 is voltageless, results in v(x, t ) =

2U 0 2 πt rc

x (x − ξ)2 exp − dξ = U 0 erfc 4t rc 2 t rc −∞ 0

∫

(12.6)

where the integral of the GAUSS function is notated by erfc(x), the complementary error function.1 The originally abrupt voltage step is getting increasingly less steep with time [Fig. 12.3(b)]. In the middle at x = 0, the voltage remains U0.

1

2 x 2 ∞ - ∫0 exp(–y2) dy = ----- ∫x exp(–y2) dy erfc(x) = 1 – ----π

π

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Nonlinear and Distributed Circuits

FIGURE 12.4 Semi-infinite uniform DRC line. (a) Notation. (b) Normalized solution for the initially relaxed line.

Semi-Infinite Line Our next model is a bit closer to practice; the uniform RC line extends to x ≥ 0 only. At x = 0 the port is characterized by the V(t) voltage and the I(t) current (Fig. 12.4). If the line is relaxed and a I(t) = δ(t) current (a Dirac-δ current pulse) is forced to the port, a unit charge is introduced at x = 0. The result will be similar to that of Fig. 12.2(a), but instead of symmetrical spreading the charge moves towards the positive x direction only. This means that a unit charge generates a twice-larger voltage wave v(x, t ) =

x2 1c exp − 4t rc πt rc

(12.7)

Let us consider the case in which step function excitation is given to the port of Fig. 12.4. At t < 0, the port and the whole line are voltage free; at t ≥ 0 a constant U0 voltage is forced to the port. Comparing this situation with the problem of Fig. 12.3(b), it can be observed that the boundary conditions for the x > 0 semi-infinite line are the same as in our current example, so that the solution must to be similar as well [see Fig. 12.4(b)]: x v ( x , t ) = U 0 erfc 2 t rc

(12.8)

Applying at the t = 0 instant an arbitrary W(t) forced voltage excitation to the initially relaxed line, the response is given by the Duhamel integral as follows: w(x, t ) =

t

∫ 0

dW (τ) x erfc dτ 2 (t − τ) rc dτ

(12.9)

Finite DRC Line Let the DRC line of length L of Fig. 12.5(a) be closed at x = L with a short circuit. Let the line at t < 0 be relaxed and assume a W (t > 0) voltage excitation at the x = 0 port. Using the w(x, t) voltage response of the semi-infinite line (12.9), the response function for the short-terminated line of length L

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Distributed RC Networks

FIGURE 12.5 Finite-length uniform DRC line. (a) DRC line with short-circuit at x = L. (b) Visualization of the mirroring procedure.

v(x, t ) =

∑ (−1) ⋅ w(2iL + (−1) x, t ) ∞

i

i

i =0

(12.10)

∞

=

∑ (w(2kL + x, t ) − w(2kL + 2L − x, t )) k =0

This result is illustrated in Fig. 12.5(b). The v(x, t) function is given as the sum of the shifted, negated, and mirrored replicas of the w(x, t) function, so that it is a valid solution as well. The x = L boundary condition is the short circuit v(x = L, t) = 0. The i = 0 and i = 1 functions are the same size with different signs at x = L, so they cancel each other. The same is true for i = 2 and 3, and so on. The x = 0 boundary condition v = W(t) is fulfilled by the i = 0 function, while the further functions cancel each other in pairs (the i = 1 and 2, etc.). The result can be interpreted as the response of the semi-infinite line being mirrored with negative sign on the short termination. In the case of Fig. 12.5(a), the termination on both the x = 0 and x = L ends is assured by zero impedance short circuit; the resultant voltage function comes from the successive back and forth mirroring between these two “mirrors”. It is easy to understand that a termination with an open circuit results in mirroring without sign change. (At this termination the current equals to zero so that the dv/dx derivative equals to zero as well. This requirement is always fulfilled in the mirroring point summarizing the continuous incident function with its mirrored version.) According to this, the voltage on the open-terminated line of Fig. 12.6(a) is v(x, t ) =

∞

∑ (−1) (w(2kL + x, t ) + w(2kL + 2L − x, t )) k

(12.11)

k =0

which in the case of step function excitation with U0 amplitude is v(x, t ) = U 0

∞

∑ (−1) erfc 22kLt +rcx + erfc 2kL2 +t2Lrc− x k

k =0

This function is given in Fig. 12.6(b) for some time instants.

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(12.12)

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Nonlinear and Distributed Circuits

FIGURE 12.6 Finite-length uniform DRC line. (a) Open-circuit at the far end. (b) Normalized solution for the initially relaxed line.

Solution in the Frequency Domain To find the solution of the differential Eq. (12.3), the following trial function can be used v ( x , t ) = v ⋅ exp( jωt ) ⋅ exp( γx )

(12.13)

Substituting this function into (12.3) results in the following so-called dispersion equation: γ=

jωrc = (1 + j )

1 ωrc 2

(12.14)

This means that a wave-like solution exists as well. However, it is strongly collapsing because the real and imaginary parts of γ are always equal, which means that the attenuation on a path of λ wavelength is exp (–2π) 1/535. The lossless DRC line can be considered to be a special telegraph line having neither serial inductance nor shunt conductance. The telegraph line theory can be conveniently used at the calculation of uniform DRC networks. The γ propagation constant and the Z0 characteristic impedance for the present case are: γ = src

Z0 =

r sc

(12.15)

With these the two-port impedance parameters and chain parameters of an RC line of length L can be given as follows: cth γL Z ij = Z 0 1 sh γL

1 sh γL cth γL

A C

B ch γL = 1 D Z sh γL 0

Z 0 sh γL ch γL

(12.16)

If one of the ports is terminated by the impedance of Zt, the following impedance can be “seen” on the opposite port

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Distributed RC Networks

Z in = Z 0

Zt ch γL + Z 0 sh γL Zt sh γL + Z 0 ch γL

(12.17)

Uniform, Lossy DRC Lines In some cases, the DRC structure also has shunt conductance, which means that it is lossy. The value of this conductance for the unit length is notated by g. In such a case, without giving the details of the calculation, the v(x, t) line voltage can be determined by the solution of the equation ∂v 1 ∂ 2v g − v = ∂t rc ∂x 2 c

(12.18)

The following forms of the characteristic impedance and the propagation constant can be used now in the frequency domain γ = r ( g + sc )

Z0 =

r g + sc

(12.19)

It is an interesting fact that the charge carrier motion in the base region of homogeneously doped bipolar transistors can be described by formally similar equations, so that the intrinsic transients of the bipolar transistors can be exactly modeled by lossy DRC two-ports [5]. Example 12.1 Wiring Delays: Neither the series resistance nor the stray capacitances of the interconnection leads of integrated circuits are negligible. As an example, in the case of a polysilicon line of 1 µm width r ≅ 50 kΩ/mm, c ≅ 0.04 pF/mm. This means that these wires should be considered to be DRC lines. The input logical levels appear on their output with a finite delay. Let us determine the delay of a wire of length L. From (12.12), v ( L, t ) = U 0

∞

∑ 2(−1) erfc((2k + 1)ϑ) k

k =0

where ϑ=

L 2 t rc

The value of the summation over k will reach 0.9 at ϑ = 0.5, so that the voltage at the end of the line will reach the 90% of U0 after a time delay of t delay ≅ rcL2

(12.20)

Note that the time delay increases with the square of the length of the wire. In the case of L = 1 mm the time delay of this polysilicon wire is already 2 ns, which is more than the time delay of a CMOS logical gate. For lengthy wires (> 0.2 ÷ 0.5 mm), metal wiring must be applied with its inherently small resistivity. Example 12.2 Parasitic Effects of IC Resistors: In an IC amplifier stage the transistor is loaded with, e.g., R = 10 kΩ [Fig. 12.7(a)]. This resistor has been fabricated by the base diffusion, the sheet resistance is 200 Ω, and the parasitic capacitance is 125 pF/mm2. The width of the resistor is 4 µm. Let us determine the impedance of the resistor in the 1 to 1000 MHz range.

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Nonlinear and Distributed Circuits

FIGURE 12.7 A simple IC amplifier stage. (a) The load resistor is in fact a DRC line. (b) The amplitude and phase plot of the load.

The resistance can be realized in 4 µm × 200 µm size. The total parasitic capacitance is Cp = 0.1 pF. The impedance of the transistor-side port can be calculated according to (12.17), considering that the opposite port is short-terminated, as Z port = Z 0 th γL =

(

r th sc

)

src L =

R th sRC p sC p

(12.21)

Using the s = jω substitution, along with the actual data, the amplitude and phase functions of Fig. 12.7(b) can be obtained for the impedance. At 10 MHz, the phase shift caused by the parasitic capacitance is negligible, but at 100 MHz it is already considerable. It is important to recognize that in the case of half size linewidths the size of the resistor will be only 2 × 100 µm, which results in one-fourth of the previous value in Cp . This means that the capacitance becomes disturbing only at four times larger frequencies. Note in Fig. 12.7(b) that the amplitude function shows a 10 dB/decade decay and the phase keeps to 45°, as if the load would be characterized by a “half pole”. This 10 dB/decade frequency dependence often can be experienced at DRC lines.

12.2 Nonuniform Distributed RC Lines In some cases, the capacitance and/or the resistance of the DRC line shows a spatial dependency. This happens if the width of the lead strip is modulated in order to reach some special effects (Fig 12.8(a), tapered RC line). In case of a biased IC resistance, the capacitance changes along the length of the structure as well because of the voltage dependency of the junction capacitance. These structures are referred to as nonuniform DRC lines. Let the spatially dependent resistance and capacitance pro unit length be notated by r(x) and c(x), respectively. The following equations can be given for the structure: ∂v = −r ( x )i ∂x

∂i ∂v = −c ( x ) ∂x ∂t

(12.22)

With these, the following differential equation can be written: 1 ∂ 1 ∂v ∂v = ∂t c ( x ) ∂x r ( x ) ∂x

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(12.23)

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Distributed RC Networks

FIGURE 12.8 Nonuniform distributed RC lines. (a) Tapered line. (b) Exponentially tapered line.

We can obtain a more convenient form if we consider as an independent variable (instead of the x spatial co-ordinate) the total ρ resistance related to a given reference point (e.g., to the x = 0 point), as follows: ρ( x ) =

x

∫ r(ξ)dξ

r(x ) =

0

∂ρ ∂x

(12.24)

The variable defined this way can be considered as a kind of arc-length parameter. It has been introduced by [2]. With this new variable ∂ν 1 ∂ 2v = ∂t K (ρ) ∂ρ2

(12.25)

where

(

c x ) r((x ))

K (ρ) = K ρ( x ) =

(12.26)

The K(ρ) function describes well the spatial parameter changes of the RC line; that is, the structure of the line. Therefore, the K(ρ) function is called the structure function. Those DRC structures for which the K(ρ) functions are the same are considered to be electrically equivalent. Reference [2] uses the σ(ρ) integral or cumulative version of the structure function: ρ

x (ρ)

0

0

∫

σ(ρ) = K (ρ) dρ =

∫

c ( x ) dρ dx = r ( x ) dx

x (ρ)

∫ c(x) dx

(12.27)

0

This is the total capacitance related to the x = 0 point. This means that the cumulative srtucture function is the total capacitance versus total resistance map of the structure. An example of such a map is plotted in Fig. 12.9. The differential Eq. (12.25) is homogeneous and linear; therefore, superposition can be used. Because this equation is of variable coefficient type, however, analytic solution can be expected only rarely. Such a case is that of the K = K0 /ρ4 structure function for which v (ρ, t ) = const

K 1 exp − 02 t 3/ 2 4ρ t

(12.28)

Another form of (12.25) is also known. To obtain this form, we should turn to the s domain with sv =

Copyright © 2006 Taylor & Francis Group, LLC

1 ∂ 2v K (ρ) ∂ρ2

(12.29)

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Nonlinear and Distributed Circuits

FIGURE 12.9 Cumulative structure function.

Let us introduce the following new variable: Z(ρ) =

v (s, ρ) v v =− = ∂v i(s, ρ) − 1 ∂v ∂ρ r ∂x

(12.30)

This variable is in fact the impedance of the line at the location of ρ. After rearrangements, the dZ = 1 + sK (ρ)Z 2 dρ

(12.31)

equation can be obtained. This is called the Riccati differential equation. In the case of a known K(ρ) structure function, the one-port impedance of the nonuniform line can be determined from it by integration. In some cases, even the analytic solution is known. Such a case is the exponentially tapered line of Fig. 12.8(b), for which r(x ) =

Rs exp(− Bx ) w0

c ( x ) = C pw 0 exp( Bx )

K (ρ) =

RsC p 1 B 2 ρ2

(12.32)

where Rs is the sheet resistance of the structure, Cp is the capacitance per unit area, and ρ is related to the point in the infinity. If the port in the infinity is shorted, the impedance of the location of ρ is Z(s ) =

1 + 4sRsC p B 2 − 1 2sRsC p B 2

ρ

(12.33)

In other cases, numerical integration of (12.31) leads to the solution.

Approximation with Concatenated Uniform Sections The following model can be used for approximate calculation of nonuniform structures. We split the structure function into sections [see Fig. 12.10(a)] and use stepwise approximation. Inside the sections, K = constant, so that they are uniform sections. Concatenating them according to Fig. 12.10(b) an approximate model is obtained.

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Distributed RC Networks

FIGURE 12.10 Approximation with concatenated uniform sections. (a) Stepwise approximation of the structure function. (b) Approximate model.

In the frequency domain, the overall parameters of the resultant two-port can be easily calculated. The chain parameter matrices of the concatenated sections have to be multiplied in the appropriate order. The time domain behavior can be calculated by inverse Laplace transformation.

Asymptotic Approximation for Large s The chain parameters of a nonuniform DRC line can be approximately written as A C

s 1 λ

λ B 1 ≅ exp ∆ s s µ D 2

µ

( )

(12.34)

where R0

∆=

∫

K (ρ) dρ

R0 = ρ( L)

0

K ( R0 ) λ= K (0)

1/ 4

(

)

µ = K ( R0 )K (0)

−1/ 4

This approximation is valid for large s values and for sufficiently smooth function K(ρ) [2].

Lumped Element Approximation Distributed RC networks can be approximated by lumped element RC networks as well. The case of a lossless line is depicted in Fig. 12.11(a). The element values can be determined in either of the following two ways. 1. In the case of a known structure spatial discretization can be used. The nonuniform line must be split into sections of width h [see Fig. 12.11(b)]. A node of the network is associated with the

FIGURE 12.11 Lumped element approximation. (a) Network model. (b) The line split into sections.

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Nonlinear and Distributed Circuits

FIGURE 12.12 Cauer equivalent circuit (ladder structure).

middle of each section. The total capacitance of the section must be calculated, and this gives the value of the lumped capacitance connected to the node of the section. The resistance between the middle points of two adjacent sections must be calculated, and this has to be connected between the nodes of the appropriate sections. It is obvious that the accuracy can be increased by decreasing h. The price is the increasing number of lumped elements. With h → 0, we obtain the exact model. 2. When we know the impedance function, we can build the model using the pole-zero pattern of the network. For example, let us investigate a uniform RC line of finite length L, short-circuited at the far end. The corresponding impedance expression, according to (12.21), is Z(s ) =

1 th R0 sK 0 sK 0

(12.35)

where K0 = c/r, R0 = r · L. This function has poles and zeroes on the negative real axis in an infinite number. The zero and pole frequencies are σ zi = (2i )

2

π2 1 4 R02 K 0

σ pi = (2i + 1)

2

π2 1 4 R02 K 0

(12.36)

where i = 1, 2, …, ∞. Neglecting all the poles and zeroes situated well above the frequency range of interest and eliminating successively the remainder poles and zeroes from the (12.37) impedance function the element values of the ladder network in Fig. 12.12 (Cauer equivalent) can be obtained from z

Z(s) = R0

∏ (1 + s σ ) zi

i =1 p

∏(

1 + s σ pi

i =1

)

(12.37)

12.3 Infinite-Length RC Lines It was demonstrated earlier in the chapter that the DRC network can be described with the help of the pole-zero set of its impedance, as in the case of lumped element circuits. However, the number of these poles and zeroes is infinite. The infinite-length DRC lines generally do not have this property. For this network category the exact description by discrete poles and zeroes is not possible. For example, let us consider an infinitely long uniform DRC line. Its input impedance is the characteristic impedance: Z(s ) =

r sc

(12.38)

Evidently, this impedance function does not have poles and zeroes on the negative σ axis. This is the general case for a more complex, nonuniform distributed network if the length of the structure is infinite. The characteristic feature of these impedance functions is that jω factors appear in them. This is why in the logarithmic amplitude vs. frequency diagram (Bode plot) regions with 10 dB/decade slope appear, as pointed out in [1].

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Distributed RC Networks

This section provides a generalization of the pole and zero notions and the time-constant representation in order to make them suitable to describe infinitely long distributed one-ports as well. Before developing new ideas let us summarize the normal, well-known descriptions of a lumped element RC one-port. The port impedance of such a circuit is described by a rational function with real coefficients, as Z(s) = R0

(1 + s σ z1 )(1 + s σ z 2 )K(1 + s σ zn−1 )

(1 + s σ )(1 + s σ )K(1 + s σ ) p1

p2

(12.39)

pn

where R0 is the overall resistance, σp are the poles, and σz are the zeroes (as absolute values). The pole and zero values, together with the overall resistance value, hold all the information about the one-port impedance. Thus, an unambiguous representation of this impedance is given by a set of pole and zero values, and an overall resistance value. This will be called the pole-zero representation. Expression (12.39) can be rearranged as Z(s ) =

n

∑ i =1

Ri = 1 + s σ pi

n

∑ 1 + sτ Ri

i =1

(12.40) i

where τ i = 1 σ pi

(12.41)

which corresponds directly to the v(t) voltage response for a step-function current excitation: v (t ) =

n

∑ R ( 1 − exp(−t τ )) i

i

(12.42)

i =1

In this case, the impedance is described in terms of the τi time-constants of its response and of the Ri magnitudes related to it. This will be called the time-constant representation.

Generalization of the Time Constant Representation2 A lumped element one-port can be represented by a finite number of τ time-constants and R magnitudes. A graphic representation of this is demonstrated in Fig. 12.13. Each line of this plot represents a time constant, and the height of the line is proportional to the magnitude. This figure can be regarded as

FIGURE 12.13 A lumped element one-port can be represented with a discrete set of time constants. (From [4], reprinted with permission, © 1991 IEEE.)

2

Portions reprinted with permission from [4]. © 1991 IEEE.

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Nonlinear and Distributed Circuits

some kind of a spectrum, the spectrum of the time constants that appeared in the step-function response of the network. The port-impedance of a lumped element network has discrete “spectrum lines” in finite number. An infinite distributed network has no discrete lines, but it can be described with the help of a continuous time constant spectrum. The physical meaning of this idea is that in a general response any time constant can occur in some amount, some density, so that a density spectrum may suitably represent it. We define the spectrum function by first introducing a new, logarithmic variable for the time and the time constants: z = ln t

ζ = ln τ

(12.43)

Let us consider a DRC one-port, the response of which contains numerous exponentials having different time constants and magnitudes. The time constant density is defined as R(ζ) = lim

∆ζ→0

sum of magnitudes between ζ and ζ + ∆ζ ∆ζ

(12.44)

From this definition directly follows the fact that the step-function response can be composed from the time-constant density: ∞

∫ R(ζ)[1 − exp(−t exp(ζ))] dζ

v (t ) =

(12.45)

−∞

This integral is obviously the generalization of the summation in (12.42). If the R(ζ) density function consists of discrete lines (Dirac-δ pulses), (12.42) is given back. Using the logarithmic time variable in the integral of (12.45) v(z ) =

∞

∫ R(ζ)[1 − exp(− exp(z − ζ))] dζ

(12.46)

−∞

a convolution-type differential equation is obtained. Differentiating both sides with respect to z, we obtain d v ( z ) = R( z ) ⊗ W ( z ) dz

(12.47)

(

(12.48)

where

)

W ( z ) = exp z − exp( z )

is a fixed weighting function with shape depicted in Fig. 12.14, and ⊗ is the symbol of the convolution operation [3]. It can be proved that the area under the function W(z) is equal to unity ∞

∫ W (z ) dz = 1

(12.49)

−∞

This means that ∞

∫ R(z ) dz = v(t → ∞) = R

0

(12.50)

−∞

where R0 is the zero-frequency value of the impedance. In other words, the finite step-function response guarantees that the time-constant density has finite integral.

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Distributed RC Networks

12-15

FIGURE 12.14 The shape of the W(z) function. (From [4], reprinted with permission, © 1991 IEEE.)

Generalization of the Pole-Zero Representation The task is now to substitute the pole-zero pattern of the lumped network with a continuous (eventually excepting some discrete points) function to describe the general distributed parameter network. As emphasized above, the Bode plot of a distributed parameter network frequently shows regions with a 10 dB/decade slope. Figure 12.15 presents such an amplitude diagram. Using poles and zeroes, we can only approximate this behavior. If we place to point ω1 a pole, the Bode plot turns to the decay of 20 dB/decade, which is too steep. If a zero is placed, the diagram returns to the zero-slope. However, if we alternate poles and zeroes in a manner that the mean value of the slope should give the prescribed one, then any slope can be approximated. (For the previously-mentioned case, if the zeroes are situated exactly midway between the adjacent poles, then the mean slope is 10 dB/decade.) The suitability of the approximation depends on the density of poles and zeroes and can be improved by increasing the density. In this case, the network-specific information is not carried by the number of poles and zeroes (their number tends to infinity), but by the relative position of the zeroes between the adjacent poles. An alternative interpretation is also possible. The pair of a neighboring pole and zero constitutes a dipole. The “intensity” of that dipole depends on the distance between the pole and the zero. If they coincide and cancel each other, then the intensity is equal to zero. If the zero is situated at the maximal distance from the pole (i.e., it is at the next pole), the intensity reaches its maximal value. We choose this to be the unity.

FIGURE 12.15 The 10 dB/decade decay of a DRC line amplitude plot can be approximated with an alternative sequence of poles and zeroes. (From [4], reprinted with permission, © 1991 IEEE.)

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Nonlinear and Distributed Circuits

For later convenience, we turn to a logarithmic variable on the negative σ-axis: Σ = ln(−σ)

(12.51)

Let us investigate a ∆Σ interval of the logarithmic Σ-axis bounded by two adjacent poles. The distance between the left-hand pole and the inner zero is δΣ. Now, suppose that the density of the poles tends to infinity; i.e., ∆Σ becomes infinitely small. In this case the dipole intensity function is I d ( Σ ) = lim

∆Σ →0

δΣ ∆Σ

(12.52)

Considering that the poles and zeros of an RC port-impedance alternate, it follows that 0 ≤ Id ≤ 1. For an infinite, distributed RC two-pole the dipole intensity generally has regions in which the Id value is between 0 and 1. For example, if the Bode plot shows a slope of 10 dB/decade, the value of Id equals 0.5. This occurs in the case of an infinite, uniform RC line. For discrete circuits, the Id function has only two possible values: 0 or 1.

Relations among R(), Id () and the Impedance Function Obviously, we needed one-to-one relations between the time constant density or the dipole intensity representation and the impedance expression of the one-port. [For the lumped element case (12.39) and (12.40) give these correspondences]. Rather simple relations exist among the R(ζ), Id (Σ), and the Z(s) impedance function (see below). An interesting feature of these relations is a striking mathematical symmetry: the same expression couples the time constant density to the impedance and the dipole intensity to the logarithmic impedance. The detailed proofs of the relations presented here are given in [4]. If the Z(s) complex impedance function is known, R(ζ) or Id (Σ) can be calculated as3 R(ζ) = Id (Σ) =

(

)

1 Im Z s = − exp(−ζ) π

( (

(12.53)

))

1 Im ln Z s = − exp( Σ ) π

(12.54)

If the R(ζ) or Id (Σ) function is known Z(S) = R0 −

exp(S − x )

∞

∫ R(−x) 1 + exp(S − x) dx

(12.55)

−∞

ln Z(S) = ln R0 −

exp(S − x )

∞

∫ I (x) 1 + exp(S − x) dx d

(12.56)

−∞

where S is the complex-valued logarithm of the complex frequency: S = ln s

(12.57)

Using the integral Eqs. (12.55) and (12.56), however, we must keep at least one from the two conditions:

3

For (12.53) Z(s → ∞) = 0 is supposed.

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Distributed RC Networks

1. s is not located on the negative real axis. 2. If s is located on the negative real axis then, at this point, and in a ε → 0 neighborhood, R(ζ) or Id (Σ) must be equal to 0. Note that (12.53) to (12.56) are closely related to the Cauchy integral formula of the complex function theory. Substituting (12.53) into (12.55) and exploiting some inherent properties of the RC impedance functions after some mathematics, the Cauchy integral results. The same is true for (12.54) and (12.56). An important feature of the transformations of (12.53) and (12.55) is that they are linear. This means that the Z(s) ↔ R(ζ) transformation and the summation are interchangeable.

Practical Calculation of the R(ζ) Function4 Equation (12.53) suggests that only the jω imaginary frequency has to be replaced by the s = −exp(−z) complex frequency, and then the imaginary part of the calculated complex response multiplied by 1/π provides the time-constant spectrum. However, the procedure is not as simple as that because of the use of (12.53). This equation requires a great amount of caution. As the equation shows, the imaginary part of the Z impedance has to be calculated along the negative real axis of the complex plane. Along this axis, singularities usually lie: the poles of the network equation of lumped circuits or some singular lines in the case of distributed systems. These singularities can prevent the use of (12.53) for the calculation of the time-constant spectrum. We can overcome these difficulties by adapting an approximate solution. In order to walk around the “dangerous” area, we have to avoid following the negative real axis. A line that is appropriately close to this axis might be used instead [9], like: s = −(cos δ + j sin δ) exp(− z )

(12.58)

Obviously, the δ angle has to be very small, not more than 2 to 5°. Even if this angle is small, an error is introduced into the calculation. It can be proven that the calculated RC (z) time-constant spectrum can be expressed with the exact one by the following convolution equation: RC ( z ) =

π−δ R( z ) ⊗ er ( z ) π

(12.59)

where er ( z ) =

sin δ exp(− z ) 1 π − δ 1 − 2 cos δ exp(− z ) + exp(−2z )

)

(12.60)

This function is a narrow pulse of unity area. The error of the calculation is represented by this function. Diminishing δ the er(z) function becomes narrower and narrower. Thus, any accuracy requirement can be fulfilled by choosing an appropriately small δ angle. The half-value width, which is a measure of the resolution, is given by ∆ e = 2 ln 2 − cos δ +

(2 − cos δ)2 − 1 ≅ 2δ

(12.61)

If, for example, δ = 2°, then the resolution is 0.1 octave, which means that two poles can be distinguished if the ratio between their frequencies is greater than 1.072. Obviously, the calculated result has to be corrected with the factor of π/(π − δ). Example 12.3 A tight analogy exists between electrical conductance and heat flow. Heat-conducting media, which can be characterized with distributed heat resistance and distributed heat capacitance, behave similarly to the electrical DRC networks. The analogous quantities are as follows: 4

Portions reprinted, with permission, from [9]. © 2000 IEEE.

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Nonlinear and Distributed Circuits

(a)

(b)

FIGURE 12.16 A transistor package and its time-constant spectrum. (From [9], reprinted with permission. © 2000 IEEE.)

Voltage Current Resistance Capacitance

→ → → →

Temperature Power flow Thermal resistance Heat capacitance

In the simplest model law, 1-V voltage corresponds to 1°C, 1 A current to 1 W power, etc., but different mapping can be applied as well. The described analogy means that the tool set that is used to treat DRC networks can be applied to the calculation of heat-flow problems as well. This fact provides a direct way to calculate time-constant spectra in thermal field solver programs. These are thermal simulation tools suitable to solve the model equations in the s-domain. By using the substitution of (12.58), some of these programs calculate directly the thermal time-constant spectrum of different structures [9]. As an example, a transistor package, presented in Fig. 12.16(a), was simulated. The time-constant spectrum calculated by the field solver is plotted in Fig. 12.16(b). It is clearly visible that besides the two dominant time-constants a large number of further time-constants appear in the spectrum.

12.4 Inverse Problem for Distributed RC Circuits Equation (12.47) offers a direct way to determine the time-constant density from the (measured or calculated) response function, which means that it is a method for the identification of RC one-ports. Using (12.47) for a measured time domain response function, the time-constant density of the one-port impedance can be determined. By using this method, equivalent circuits can be constructed easily. This possibility is of considerable practical importance [8]; however, only approximate results can be obtained because the calculation leads to the inverse operation of the convolution. This operation can be done only approximately. A possibility exists for identification in the frequency domain as well. Introducing the Ω = ln ω notation for the frequency axis, convolution-type equations can be found [8] between the R(ζ) time-constant density and the Z(ω) complex impedance: −

d Re Z(Ω) = R(ζ = −Ω) ⊗ WR (Ω) dΩ

(12.62)

− Im Z(Ω) = R(ζ = −Ω) ⊗ WI (Ω)

(12.63)

where the weight-functions are WR (Ω) =

Copyright © 2006 Taylor & Francis Group, LLC

2 ⋅ exp(2Ω)

(1 + exp(2Ω))

2

(12.64)

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Distributed RC Networks

WI (Ω) =

exp(Ω) 1 + exp(2Ω)

(12.65)

Moreover, a direct convolution relation exists between the Bode diagram of the impedance and the dipole intensity. Considering the Bode amplitude and phase diagrams, i.e., by using ln(Z(Ω)) = ln abs(Z(Ω)) + j·arcus(Z(Ω)), we obtain −

(

)

(12.66)

− arcus Z(Ω) = I d (Ω) ⊗ WI (Ω)

(12.67)

d ln abs Z(Ω) = I d (Ω) ⊗ WR (Ω) dΩ

(

)

These equations may also be used for identification.

Network Identification by Deconvolution All the relations between the R(ζ) time-constant spectrum and the different network responses are of convolution type (12.47), (12.62), and (12.63). Knowing some kind of network responses the inverse operation of the convolution: the deconvolution leads to the R(ζ) function. The same is true for the relations (12.66), (12.67) of the Id (Σ) dipole intensity. This means that the problem of identification of DRC networks is reduced to a deconvolution step. This method, called NID (network identification by deconvolution), is discussed in detail in [8], together with the appropriate deconvolution methods. An important fact is that if we know the time response or only the real or the imaginary part of the frequency response, the network can be completely identified. (Noise effects produce practical limits — see later.) Example 12.4 For the sake of simplicity, a lumped circuit problem will be discussed first. The investigated RC network is given in Fig. 12.17(a). We have calculated the frequency response of the Z(s) portimpedance of this circuit by using a standard circuit-simulator program, with a 40 point/frequencydecade resolution. Both the real and the imaginary parts of this impedance are plotted in Fig. 12.17(b). In order to apply (12.62), the derivative of the real part was calculated numerically. The result is shown in Fig. 12.18(a). In the next step, this function was deconvolved by the WR(Ω) function. The result is plotted in Fig. 12.18(b). This function is the approximate time-constant density of the network. We expect that this function depicts the pole-pattern of the circuit. This is in fact obtained: the four peaks of the function are lying at f = 497.7 Hz, 1585 Hz, 4908 Hz, and 15850 Hz. These values correspond to the time constants of 320 µs, 100.4 µs, 32.43 µs, and 10.04 µs, respectively. The ratios of the peak areas are about 1:2:1:2. These data agree well with the actual parameters of the circuit in Fig. 12.17(a).5 Notice that the noise corrupting the Z(ω) function considerably affects the result of the identification. In order to reach 1 octave resolution of R(ζ) along the frequency axis, about 68 dB noise separation is needed in Z(ω). Detailed discussion of the noise effects on the identification can be found in [8]. Example 12.5 As a second example, let us discuss the thermal identification of a semiconductor package + heat sink structure. The analogy between electrical current and heat flow introduced in Example 12.3 will be applied again. Between a semiconductor chip and its ambient a complex distributed thermal structure exists consisting of many elements. The main parts of it are the chip itself, the soldering, the package, mounting to the heat sink, the heat sink itself, and the ambience. This is obviously a distributed thermal RC network, the input-port of which is the top surface of the chip and the far end is the ambience (“the world”).

5

Example reprinted with permission from [8]. © 1998 IEEE.

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(a)

(b)

FIGURE 12.17 RC ladder and the frequency response of the Z(ω) impedance. (From [8], reprinted with permission. © 1998 IEEE.)

(a)

(b)

FIGURE 12.18 Identification steps. (a) Derivative of Real(Z). (b) The identified time-constant spectrum. (From [8], reprinted with permission. © 1998 IEEE.)

Thus, the structure can be considered practically infinite. This means that we have to examine a nonuniform infinite-length DRC network. Investigations in the time domain require recording the thermal step-response of the system. A thermal test chip can be used for this purpose, containing appropriate heating elements that can assure stepfunction power excitation. The temperature rise is measured by the forward voltage change of a pn junction integrated into the test chip as well. This is the thermal response function. Such a thermal response is plotted in Fig. 12.19(a). The time range of the measurement is strikingly wide: 9 decades, from 10 µs to some thousand s. This is indispensable since the thermal time constants of the heat-flow structure vary over a wide range. According to (12.47), after numerical derivation of the step-response and by a consecutive deconvolution, the time constant density function R(z) can be obtained [see Fig. 12.19(b)]. Because of the quantization noise and measuring error the deconvolution operation can be done only approximately with a 1 ÷ 1.5 octave resolution. A suitable algorithm is discussed in [7]. Figure 12.19(b) illustrates that, in the 100 µs to 10 s interval, time constants spread over a relative wide range. This refers to the distributed structure of the chip and the package. At τ ≈ 1000 s, a relatively sharp, distinct time constant appears. This can be identified as originating from the heat capacitance of the whole heat sink and the heat sinkambience thermal resistance. Splitting the resultant time constant spectrum into ∆τ time slots, each of these slots can be approximated by a Dirac-δ spectrum line proportional in height to the appropriate slot area. These give the data of a lumped element approximation according to (12.40). Now, the equivalent circuit of the heat-flow structure can be generated either in Foster or in Cauer normal form.

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Distributed RC Networks

(a)

(b)

FIGURE 12.19 Thermal identification of a package + heat sink structure. (a) Thermal response between 10 µs and 4000 s. (b) The R(z) time-constant density function.

FIGURE 12.20 Cumulative structure function of the package + heat sink structure identified from the response function.

Using the Cauer-approximation of the DRC line we can calculate the approximate K(ρ) and σ(ρ) structure functions. From these functions, the heat-conducting cross section areas, the heat flow path length, etc. can be derived. This means that geometric and physical data of the heat-flow structure can be extracted and checked with the help of an electrical measurement. The structure function calculated from the measurement results of Fig. 12.19 is plotted in Fig. 12.20. It is easy to read out, e.g., the Chs heat capacitance of the heat sink. For more details, see [6],[10].

References [1] M. S. Ghausi and J. J. Kelly, Introduction to Distributed Parameter Networks, New York: Holt, Rinehart and Winston, 1968. [2] E. N. Protonotarios and O. Wing, “Theory of nonuniform RC lines, Part I,” IEEE Transactions on Circuit Theory, vol. 14, pp. 2-12, Mar. 1967 [3] D. G. Gardner, J. C. Gardner, G. Laush and W. W. Meinke: “Method for the analysis of multicomponent exponential decay curves”, Journal of Chemical Physics, vol. 31, no. 4, pp. 978-986, Oct. 1959

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[4] V. Székely, “On the representation of infinite-length distributed RC one-ports”, IEEE Transactions on Circuits and Systems, vol. 38, pp. 711-719, July 1991. [5] R L. Pritchard, Electrical Characteristics of Transistors, New York: McGraw-Hill, 1967 [6] V. Székely and Tran Van Bien, “Fine structure of heat flow path in semiconductor devices: a measurement and identification method,” Solid-State Electronics, vol. 31, pp. 1363-1368, Sept. 1988. [7] T. J. Kennett, W. V. Prestwich, A. Robertson, “Bayesian deconvolution. I: convergent properties”, Nuclear Instruments and Methods, no. 151, pp. 285-292, 1978. [8] V. Székely, “Identification of RC Networks by Deconvolution: Chances and Limits”, IEEE Transactions on Circuits and Systems-I. Theory and applications, vol. 45, no. 3, pp. 244-258, March 1998. [9] V. Székely, M. Rencz, “Thermal dynamics and the time constant domain”, IEEE Transactions on Components and Packaging Technologies, vol. 23, no. 3, pp. 587-594, Sept. 2000. [10] V. Székely, “Restoration of physical structures: an approach based on the theory of RC networks”, Proceedings of the ECCTD’99, European Conference on Circuit Theory and Design, 29 Aug.–2. Sept. 1999, Stresa, Italy, pp. 1131-1134.

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13 Synthesis of Distributed Circuits 13.1 13.2 13.3 13.4 13.5 13.6

Generic Relations ............................................................. 13-1 Synthesis of a Capacitance............................................... 13-3 Synthesis of an Inductance.............................................. 13-4 Synthesis of a Resistance.................................................. 13-5 Synthesis of Transformers ............................................... 13-7 Synthesis Examples........................................................... 13-9 Series L-C Circuit • Parallel L-C Circuit • Series L-C-R Circuit • Parallel L-C-R Circuit • Low-Pass Filters • High-Pass Filters • Bandpass Filters • Bandstop Filters • Further Comments on Distributed Circuit Filters

13.7 Synthesis of Couplers..................................................... 13-18

T. K. Ishii

Generic Relations • Proximity Couplers • Quarter-Wavelength Couplers • Lange Couplers

Marquette University, Wisconsin

13.1 Generic Relations The starting procedure for the synthesis of distributed circuits is the same as for the conventional synthesis of lumped parameter circuits. If a one-port network is to be synthesized, then a desired driving-point immittance H(s) must be defined first, where s = σ + jω

(13.1)

is the complex frequency, σ is the damping coefficient of the operating signal, and ω is the operating angular frequency. If a two-port network is to be synthesized, then a desired transmittance T(s) must be defined first. According to conventional principles of network synthesis [1], for the one-port network, H(s) is represented by H (s ) =

P(s ) ans n + an−1s n−1 + L + a1s + a0 = Q(s ) bms m + bm−1s m−1 + L + b1s + b0

(13.2)

where an and bm are constants determined by the network parameters, Q(s) is a driving function, and P(s) is the response function. For a two-port network T (s ) =

P(s ) ans n + an−1s n−1 + L + a1s + a0 = Q(s ) bms m + bm−1s m−1 + L + b1s + b0

(13.3)

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Nonlinear and Distributed Circuits

Both H(s) and T(s) should be examined for realizability [1] before proceeding. If the summation of even-order terms of P(s) is M1(s) and the summation of odd-order terms of P(s) is N1(s), then P(s ) = M1 (s ) + N1 (s )

(13.4)

Q( s ) = M 2 ( s ) + N 2 ( s )

(13.5)

Similarly,

For a one-port network the driving-point impedance is synthesized by [1] Z (s ) =

N1 (s ) M 2 (s )

(13.6)

Z (s ) =

M1 (s ) N 2 (s )

(13.7)

or

For a two-port network [1], if P(s) is even, the transadmittance is y 21 =

P (s ) N 2 (s )

[

]

1 + M 2 (s ) N 2 (s )

(13.8)

the open-circuit transfer admittance is y 21 =

P (s ) N 2 (s )

(13.9)

y 22 =

M 2 (s ) N 2 (s )

(13.10)

and the open-circuit output admittance is

If P(s) is odd, y 21 =

P (s ) N 2 (s )

[

]

1 + M 2 (s ) N 2 (s )

(13.11)

y 21 =

P (s ) M 2 (s )

(13.12)

y 22 =

N 2 (s ) M 2 (s )

(13.13)

and

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Synthesis of Distributed Circuits

In both cases, y11 =

y 21 (s ) n

(13.14)

where n is the current-ratio transfer function from port 1 to port 2. From these y- or z-parameters, the required values for the network components, i.e., L, C, and R, can be determined [1]. In high-frequency circuits the L, C, and R may be synthesized using distributed circuit components. The synthesis of distributed components in microstrip line and circuits is the emphasis of this chapter.

13.2 Synthesis of a Capacitance If the required capacitive impedance is –jXc Ω , the capacitance is C=

1 ωXC

(13.15)

where XC > 0

(13.16)

and ω is the operating angular frequency. In a distributed circuit, the capacitance C is often synthesized using a short section of a short-circuited transmission line of negligibly small transmission line loss. If the characteristic impedance of such a transmission line is Z0, the operating transmission line wavelength is λl , and the length of the transmission line is l in meters, then [2] jX c = jZ 0 tan

2πl λl

(13.17)

where λl λ